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-rw-r--r--fpga/usrp2/control_lib/settings_bus.v1
1 files changed, 0 insertions, 1 deletions
diff --git a/fpga/usrp2/control_lib/settings_bus.v b/fpga/usrp2/control_lib/settings_bus.v
index d01a30ab4..fc960e456 100644
--- a/fpga/usrp2/control_lib/settings_bus.v
+++ b/fpga/usrp2/control_lib/settings_bus.v
@@ -10,7 +10,6 @@ module settings_bus
input wb_stb_i,
input wb_we_i,
output reg wb_ack_o,
- input sys_clk,
output strobe,
output reg [7:0] addr,
output reg [31:0] data);