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-rw-r--r--fpga/usrp1/toplevel/sizetest/sizetest.quartus19
1 files changed, 19 insertions, 0 deletions
diff --git a/fpga/usrp1/toplevel/sizetest/sizetest.quartus b/fpga/usrp1/toplevel/sizetest/sizetest.quartus
new file mode 100644
index 000000000..d1eaf227a
--- /dev/null
+++ b/fpga/usrp1/toplevel/sizetest/sizetest.quartus
@@ -0,0 +1,19 @@
+COMPILER_SETTINGS_LIST
+{
+ COMPILER_SETTINGS = sizetest;
+}
+SIMULATOR_SETTINGS_LIST
+{
+ SIMULATOR_SETTINGS = sizetest;
+}
+SOFTWARE_SETTINGS_LIST
+{
+ SOFTWARE_SETTINGS = Debug;
+ SOFTWARE_SETTINGS = Release;
+}
+FILES
+{
+ VERILOG_FILE = ..\..\sdr_lib\cordic_stage.v;
+ VERILOG_FILE = ..\..\sdr_lib\cordic.v;
+ VERILOG_FILE = sizetest.v;
+}