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-rw-r--r--fpga/usrp1/sdr_lib/ram32.v17
1 files changed, 17 insertions, 0 deletions
diff --git a/fpga/usrp1/sdr_lib/ram32.v b/fpga/usrp1/sdr_lib/ram32.v
new file mode 100644
index 000000000..064e2735a
--- /dev/null
+++ b/fpga/usrp1/sdr_lib/ram32.v
@@ -0,0 +1,17 @@
+
+
+module ram32 (input clock, input write,
+ input [4:0] wr_addr, input [15:0] wr_data,
+ input [4:0] rd_addr, output reg [15:0] rd_data);
+
+ reg [15:0] ram_array [0:31];
+
+ always @(posedge clock)
+ rd_data <= #1 ram_array[rd_addr];
+
+ always @(posedge clock)
+ if(write)
+ ram_array[wr_addr] <= #1 wr_data;
+
+endmodule // ram32
+