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-rw-r--r--fpga/.ci/fpga-pipeline-pr.yml14
-rw-r--r--fpga/.ci/fpga-pipeline.yml27
-rw-r--r--fpga/.ci/templates/stages-fpga-pipeline.yml24
3 files changed, 35 insertions, 30 deletions
diff --git a/fpga/.ci/fpga-pipeline-pr.yml b/fpga/.ci/fpga-pipeline-pr.yml
index 307010e7a..bbb15d598 100644
--- a/fpga/.ci/fpga-pipeline-pr.yml
+++ b/fpga/.ci/fpga-pipeline-pr.yml
@@ -19,6 +19,10 @@ parameters:
type: boolean
displayName: Clean IP Build
default: false
+- name: package_images
+ type: boolean
+ displayName: Package Images
+ default: false
- name: build_x410
type: boolean
displayName: Build X410
@@ -36,10 +40,6 @@ parameters:
X410_CG_400:
target_name: X410_CG_400
timeout: 480
-- name: package_images
- type: boolean
- displayName: Package Images
- default: false
trigger: none
@@ -55,7 +55,7 @@ pr:
schedules:
- cron: "0 18 * * Sun"
- displayName: Weekly FPGA Build master branch
+ displayName: Weekly FPGA PR Build master branch
branches:
include:
- master
@@ -65,8 +65,8 @@ extends:
template: templates/stages-fpga-pipeline.yml
parameters:
run_testbenches: ${{ parameters.run_testbenches }}
+ clean_ip_build: ${{ parameters.clean_ip_build }}
+ publish_int_files: true
package_images: ${{ parameters.package_images }}
build_x410: ${{ parameters.build_x410 }}
x410_targets_matrix: ${{ parameters.x410_targets_matrix }}
- publish_int_files: true
- clean_ip_build: ${{ parameters.clean_ip_build }}
diff --git a/fpga/.ci/fpga-pipeline.yml b/fpga/.ci/fpga-pipeline.yml
index 9bf6d78f4..0b1ed7039 100644
--- a/fpga/.ci/fpga-pipeline.yml
+++ b/fpga/.ci/fpga-pipeline.yml
@@ -20,14 +20,14 @@ parameters:
type: boolean
displayName: Clean IP Build
default: true
-- name: build_x410
- type: boolean
- displayName: Build X410
- default: true
- name: package_images
type: boolean
displayName: Package Images
default: true
+- name: build_x410
+ type: boolean
+ displayName: Build X410
+ default: true
trigger:
batch: true
@@ -42,19 +42,18 @@ trigger:
pr: none
+schedules:
+- cron: "0 18 * * Sun"
+ displayName: Weekly FPGA CI Build master branch
+ branches:
+ include:
+ - master
+ always: true
+
extends:
template: templates/stages-fpga-pipeline.yml
parameters:
run_testbenches: ${{ parameters.run_testbenches }}
+ clean_ip_build: ${{ parameters.clean_ip_build }}
package_images: ${{ parameters.package_images }}
build_x410: ${{ parameters.build_x410 }}
- # These targets are shipped and included in the binaries package.
- x410_targets_matrix:
- X410_X4_200:
- target_name: X410_X4_200
- timeout: 480
- X410_CG_400:
- target_name: X410_CG_400
- timeout: 480
- publish_int_files: false
- clean_ip_build: ${{ parameters.clean_ip_build }}
diff --git a/fpga/.ci/templates/stages-fpga-pipeline.yml b/fpga/.ci/templates/stages-fpga-pipeline.yml
index 3bd98e390..5be4a0b36 100644
--- a/fpga/.ci/templates/stages-fpga-pipeline.yml
+++ b/fpga/.ci/templates/stages-fpga-pipeline.yml
@@ -22,6 +22,14 @@ parameters:
- name: clean_ip_build
type: boolean
default: false
+# Option to publish intermediate files
+- name: publish_int_files
+ type: boolean
+ default: false
+# Create images package
+- name: package_images
+ type: boolean
+ default: false
# Build X410 FPGA targets
- name: build_x410
type: boolean
@@ -33,14 +41,12 @@ parameters:
X410_X4_200:
target_name: X410_X4_200
timeout: 480
-# Option to publish intermediate files
-- name: publish_int_files
- type: boolean
- default: false
-# Create images package
-- name: package_images
- type: boolean
- default: false
+ X410_X4_400:
+ target_name: X410_X4_400
+ timeout: 480
+ X410_CG_400:
+ target_name: X410_CG_400
+ timeout: 480
resources:
@@ -81,7 +87,7 @@ stages:
- stage: build_x410_targets_stage
displayName: Build X410 FPGA Targets
dependsOn: build_x410_ip_stage
- condition: and(succeeded('build_x410_ip_stage'), eq('${{ parameters.build_x410 }}', 'true'))
+ condition: succeeded('build_x410_ip_stage')
jobs:
- template: job-build-fpga.yml
parameters: