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-rw-r--r--firmware/microblaze/apps/txrx_uhd.c4
-rw-r--r--firmware/microblaze/lib/net_common.c11
-rw-r--r--firmware/microblaze/lib/pic.c2
-rw-r--r--firmware/microblaze/usrp2/memory_map.h3
4 files changed, 16 insertions, 4 deletions
diff --git a/firmware/microblaze/apps/txrx_uhd.c b/firmware/microblaze/apps/txrx_uhd.c
index 098542bc8..8cae95b3a 100644
--- a/firmware/microblaze/apps/txrx_uhd.c
+++ b/firmware/microblaze/apps/txrx_uhd.c
@@ -372,7 +372,7 @@ eth_pkt_inspector(dbsm_t *sm, int bufno)
// In the future, a hardware state machine will do this...
if ( //warning! magic numbers approaching....
(((buff + ((2 + 14 + 20)/sizeof(uint32_t)))[0] & 0xffff) == USRP2_UDP_DATA_PORT) &&
- ((buff + ((2 + 14 + 20 + 8)/sizeof(uint32_t)))[0] != USRP2_INVALID_VRT_HEADER)
+ ((buff + ((2 + 14 + 20 + 8)/sizeof(uint32_t)))[1] != USRP2_INVALID_VRT_HEADER)
) return false;
//test if its an ip recovery packet
@@ -540,7 +540,7 @@ main(void)
}
if (pending & PIC_OVERRUN_INT){
- dbsm_handle_rx_overrun(&dsp_rx_sm);
+ //dbsm_handle_rx_overrun(&dsp_rx_sm);
pic_regs->pending = PIC_OVERRUN_INT; // clear pending interrupt
// FIXME Figure out how to handle this robustly.
diff --git a/firmware/microblaze/lib/net_common.c b/firmware/microblaze/lib/net_common.c
index beaaa5948..0a085db3a 100644
--- a/firmware/microblaze/lib/net_common.c
+++ b/firmware/microblaze/lib/net_common.c
@@ -291,8 +291,17 @@ handle_icmp_packet(struct ip_addr src, struct ip_addr dst,
{
switch (icmp->type){
case ICMP_DUR: // Destinatino Unreachable
- //stop_streaming(); //FIXME
if (icmp->code == ICMP_DUR_PORT){ // port unreachable
+ //handle destination port unreachable (the host ctrl+c'd the app):
+
+ //end async update packets per second
+ sr_tx_ctrl->cyc_per_up = 0;
+
+ //the end continuous streaming command
+ sr_rx_ctrl->cmd = (1 << 31) | 1; //one sample, asap
+ sr_rx_ctrl->time_secs = 0;
+ sr_rx_ctrl->time_ticks = 0; //latch the command
+
//struct udp_hdr *udp = (struct udp_hdr *)((char *)icmp + 28);
//printf("icmp port unr %d\n", udp->dest);
putchar('i');
diff --git a/firmware/microblaze/lib/pic.c b/firmware/microblaze/lib/pic.c
index e89d2b755..226da5f85 100644
--- a/firmware/microblaze/lib/pic.c
+++ b/firmware/microblaze/lib/pic.c
@@ -44,7 +44,7 @@ pic_init(void)
// uP is level triggered
pic_regs->mask = ~0; // mask all interrupts
- pic_regs->edge_enable = PIC_ONETIME_INT;
+ pic_regs->edge_enable = PIC_ONETIME_INT | PIC_UNDERRUN_INT | PIC_OVERRUN_INT | PIC_PPS_INT;
pic_regs->polarity = ~0 & ~PIC_PHY_INT; // rising edge
pic_regs->pending = ~0; // clear all pending ints
}
diff --git a/firmware/microblaze/usrp2/memory_map.h b/firmware/microblaze/usrp2/memory_map.h
index 41a2820bc..e7f41bc8d 100644
--- a/firmware/microblaze/usrp2/memory_map.h
+++ b/firmware/microblaze/usrp2/memory_map.h
@@ -463,6 +463,9 @@ typedef struct {
typedef struct {
volatile uint32_t num_chan;
volatile uint32_t clear_state; // clears out state machine, fifos,
+ volatile uint32_t report_sid;
+ volatile uint32_t policy;
+ volatile uint32_t cyc_per_up;
} sr_tx_ctrl_t;
#define sr_tx_ctrl ((sr_tx_ctrl_t *) _SR_ADDR(SR_TX_CTRL))