summaryrefslogtreecommitdiffstats
path: root/firmware/zpu
diff options
context:
space:
mode:
Diffstat (limited to 'firmware/zpu')
-rw-r--r--firmware/zpu/lib/clocks.c5
-rw-r--r--firmware/zpu/lib/u2_init.c2
2 files changed, 6 insertions, 1 deletions
diff --git a/firmware/zpu/lib/clocks.c b/firmware/zpu/lib/clocks.c
index c1e8ce827..bc1954e13 100644
--- a/firmware/zpu/lib/clocks.c
+++ b/firmware/zpu/lib/clocks.c
@@ -43,7 +43,10 @@ clocks_init(void)
//enable the 100MHz clock output to the FPGA for 50MHz CPU clock
clocks_enable_fpga_clk(true, 1);
- spi_wait();
+ //! Cannot SPI wait since SPI is on DSP clock
+ //! because DSP clock goes away until DCM reset.
+ //! However, spi is quick, the cpu is slow, its already ready...
+ //spi_wait();
//wait for the clock to stabilize
while(!clocks_lock_detect());
diff --git a/firmware/zpu/lib/u2_init.c b/firmware/zpu/lib/u2_init.c
index 71bd2c594..77c8c0722 100644
--- a/firmware/zpu/lib/u2_init.c
+++ b/firmware/zpu/lib/u2_init.c
@@ -51,6 +51,7 @@ u2_init(void)
hal_enable_ints();
// flash all leds to let us know board is alive
+#ifndef BOOTLOADER
hal_set_led_src(0x0, 0x1f); /* software ctrl */
hal_set_leds(0x0, 0x1f); mdelay(300);
hal_set_leds(LED_E, LED_E); mdelay(300);
@@ -61,6 +62,7 @@ u2_init(void)
hal_set_leds(0x0, 0x1f); mdelay(100);
hal_set_leds(blinks, 0x1f); mdelay(100);
}
+#endif
hal_set_led_src(0x1f & ~LED_D, 0x1f); /* hardware ctrl */
hal_set_leds(LED_D, 0x1f); // Leave one on