aboutsummaryrefslogtreecommitdiffstats
path: root/firmware/zpu/apps
diff options
context:
space:
mode:
Diffstat (limited to 'firmware/zpu/apps')
-rw-r--r--firmware/zpu/apps/blinkenlights.c28
-rw-r--r--firmware/zpu/apps/flash_test.c67
-rw-r--r--firmware/zpu/apps/hardware_testbed.c47
-rw-r--r--firmware/zpu/apps/txrx_uhd.c384
-rw-r--r--firmware/zpu/apps/uart_flash_loader.c169
5 files changed, 695 insertions, 0 deletions
diff --git a/firmware/zpu/apps/blinkenlights.c b/firmware/zpu/apps/blinkenlights.c
new file mode 100644
index 000000000..30cb33a7f
--- /dev/null
+++ b/firmware/zpu/apps/blinkenlights.c
@@ -0,0 +1,28 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2010 Ettus Research LLC
+ *
+ */
+
+#include "memory_map.h"
+#include <nonstdio.h>
+
+int main(int argc, char *argv[]) {
+
+ uint32_t c = 0;
+ uint8_t i = 0;
+
+ output_regs->led_src = 0;
+
+ while(1) {
+ //delay(5000000);
+ for(c=0;c<50000;c++) asm("NOP");
+ output_regs->leds = (i++ % 2) ? 0xFF : 0x00; //blink everything on that register
+ }
+
+ return 0;
+}
+
+//void delay(uint32_t t) {
+// while(t-- != 0) asm("NOP");
+//}
diff --git a/firmware/zpu/apps/flash_test.c b/firmware/zpu/apps/flash_test.c
new file mode 100644
index 000000000..5b4569030
--- /dev/null
+++ b/firmware/zpu/apps/flash_test.c
@@ -0,0 +1,67 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2010 Ettus Research LLC
+ *
+ */
+
+#include <memory_map.h>
+#include <hal_io.h>
+#include <hal_uart.h>
+#include <xilinx_s3_icap.h>
+#include <nonstdio.h>
+#include <spi_flash.h>
+#include <spi.h>
+#include <clocks.h>
+#include <string.h>
+
+//just a test to write to SPI flash and retrieve the same values.
+//uses the MOBFLEET SPI flash library
+
+void delay(uint32_t t) {
+ while(t-- != 0) asm("NOP");
+}
+
+int main(int argc, char *argv[]) {
+ uint16_t i, t;
+ uint8_t buf[260];
+ const uint8_t testdata[] = {0xDE, 0xAD, 0xBE, 0xEF, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C};
+
+ hal_disable_ints(); // In case we got here via jmp 0x0
+// spi_init();
+ hal_uart_init();
+// clocks_init(); //set up AD9510, enable FPGA clock @ 1x divisor
+
+ puts("SPI Flash test\n");
+ puts("Initializing SPI\n");
+
+ spif_init();
+ delay(800000);
+ puts("Erasing sector 1\n");
+ spi_flash_erase(0x00010000, 256);
+ delay(800000);
+ puts("Reading back data\n");
+ spi_flash_read(0x00010000, 256, buf);
+ delay(800000);
+
+ t=1;
+ for(i=4; i<250; i++) {
+ if(buf[i] != 0xFF) t=0;
+ }
+
+ if(!t) puts("Data was not initialized to 0xFF. Unsuccessful erase or read\n");
+ else puts("Data initialized to 0xFF, erase confirmed\n");
+
+ puts("Writing test buffer\n");
+ spi_flash_program(0x00010000, 16, testdata);
+ //memset(buf, 0, 256);
+
+ delay(800000);
+ puts("Wrote data, reading back\n");
+
+ spi_flash_read(0x00010000, 16, buf);
+
+ if(memcmp(testdata, buf, 16)) puts("Data is not the same between read and write. Unsuccessful write or read\n");
+ else puts("Successful write! Flash write correct\n");
+
+ return 0;
+}
diff --git a/firmware/zpu/apps/hardware_testbed.c b/firmware/zpu/apps/hardware_testbed.c
new file mode 100644
index 000000000..e68e68ff7
--- /dev/null
+++ b/firmware/zpu/apps/hardware_testbed.c
@@ -0,0 +1,47 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2010 Ettus Research LLC
+ *
+ */
+
+#include <memory_map.h>
+#include <nonstdio.h>
+#include <hal_io.h>
+#include <xilinx_s3_icap.h>
+#include <spi_flash.h>
+//#include <spi_flash_private.h>
+#include <clocks.h>
+#include <ihex.h>
+#include <bootloader_utils.h>
+#include <string.h>
+#include <hal_uart.h>
+#include <spi.h>
+
+//so this is just an evolving file used to set up and test different bits of hardware (EEPROM, clock chip, A/D, D/A, PHY)
+void delay(uint32_t t) {
+ while(t-- != 0) asm("NOP");
+}
+
+int main(int argc, char *argv[]) {
+
+ hal_disable_ints();
+ hal_uart_init();
+ spi_init();
+
+ puts("Hardware testbed. Init clocks...");
+
+ clocks_init();
+
+ //now, hopefully, we should be running at 100MHz instead of 50MHz, meaning our UART is twice as fast and we're talking at 230400.
+
+ while(1) {
+ delay(500000);
+ puts("Eat at Joe's.");
+ }
+
+
+
+
+
+ return 0;
+}
diff --git a/firmware/zpu/apps/txrx_uhd.c b/firmware/zpu/apps/txrx_uhd.c
new file mode 100644
index 000000000..4ccb585e2
--- /dev/null
+++ b/firmware/zpu/apps/txrx_uhd.c
@@ -0,0 +1,384 @@
+//
+// Copyright 2010-2011 Ettus Research LLC
+//
+/*
+ * Copyright 2007,2008 Free Software Foundation, Inc.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include <lwip/ip.h>
+#include <lwip/udp.h>
+#include "u2_init.h"
+#include "memory_map.h"
+#include "spi.h"
+#include "hal_io.h"
+#include "pic.h"
+#include <stdbool.h>
+#include "ethernet.h"
+#include "nonstdio.h"
+#include <net/padded_eth_hdr.h>
+#include <net_common.h>
+#include "memcpy_wa.h"
+#include <stddef.h>
+#include <stdlib.h>
+#include <string.h>
+#include "clocks.h"
+#include "usrp2/fw_common.h"
+#include <i2c.h>
+#include <ethertype.h>
+#include <arp_cache.h>
+#include "udp_fw_update.h"
+#include "pkt_ctrl.h"
+#include "banal.h"
+
+static void setup_network(void);
+
+// ----------------------------------------------------------------
+// the fast-path setup global variables
+// ----------------------------------------------------------------
+static eth_mac_addr_t fp_mac_addr_src, fp_mac_addr_dst;
+extern struct socket_address fp_socket_src, fp_socket_dst;
+
+static void handle_udp_err0_packet(
+ struct socket_address src, struct socket_address dst,
+ unsigned char *payload, int payload_len
+){
+ sr_udp_sm->err0_port = (((uint32_t)dst.port) << 16) | src.port;
+ printf("Storing for async error path:\n");
+ printf(" source udp port: %d\n", dst.port);
+ printf(" destination udp port: %d\n", src.port);
+ newline();
+}
+
+static void handle_udp_data_packet(
+ struct socket_address src, struct socket_address dst,
+ unsigned char *payload, int payload_len
+){
+ fp_mac_addr_src = *ethernet_mac_addr();
+ arp_cache_lookup_mac(&src.addr, &fp_mac_addr_dst);
+ fp_socket_src = dst;
+ fp_socket_dst = src;
+ sr_udp_sm->dsp0_port = (((uint32_t)dst.port) << 16) | src.port;
+ printf("Storing for fast path:\n");
+ printf(" source mac addr: ");
+ print_mac_addr(&fp_mac_addr_src); newline();
+ printf(" source ip addr: ");
+ print_ip_addr(&fp_socket_src.addr); newline();
+ printf(" source udp port: %d\n", fp_socket_src.port);
+ printf(" destination mac addr: ");
+ print_mac_addr(&fp_mac_addr_dst); newline();
+ printf(" destination ip addr: ");
+ print_ip_addr(&fp_socket_dst.addr); newline();
+ printf(" destination udp port: %d\n", fp_socket_dst.port);
+ newline();
+
+ //setup network
+ setup_network();
+
+}
+
+#define OTW_GPIO_BANK_TO_NUM(bank) \
+ (((bank) == USRP2_DIR_RX)? (GPIO_RX_BANK) : (GPIO_TX_BANK))
+
+static void handle_udp_ctrl_packet(
+ struct socket_address src, struct socket_address dst,
+ unsigned char *payload, int payload_len
+){
+ //printf("Got ctrl packet #words: %d\n", (int)payload_len);
+ const usrp2_ctrl_data_t *ctrl_data_in = (usrp2_ctrl_data_t *)payload;
+ uint32_t ctrl_data_in_id = ctrl_data_in->id;
+
+ //ensure that the protocol versions match
+ if (payload_len >= sizeof(uint32_t) && ctrl_data_in->proto_ver != USRP2_FW_COMPAT_NUM){
+ printf("!Error in control packet handler: Expected compatibility number %d, but got %d\n",
+ USRP2_FW_COMPAT_NUM, ctrl_data_in->proto_ver
+ );
+ ctrl_data_in_id = USRP2_CTRL_ID_WAZZUP_BRO;
+ }
+
+ //ensure that this is not a short packet
+ if (payload_len < sizeof(usrp2_ctrl_data_t)){
+ printf("!Error in control packet handler: Expected payload length %d, but got %d\n",
+ (int)sizeof(usrp2_ctrl_data_t), payload_len
+ );
+ ctrl_data_in_id = USRP2_CTRL_ID_HUH_WHAT;
+ }
+
+ //setup the output data
+ usrp2_ctrl_data_t ctrl_data_out;
+ ctrl_data_out.proto_ver = USRP2_FW_COMPAT_NUM;
+ ctrl_data_out.id=USRP2_CTRL_ID_HUH_WHAT;
+ ctrl_data_out.seq=ctrl_data_in->seq;
+
+ //handle the data based on the id
+ switch(ctrl_data_in_id){
+
+ /*******************************************************************
+ * Addressing
+ ******************************************************************/
+ case USRP2_CTRL_ID_WAZZUP_BRO:
+ ctrl_data_out.id = USRP2_CTRL_ID_WAZZUP_DUDE;
+ memcpy(&ctrl_data_out.data.ip_addr, get_ip_addr(), sizeof(struct ip_addr));
+ break;
+
+ /*******************************************************************
+ * SPI
+ ******************************************************************/
+ case USRP2_CTRL_ID_TRANSACT_ME_SOME_SPI_BRO:{
+ //transact
+ uint32_t result = spi_transact(
+ (ctrl_data_in->data.spi_args.readback == 0)? SPI_TXONLY : SPI_TXRX,
+ ctrl_data_in->data.spi_args.dev, //which device
+ ctrl_data_in->data.spi_args.data, //32 bit data
+ ctrl_data_in->data.spi_args.num_bits, //length in bits
+ (ctrl_data_in->data.spi_args.mosi_edge == USRP2_CLK_EDGE_RISE)? SPIF_PUSH_FALL : SPIF_PUSH_RISE |
+ (ctrl_data_in->data.spi_args.miso_edge == USRP2_CLK_EDGE_RISE)? SPIF_LATCH_RISE : SPIF_LATCH_FALL
+ );
+
+ //load output
+ ctrl_data_out.data.spi_args.data = result;
+ ctrl_data_out.id = USRP2_CTRL_ID_OMG_TRANSACTED_SPI_DUDE;
+ }
+ break;
+
+ /*******************************************************************
+ * I2C
+ ******************************************************************/
+ case USRP2_CTRL_ID_DO_AN_I2C_READ_FOR_ME_BRO:{
+ uint8_t num_bytes = ctrl_data_in->data.i2c_args.bytes;
+ i2c_read(
+ ctrl_data_in->data.i2c_args.addr,
+ ctrl_data_out.data.i2c_args.data,
+ num_bytes
+ );
+ ctrl_data_out.id = USRP2_CTRL_ID_HERES_THE_I2C_DATA_DUDE;
+ ctrl_data_out.data.i2c_args.bytes = num_bytes;
+ }
+ break;
+
+ case USRP2_CTRL_ID_WRITE_THESE_I2C_VALUES_BRO:{
+ uint8_t num_bytes = ctrl_data_in->data.i2c_args.bytes;
+ i2c_write(
+ ctrl_data_in->data.i2c_args.addr,
+ ctrl_data_in->data.i2c_args.data,
+ num_bytes
+ );
+ ctrl_data_out.id = USRP2_CTRL_ID_COOL_IM_DONE_I2C_WRITE_DUDE;
+ ctrl_data_out.data.i2c_args.bytes = num_bytes;
+ }
+ break;
+
+ /*******************************************************************
+ * Peek and Poke Register
+ ******************************************************************/
+ case USRP2_CTRL_ID_POKE_THIS_REGISTER_FOR_ME_BRO:
+ if (0){//ctrl_data_in->data.poke_args.addr < 0xC000){
+ printf("error! tried to poke into 0x%x\n", ctrl_data_in->data.poke_args.addr);
+ }
+ else switch(ctrl_data_in->data.poke_args.num_bytes){
+ case sizeof(uint32_t):
+ *((uint32_t *) ctrl_data_in->data.poke_args.addr) = (uint32_t)ctrl_data_in->data.poke_args.data;
+ break;
+
+ case sizeof(uint16_t):
+ *((uint16_t *) ctrl_data_in->data.poke_args.addr) = (uint16_t)ctrl_data_in->data.poke_args.data;
+ break;
+
+ case sizeof(uint8_t):
+ *((uint8_t *) ctrl_data_in->data.poke_args.addr) = (uint8_t)ctrl_data_in->data.poke_args.data;
+ break;
+
+ }
+ ctrl_data_out.id = USRP2_CTRL_ID_OMG_POKED_REGISTER_SO_BAD_DUDE;
+ break;
+
+ case USRP2_CTRL_ID_PEEK_AT_THIS_REGISTER_FOR_ME_BRO:
+ switch(ctrl_data_in->data.poke_args.num_bytes){
+ case sizeof(uint32_t):
+ ctrl_data_out.data.poke_args.data = *((uint32_t *) ctrl_data_in->data.poke_args.addr);
+ break;
+
+ case sizeof(uint16_t):
+ ctrl_data_out.data.poke_args.data = *((uint16_t *) ctrl_data_in->data.poke_args.addr);
+ break;
+
+ case sizeof(uint8_t):
+ ctrl_data_out.data.poke_args.data = *((uint8_t *) ctrl_data_in->data.poke_args.addr);
+ break;
+
+ }
+ ctrl_data_out.id = USRP2_CTRL_ID_WOAH_I_DEFINITELY_PEEKED_IT_DUDE;
+ break;
+
+ case USRP2_CTRL_ID_SO_LIKE_CAN_YOU_READ_THIS_UART_BRO:{
+ //executes a readline()-style read, up to num_bytes long, up to and including newline
+ int num_bytes = ctrl_data_in->data.uart_args.bytes;
+ if(num_bytes > 20) num_bytes = 20;
+ num_bytes = fngets_noblock(ctrl_data_in->data.uart_args.dev, (char *) ctrl_data_out.data.uart_args.data, num_bytes);
+ ctrl_data_out.id = USRP2_CTRL_ID_I_HELLA_READ_THAT_UART_DUDE;
+ ctrl_data_out.data.uart_args.bytes = num_bytes;
+ break;
+ }
+
+ case USRP2_CTRL_ID_HEY_WRITE_THIS_UART_FOR_ME_BRO:{
+ int num_bytes = ctrl_data_in->data.uart_args.bytes;
+ if(num_bytes > 20) num_bytes = 20;
+ //before we write to the UART, we flush the receive buffer
+ //this assumes that we're interested in the reply
+ hal_uart_rx_flush(ctrl_data_in->data.uart_args.dev);
+ fnputstr(ctrl_data_in->data.uart_args.dev, (char *) ctrl_data_in->data.uart_args.data, num_bytes);
+ ctrl_data_out.id = USRP2_CTRL_ID_MAN_I_TOTALLY_WROTE_THAT_UART_DUDE;
+ ctrl_data_out.data.uart_args.bytes = num_bytes;
+ break;
+ }
+
+ default:
+ ctrl_data_out.id = USRP2_CTRL_ID_HUH_WHAT;
+ }
+ send_udp_pkt(USRP2_UDP_CTRL_PORT, src, &ctrl_data_out, sizeof(ctrl_data_out));
+}
+
+static void handle_inp_packet(uint32_t *buff, size_t num_lines){
+
+ //test if its an ip recovery packet
+ typedef struct{
+ padded_eth_hdr_t eth_hdr;
+ char code[4];
+ union {
+ struct ip_addr ip_addr;
+ } data;
+ }recovery_packet_t;
+ recovery_packet_t *recovery_packet = (recovery_packet_t *)buff;
+ if (recovery_packet->eth_hdr.ethertype == 0xbeee && strncmp(recovery_packet->code, "addr", 4) == 0){
+ printf("Got ip recovery packet: "); print_ip_addr(&recovery_packet->data.ip_addr); newline();
+ set_ip_addr(&recovery_packet->data.ip_addr);
+ return;
+ }
+
+ //pass it to the slow-path handler
+ handle_eth_packet(buff, num_lines);
+}
+
+
+//------------------------------------------------------------------
+
+/*
+ * Called when eth phy state changes (w/ interrupts disabled)
+ */
+void link_changed_callback(int speed){
+ printf("\neth link changed: speed = %d\n", speed);
+ if (speed != 0){
+ hal_set_leds(LED_RJ45, LED_RJ45);
+ pkt_ctrl_set_routing_mode(PKT_CTRL_ROUTING_MODE_MASTER);
+ send_gratuitous_arp();
+ }
+ else{
+ hal_set_leds(0x0, LED_RJ45);
+ pkt_ctrl_set_routing_mode(PKT_CTRL_ROUTING_MODE_SLAVE);
+ }
+}
+
+static void setup_network(void){
+
+ //setup ethernet header machine
+ sr_udp_sm->eth_hdr.mac_dst_0_1 = (fp_mac_addr_dst.addr[0] << 8) | fp_mac_addr_dst.addr[1];
+ sr_udp_sm->eth_hdr.mac_dst_2_3 = (fp_mac_addr_dst.addr[2] << 8) | fp_mac_addr_dst.addr[3];
+ sr_udp_sm->eth_hdr.mac_dst_4_5 = (fp_mac_addr_dst.addr[4] << 8) | fp_mac_addr_dst.addr[5];
+ sr_udp_sm->eth_hdr.mac_src_0_1 = (fp_mac_addr_src.addr[0] << 8) | fp_mac_addr_src.addr[1];
+ sr_udp_sm->eth_hdr.mac_src_2_3 = (fp_mac_addr_src.addr[2] << 8) | fp_mac_addr_src.addr[3];
+ sr_udp_sm->eth_hdr.mac_src_4_5 = (fp_mac_addr_src.addr[4] << 8) | fp_mac_addr_src.addr[5];
+ sr_udp_sm->eth_hdr.ether_type = ETHERTYPE_IPV4;
+
+ //setup ip header machine
+ unsigned int chksum = 0;
+ sr_udp_sm->ip_hdr.ver_ihl_tos = CHKSUM(0x4500, &chksum); // IPV4, 5 words of header (20 bytes), TOS=0
+ sr_udp_sm->ip_hdr.total_length = UDP_SM_INS_IP_LEN; // Don't checksum this line in SW
+ sr_udp_sm->ip_hdr.identification = CHKSUM(0x0000, &chksum); // ID
+ sr_udp_sm->ip_hdr.flags_frag_off = CHKSUM(0x4000, &chksum); // don't fragment
+ sr_udp_sm->ip_hdr.ttl_proto = CHKSUM(0x2011, &chksum); // TTL=32, protocol = UDP (17 decimal)
+ //sr_udp_sm->ip_hdr.checksum .... filled in below
+ uint32_t src_ip_addr = fp_socket_src.addr.addr;
+ uint32_t dst_ip_addr = fp_socket_dst.addr.addr;
+ sr_udp_sm->ip_hdr.src_addr_high = CHKSUM(src_ip_addr >> 16, &chksum); // IP src high
+ sr_udp_sm->ip_hdr.src_addr_low = CHKSUM(src_ip_addr & 0xffff, &chksum); // IP src low
+ sr_udp_sm->ip_hdr.dst_addr_high = CHKSUM(dst_ip_addr >> 16, &chksum); // IP dst high
+ sr_udp_sm->ip_hdr.dst_addr_low = CHKSUM(dst_ip_addr & 0xffff, &chksum); // IP dst low
+ sr_udp_sm->ip_hdr.checksum = UDP_SM_INS_IP_HDR_CHKSUM | (chksum & 0xffff);
+
+ //setup the udp header machine
+ sr_udp_sm->udp_hdr.src_port = UDP_SM_INS_UDP_SRC_PORT;
+ sr_udp_sm->udp_hdr.dst_port = UDP_SM_INS_UDP_DST_PORT;
+ sr_udp_sm->udp_hdr.length = UDP_SM_INS_UDP_LEN;
+ sr_udp_sm->udp_hdr.checksum = UDP_SM_LAST_WORD; // zero UDP checksum
+}
+
+int
+main(void)
+{
+ u2_init();
+
+ putstr("\nTxRx-UHD-ZPU\n");
+ print_mac_addr(ethernet_mac_addr()); newline();
+ print_ip_addr(get_ip_addr()); newline();
+ printf("FPGA compatibility number: %d\n", USRP2_FPGA_COMPAT_NUM);
+ printf("Firmware compatibility number: %d\n", USRP2_FW_COMPAT_NUM);
+
+ //1) register the addresses into the network stack
+ register_addrs(ethernet_mac_addr(), get_ip_addr());
+ pkt_ctrl_program_inspector(get_ip_addr(), USRP2_UDP_DATA_PORT);
+
+ //2) register callbacks for udp ports we service
+ init_udp_listeners();
+ register_udp_listener(USRP2_UDP_CTRL_PORT, handle_udp_ctrl_packet);
+ register_udp_listener(USRP2_UDP_DATA_PORT, handle_udp_data_packet);
+ register_udp_listener(USRP2_UDP_ERR0_PORT, handle_udp_err0_packet);
+#ifdef USRP2P
+ register_udp_listener(USRP2_UDP_UPDATE_PORT, handle_udp_fw_update_packet);
+#endif
+
+ //3) set the routing mode to slave to set defaults
+ pkt_ctrl_set_routing_mode(PKT_CTRL_ROUTING_MODE_SLAVE);
+
+ //4) setup ethernet hardware to bring the link up
+ ethernet_register_link_changed_callback(link_changed_callback);
+ ethernet_init();
+
+ while(true){
+
+ size_t num_lines;
+ void *buff = pkt_ctrl_claim_incoming_buffer(&num_lines);
+ if (buff != NULL){
+ handle_inp_packet((uint32_t *)buff, num_lines);
+ pkt_ctrl_release_incoming_buffer();
+ }
+
+ pic_interrupt_handler();
+ int pending = pic_regs->pending; // poll for under or overrun
+
+ if (pending & PIC_UNDERRUN_INT){
+ pic_regs->pending = PIC_UNDERRUN_INT; // clear interrupt
+ putchar('U');
+ }
+
+ if (pending & PIC_OVERRUN_INT){
+ pic_regs->pending = PIC_OVERRUN_INT; // clear interrupt
+ putchar('O');
+ }
+ }
+}
diff --git a/firmware/zpu/apps/uart_flash_loader.c b/firmware/zpu/apps/uart_flash_loader.c
new file mode 100644
index 000000000..4ec89284a
--- /dev/null
+++ b/firmware/zpu/apps/uart_flash_loader.c
@@ -0,0 +1,169 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2010 Ettus Research LLC
+ *
+ */
+
+//#include <stdio.h>
+#include <stdlib.h>
+#include <memory_map.h>
+#include <nonstdio.h>
+#include <hal_io.h>
+#include <hal_uart.h>
+#include <xilinx_s3_icap.h>
+#include <spi_flash.h>
+#include <spi_flash_private.h>
+//#include <clocks.h>
+#include <ihex.h>
+#include <bootloader_utils.h>
+
+//uses UART to load files to Flash in Intel HEX 16-bit format.
+//this is one example of a "safe" firmware image to be loaded by a bootloader into main RAM.
+//this CANNOT write to main RAM, since it is resident there.
+
+//Sector 0-31: Safe FPGA bootloader image
+//Sector 32-63: Production bootloader image
+//Sector 64: Production firmware image
+//Sector 127: Safe firmware image
+
+
+void uart_flash_loader(void) {
+
+ char buf[256]; //input data buffer
+ uint8_t ihx[32]; //ihex data buffer
+ uint32_t slot_offset = PROD_FW_IMAGE_LOCATION_ADDR; //initial slot offset to program to.
+ uint32_t extended_addr = 0x00000000; //extended Intel hex segment address
+
+ size_t sector_size = spi_flash_log2_sector_size();
+ ihex_record_t ihex_record;
+ ihex_record.data = ihx;
+ int i;
+
+
+ //not gonna win a turing prize for my C text parsing
+ while(1) {
+ gets(buf);
+ if(!strncmp(buf, "!SECTORSIZE", 7)) { //return the sector size in log format
+ putstr("OK ");
+ puthex8((uint32_t) sector_size); //err, this should probably be decimal for human readability. we do have itoa now...
+ putstr("\n");
+ }
+ else if(!strncmp(buf, "!SETADDR", 7)) { //set start address for programming
+ slot_offset = atol(&buf[8]);
+ puts("OK");
+// puthex32(slot_offset);
+// putstr("\n");
+ }
+ else if(!strncmp(buf, "!ERASE", 6)) { //erase a sector
+ uint32_t sector = atol(&buf[6]);
+ uint32_t size = 2 << (sector_size-1);
+ uint32_t addr = sector << sector_size;
+
+ spi_flash_erase(addr, size); //we DO NOT implement write protection here. it is up to the HOST PROGRAM to not issue an ERASE unless it means it.
+ //unfortunately the Flash cannot write-protect the segments that really matter, so we only use global write-protect
+ //as a means of avoiding accidental writes from runaway code / garbage on the SPI bus.
+ puts("OK");
+ }
+//can't exactly run firmware if you're already executing out of main RAM
+/* else if(!strncmp(buf, "!RUNSFW", 7)) {
+ if(is_valid_fw_image(SAFE_FW_IMAGE_LOCATION_ADDR)) {
+ puts("OK");
+ spi_flash_read(SAFE_FW_IMAGE_LOCATION_ADDR, FW_IMAGE_SIZE_BYTES, (void *)RAM_BASE);
+ start_program(RAM_BASE);
+ } else {
+ puts("NOK");
+ }
+ }
+ else if(!strncmp(buf, "!RUNPFW", 7)) {
+ if(is_valid_fw_image(PROD_FW_IMAGE_LOCATION_ADDR)) {
+ puts("OK");
+ spi_flash_read(PROD_FW_IMAGE_LOCATION_ADDR, FW_IMAGE_SIZE_BYTES-1, (void *)RAM_BASE);
+ start_program(RAM_BASE);
+ } else {
+ puts("NOK");
+ }
+ }
+*/
+ else if(!strncmp(buf, "!RUNPFPGA", 8)) {
+ if(is_valid_fpga_image(PROD_FPGA_IMAGE_LOCATION_ADDR)) {
+ puts("OK");
+ //icap_reload_fpga(PROD_FPGA_IMAGE_LOCATION_ADDR);
+ } else {
+ puts("NOK");
+ }
+ }
+ else if(!strncmp(buf, "!RUNSFPGA", 8)) {
+ if(is_valid_fpga_image(SAFE_FPGA_IMAGE_LOCATION_ADDR)) {
+ puts("OK");
+ //icap_reload_fpga(SAFE_FPGA_IMAGE_LOCATION_ADDR);
+ } else {
+ puts("NOK");
+ }
+ }
+ else if(!strncmp(buf, "!READ", 5)) {
+ uint32_t addr = atol(&buf[5]);
+ spi_flash_read(addr, 16, ihx);
+ for(i=0; i < 16; i++) {
+ puthex8(ihx[i]);
+ }
+ putstr("\n");
+ }
+
+ else if(!ihex_parse(buf, &ihex_record)) { //last, try to see if the input was a valid IHEX line
+ switch (ihex_record.type) {
+ case 0:
+ spi_flash_program(ihex_record.addr + slot_offset + extended_addr, ihex_record.length, ihex_record.data);
+ puts("OK");
+ break;
+ case 1:
+ //here we would expect a CRC checking or something else to take place. for now we do nothing.
+ //well, we set the extended segment addr back to 0
+ extended_addr = 0;
+ puts("DONE");
+ break;
+ case 4:
+ //set the upper 16 bits of the address
+ extended_addr = ((ihex_record.data[0] << 8) + ihex_record.data[1]) << 16;
+ puts("OK");
+ break;
+ default:
+ puts("NOK");
+ }
+ }
+ else puts("NOK");
+ } //while(1)
+}
+
+void delay(uint32_t t) {
+ while(t-- != 0) asm("NOP");
+}
+
+int main(int argc, char *argv[]) {
+ //uint8_t buf[32];
+ //int i = 0;
+
+ hal_disable_ints(); // In case we got here via jmp 0x0
+
+// delay(10000000);
+
+ //before anything else you might want to blinkenlights just to indicate code startup to the user.
+
+ hal_uart_init();
+ spif_init();
+// i2c_init(); //for EEPROM
+ puts("USRP2+ UART firmware loader");
+
+// puts("Debug: loading production image, 10 bytes.");
+
+// spi_flash_read(PROD_FW_IMAGE_LOCATION_ADDR, 10, buf);
+// for(i=0; i < 10; i++) {
+// puthex8(buf[i]);
+// }
+
+ uart_flash_loader();
+
+ //shouldn't get here. should reboot.
+ puts("shit happened.\n");
+
+ return 0;
+}
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-06 06:35:25 +0000