aboutsummaryrefslogtreecommitdiffstats
path: root/firmware/usrp3/include
diff options
context:
space:
mode:
Diffstat (limited to 'firmware/usrp3/include')
-rw-r--r--firmware/usrp3/include/cron.h75
-rw-r--r--firmware/usrp3/include/flash/spi_flash.h92
-rw-r--r--firmware/usrp3/include/flash/spif_spsn_s25flxx.h39
-rw-r--r--firmware/usrp3/include/fw_comm_protocol.h99
-rw-r--r--firmware/usrp3/include/mdelay.h29
-rw-r--r--firmware/usrp3/include/trace.h1
-rw-r--r--firmware/usrp3/include/wb_soft_reg.h135
-rw-r--r--firmware/usrp3/include/wb_spi.h55
8 files changed, 496 insertions, 29 deletions
diff --git a/firmware/usrp3/include/cron.h b/firmware/usrp3/include/cron.h
new file mode 100644
index 000000000..2d43d97f5
--- /dev/null
+++ b/firmware/usrp3/include/cron.h
@@ -0,0 +1,75 @@
+//
+// Copyright 2014 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program. If not, see <http://www.gnu.org/licenses/>.
+//
+
+#ifndef INCLUDED_CRON_H
+#define INCLUDED_CRON_H
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#define CRON_MAX_JOBS 4
+
+typedef enum {
+ SEC = 1, MILLISEC = 1000, MICROSEC = 1000000
+} cron_time_unit_t;
+
+typedef uint32_t (*cron_counter_fetcher_t)();
+
+/*!
+ * \brief Initialize cron subsystem with a mechanism to fetch a counter and its frequency
+ */
+void cron_init(const cron_counter_fetcher_t fetch_counter, uint32_t counter_freq);
+
+/*!
+ * \brief Get the hardware tick count
+ */
+uint32_t cron_get_ticks();
+
+/*!
+ * \brief Get the time elapsed between start and stop in the specified units
+ */
+uint32_t get_elapsed_time(uint32_t start_ticks, uint32_t stop_ticks, cron_time_unit_t unit);
+
+/*!
+ * \brief Sleep (spinloop) for about 'ticks' counter ticks
+ * Use only if simulating, _very_ short delay
+ */
+void sleep_ticks(uint32_t ticks);
+
+/*!
+ * \brief Sleep (spinloop) for about 'duration' microseconds
+ * Use only if simulating, _very_ short delay
+ */
+void sleep_us(uint32_t duration);
+
+/*!
+ * \brief Sleep (spinloop) for about 'duration' milliseconds
+ * Use only if simulating, _very_ short delay
+ */
+void sleep_ms(uint32_t duration);
+
+/*!
+ * \brief Initialize a unique cron job with 'job_id' and interval 'interval_ms'
+ */
+void cron_job_init(uint32_t job_id, uint32_t interval_ms);
+
+/*!
+ * \brief Check if cron job with 'job_id' is due for execution
+ */
+bool cron_job_run_due(uint32_t job_id);
+
+#endif /* INCLUDED_CRON_H */
diff --git a/firmware/usrp3/include/flash/spi_flash.h b/firmware/usrp3/include/flash/spi_flash.h
new file mode 100644
index 000000000..8ed73f648
--- /dev/null
+++ b/firmware/usrp3/include/flash/spi_flash.h
@@ -0,0 +1,92 @@
+/*
+ * Copyright 2014 Free Software Foundation, Inc.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef INCLUDED_SPI_FLASH
+#define INCLUDED_SPI_FLASH
+
+#include <wb_spi.h>
+
+//Device class that encapsulates the geometry and control
+//interface for the flash chip
+typedef struct {
+ uint32_t page_size; //in bytes
+ uint32_t sector_size; //in bytes
+ uint32_t num_sectors;
+ const wb_spi_slave_t* bus;
+} spi_flash_dev_t;
+
+//Low level device specific operations
+typedef uint16_t (*spif_read_id_fn_t)(const spi_flash_dev_t* flash);
+typedef void (*spif_read_fn_t)(const spi_flash_dev_t* flash, uint32_t offset, void *buf, uint32_t num_bytes);
+typedef bool (*spif_erase_sector_dispatch_fn_t)(const spi_flash_dev_t* flash, uint32_t offset);
+typedef bool (*spif_erase_sector_commit_fn_t)(const spi_flash_dev_t* flash, uint32_t offset);
+typedef bool (*spif_erase_sector_busy_fn_t)(const spi_flash_dev_t* flash);
+typedef bool (*spif_write_page_dispatch_fn_t)(const spi_flash_dev_t* flash, uint32_t offset, const void *buf, uint32_t num_bytes);
+typedef bool (*spif_write_page_commit_fn_t)(const spi_flash_dev_t* flash, uint32_t offset, const void *buf, uint32_t num_bytes);
+typedef bool (*spif_write_page_busy_fn_t)(const spi_flash_dev_t* flash);
+
+//Interface struct for all low level device operations
+typedef struct {
+ spif_read_id_fn_t read_id;
+ spif_read_fn_t read;
+ spif_erase_sector_dispatch_fn_t erase_sector_dispatch;
+ spif_erase_sector_commit_fn_t erase_sector_commit;
+ spif_erase_sector_busy_fn_t erase_sector_busy;
+ spif_write_page_dispatch_fn_t write_page_dispatch;
+ spif_write_page_commit_fn_t write_page_commit;
+ spif_write_page_busy_fn_t write_page_busy;
+} spi_flash_ops_t;
+
+typedef enum {
+ IDLE, WRITE_IN_PROGRESS, ERASE_IN_PROGRESS
+} spi_flash_state_t;
+
+//A session struct that encapsulates everything about the flash
+//in a device agnostic way
+typedef struct {
+ const spi_flash_dev_t* device;
+ const spi_flash_ops_t* ops;
+ spi_flash_state_t state;
+ uint32_t last_offset;
+ uint16_t id;
+} spi_flash_session_t;
+
+/*!
+ * Initialize the spi_flash_session_t object
+ */
+void spif_init(spi_flash_session_t* flash, const spi_flash_dev_t* device, const spi_flash_ops_t* ops);
+
+/*!
+ * Read "num_bytes" from "offset" in the flash into the buffer "buf".
+ * This call will block until all data is available.
+ */
+void spif_read_sync(const spi_flash_session_t* flash, uint32_t offset, void *buf, uint32_t num_bytes);
+
+/*!
+ * Erase sector at "offset" in the flash.
+ * This call will block until the erase is complete.
+ */
+bool spif_erase_sector_sync(const spi_flash_session_t* flash, uint32_t offset);
+
+/*!
+ * Write "num_bytes" from buffer "buf" at "offset" in the flash.
+ * This call will block until the write is complete.
+ */
+bool spif_write_page_sync(const spi_flash_session_t* flash, uint32_t offset, const void *buf, uint32_t num_bytes);
+
+
+#endif /* INCLUDED_SPI_FLASH */
diff --git a/firmware/usrp3/include/flash/spif_spsn_s25flxx.h b/firmware/usrp3/include/flash/spif_spsn_s25flxx.h
new file mode 100644
index 000000000..1e6eededf
--- /dev/null
+++ b/firmware/usrp3/include/flash/spif_spsn_s25flxx.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright 2014 Free Software Foundation, Inc.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef INCLUDED_SPIF_SPSN_S25FLXX_H
+#define INCLUDED_SPIF_SPSN_S25FLXX_H
+
+#include <flash/spi_flash.h>
+
+const spi_flash_ops_t* spif_spsn_s25flxx_operations();
+
+uint16_t spif_spsn_s25flxx_read_id(const spi_flash_dev_t* flash);
+
+void spif_spsn_s25flxx_read(const spi_flash_dev_t* flash, uint32_t offset, void *buf, uint32_t num_bytes);
+
+bool spif_spsn_s25flxx_erase_sector_dispatch(const spi_flash_dev_t* flash, uint32_t offset);
+
+bool spif_spsn_s25flxx_erase_sector_commit(const spi_flash_dev_t* flash, uint32_t offset);
+
+bool spif_spsn_s25flxx_write_page_dispatch(const spi_flash_dev_t* flash, uint32_t offset, const void *buf, uint32_t num_bytes);
+
+bool spif_spsn_s25flxx_write_page_commit(const spi_flash_dev_t* flash, uint32_t offset, const void *buf, uint32_t num_bytes);
+
+bool spif_spsn_s25flxx_device_busy(const spi_flash_dev_t* flash);
+
+#endif /* INCLUDED_SPIF_SPSN_S25FLXX_H */
diff --git a/firmware/usrp3/include/fw_comm_protocol.h b/firmware/usrp3/include/fw_comm_protocol.h
new file mode 100644
index 000000000..5f0fc0768
--- /dev/null
+++ b/firmware/usrp3/include/fw_comm_protocol.h
@@ -0,0 +1,99 @@
+//
+// Copyright 2014 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program. If not, see <http://www.gnu.org/licenses/>.
+//
+
+#ifndef INCLUDED_FW_COMM_PROTOCOL
+#define INCLUDED_FW_COMM_PROTOCOL
+
+#include <stdint.h>
+#ifndef __cplusplus
+#include <stdbool.h>
+#endif
+
+/*!
+ * Structs and constants for communication between firmware and host.
+ * This header is shared by the firmware and host code.
+ * Therefore, this header may only contain valid C code.
+ */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define FW_COMM_PROTOCOL_SIGNATURE 0xACE3
+#define FW_COMM_PROTOCOL_VERSION 0
+#define FW_COMM_MAX_DATA_WORDS 16
+#define FW_COMM_PROTOCOL_MTU 256
+
+#define FW_COMM_FLAGS_ACK 0x00000001
+#define FW_COMM_FLAGS_CMD_MASK 0x00000FF0
+#define FW_COMM_FLAGS_ERROR_MASK 0xFF000000
+
+#define FW_COMM_CMD_ECHO 0x00000000
+#define FW_COMM_CMD_POKE32 0x00000010
+#define FW_COMM_CMD_PEEK32 0x00000020
+#define FW_COMM_CMD_BLOCK_POKE32 0x00000030
+#define FW_COMM_CMD_BLOCK_PEEK32 0x00000040
+
+#define FW_COMM_ERR_PKT_ERROR 0x80000000
+#define FW_COMM_ERR_CMD_ERROR 0x40000000
+#define FW_COMM_ERR_SIZE_ERROR 0x20000000
+
+#define FW_COMM_GENERATE_ID(prod) ((((uint32_t) FW_COMM_PROTOCOL_SIGNATURE) << 0) | \
+ (((uint32_t) prod) << 16) | \
+ (((uint32_t) FW_COMM_PROTOCOL_VERSION) << 24))
+#define FW_COMM_GET_PRODUCT_ID(id) ((uint8_t)(id >> 16))
+#define FW_COMM_GET_PROTOCOL_VER(id) ((uint8_t)(id >> 24))
+
+typedef struct
+{
+ uint32_t id; //Protocol and device identifier
+ uint32_t flags; //Holds commands and ack messages
+ uint32_t sequence; //Sequence number (specific to FW communication transactions)
+ uint32_t data_words; //Number of data words in payload
+ uint32_t addr; //Address field for the command in flags
+ uint32_t data[FW_COMM_MAX_DATA_WORDS]; //Data field for the command in flags
+} fw_comm_pkt_t;
+
+#ifdef __cplusplus
+} //extern "C"
+#endif
+
+// The following definitions are only useful in firmware. Exclude in host code.
+#ifndef __cplusplus
+
+typedef void (*poke32_func)(const uint32_t addr, const uint32_t data);
+typedef uint32_t (*peek32_func)(const uint32_t addr);
+
+/*!
+ * Process a firmware communication packet and compute a response.
+ * Args:
+ * - (in) request: Pointer to the request struct
+ * - (out) response: Pointer to the response struct
+ * - (in) product_id: The 8-bit usrp3 specific product ID (for request filtering)
+ * - (func) poke_callback, peek_callback: Callback functions for a single peek/poke
+ * - return value: Send a response packet
+ */
+bool process_fw_comm_protocol_pkt(
+ const fw_comm_pkt_t* request,
+ fw_comm_pkt_t* response,
+ uint8_t product_id,
+ poke32_func poke_callback,
+ peek32_func peek_callback
+);
+
+#endif //ifdef __cplusplus
+
+#endif /* INCLUDED_FW_COMM_PROTOCOL */
diff --git a/firmware/usrp3/include/mdelay.h b/firmware/usrp3/include/mdelay.h
deleted file mode 100644
index 226bbb3f7..000000000
--- a/firmware/usrp3/include/mdelay.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/* -*- c -*- */
-/*
- * Copyright 2007 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef INCLUDED_MDELAY_H
-#define INCLUDED_MDELAY_H
-
-/*!
- * \brief Delay about ms milliseconds
- *
- * If simulating, _very_ short delay
- */
-void mdelay(int ms);
-
-#endif /* INCLUDED_MDELAY_H */
diff --git a/firmware/usrp3/include/trace.h b/firmware/usrp3/include/trace.h
index 0daa231fe..015ae9049 100644
--- a/firmware/usrp3/include/trace.h
+++ b/firmware/usrp3/include/trace.h
@@ -31,6 +31,7 @@
* An alternate way of defining the level is the "TRACE_LEVEL"
* variable in cmake. (eg. -DTRACE_LEVEL=13).
*/
+
//#define UHD_FW_TRACE_LEVEL 13
typedef enum
diff --git a/firmware/usrp3/include/wb_soft_reg.h b/firmware/usrp3/include/wb_soft_reg.h
new file mode 100644
index 000000000..df23eed83
--- /dev/null
+++ b/firmware/usrp3/include/wb_soft_reg.h
@@ -0,0 +1,135 @@
+//
+// Copyright 2014 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program. If not, see <http://www.gnu.org/licenses/>.
+//
+
+#ifndef INCLUDED_SOFT_REG_H
+#define INCLUDED_SOFT_REG_H
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <wb_utils.h>
+
+/* Keeps track of all metadata associated with a soft register.
+ * Use this struct when you need to manage a hardware register that needs
+ * to be accessed from different sections of software. If a register contains
+ * several unrelated bitfields, this object can be used to ensure coherency.
+ * It is recommended that the client hold this as a global/static object.
+ */
+typedef struct
+{
+ uint32_t wr_addr;
+ uint32_t rd_addr;
+ uint32_t soft_copy;
+} soft_reg_t;
+
+/* A register field is defined as a tuple of the mask and the shift.
+ * It can be used to make read-modify-write operations more convenient
+ * For efficiency reasons, it is recommended to always use a constant
+ * of this type because it will get optimized out by the compiler and
+ * will result in zero memory overhead
+ */
+typedef struct
+{
+ uint8_t num_bits;
+ uint8_t shift;
+} soft_reg_field_t;
+
+
+/*!
+ * Initialize the soft_reg_t struct as a read-write register.
+ * Params:
+ * - reg: Pointer to the soft_reg struct
+ * - wr_addr: The address used to flush the register to HW
+ * - rd_addr: The address used to read the register from HW
+ */
+inline void initialize_readwrite_soft_reg(soft_reg_t* reg, uint32_t wr_addr, uint32_t rd_addr)
+{
+ reg->wr_addr = wr_addr;
+ reg->rd_addr = rd_addr;
+ reg->soft_copy = 0;
+}
+
+/*!
+ * Initialize the soft_reg_t struct as a write-only register.
+ * Params:
+ * - reg: Pointer to the soft_reg struct
+ * - addr: The address used to flush the register to HW
+ */
+inline void initialize_writeonly_soft_reg(soft_reg_t* reg, uint32_t addr)
+{
+ reg->wr_addr = addr;
+ reg->rd_addr = 0;
+ reg->soft_copy = 0;
+}
+
+/*!
+ * Update specified field in the soft-copy with the arg value.
+ * Performs a read-modify-write operation so all other field are preserved.
+ * NOTE: This does not write the value to hardware.
+ */
+inline void soft_reg_set(soft_reg_t* reg, const soft_reg_field_t field, const uint32_t field_value)
+{
+ const uint32_t mask = ((1<<field.num_bits)-1)<<field.shift;
+ reg->soft_copy = (reg->soft_copy & ~mask) | ((field_value << field.shift) & mask);
+}
+
+/*!
+ * Write the contents of the soft-copy to hardware.
+ */
+inline void soft_reg_flush(const soft_reg_t* reg)
+{
+ wb_poke32(reg->wr_addr, reg->soft_copy);
+}
+
+/*!
+ * Shortcut for a set and a flush.
+ */
+inline void soft_reg_write(soft_reg_t* reg, const soft_reg_field_t field, const uint32_t field_value)
+{
+ soft_reg_set(reg, field, field_value);
+ soft_reg_flush(reg);
+}
+
+/*!
+ * Get the value of the specified field from the soft-copy.
+ * NOTE: This does not read anything from hardware.
+ */
+inline uint32_t soft_reg_get(const soft_reg_t* reg, const soft_reg_field_t field)
+{
+ const uint32_t mask = ((1<<field.num_bits)-1)<<field.shift;
+ return (reg->soft_copy & mask) >> field.shift;
+}
+
+/*!
+ * Read the contents of the register from hardware and update the soft copy.
+ */
+inline void soft_reg_refresh(soft_reg_t* reg)
+{
+ if (reg->rd_addr) {
+ reg->soft_copy = wb_peek32(reg->rd_addr);
+ }
+}
+
+/*!
+ * Shortcut for refresh and get
+ */
+inline uint32_t soft_reg_read(soft_reg_t* reg, const soft_reg_field_t field)
+{
+ soft_reg_refresh(reg);
+ return soft_reg_get(reg, field);
+}
+
+#endif /* INCLUDED_SOFT_REG_H */
diff --git a/firmware/usrp3/include/wb_spi.h b/firmware/usrp3/include/wb_spi.h
new file mode 100644
index 000000000..ebbb20b16
--- /dev/null
+++ b/firmware/usrp3/include/wb_spi.h
@@ -0,0 +1,55 @@
+
+// Copyright 2012 Ettus Research LLC
+
+#ifndef INCLUDED_WB_SPI_H
+#define INCLUDED_WB_SPI_H
+
+#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+
+typedef enum {
+ WRITE, WRITE_READ
+} wb_spi_rw_mode_t;
+
+typedef enum {
+ RISING, FALLING
+} wb_spi_edge_t;
+
+typedef struct {
+ void* base;
+ uint32_t slave_sel;
+ uint32_t clk_div;
+ wb_spi_edge_t mosi_edge;
+ wb_spi_edge_t miso_edge;
+ bool lsb_first;
+} wb_spi_slave_t;
+
+/*!
+ * \brief Initialize SPI slave device
+ */
+void wb_spi_init(const wb_spi_slave_t* slave);
+
+/*!
+ * \brief Perform a SPI transaction in auto chip-select mode.
+ */
+inline void wb_spi_transact(const wb_spi_slave_t* slave,
+ wb_spi_rw_mode_t rw_mode, const void* mosi_buf, void* miso_buf, uint32_t length);
+
+/*!
+ * \brief Perform a SPI transaction in manual chip-select mode.
+ */
+inline void wb_spi_transact_man_ss(const wb_spi_slave_t* slave,
+ wb_spi_rw_mode_t rw_mode, const void* mosi_buf, void* miso_buf, uint32_t length);
+
+/*!
+ * \brief Select SPI slave
+ */
+void wb_spi_slave_select(const wb_spi_slave_t* slave);
+
+/*!
+ * \brief Deselect SPI slave
+ */
+void wb_spi_slave_deselect(const wb_spi_slave_t* slave);
+
+#endif /* INCLUDED_WB_SPI_H */