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-rw-r--r--firmware/microblaze/lib/Makefile.am14
-rw-r--r--firmware/microblaze/lib/db_base.h69
-rw-r--r--firmware/microblaze/lib/db_basic.c161
-rw-r--r--firmware/microblaze/lib/db_dbsrx.c395
-rw-r--r--firmware/microblaze/lib/db_init.c97
-rw-r--r--firmware/microblaze/lib/db_rfx.c590
-rw-r--r--firmware/microblaze/lib/db_tvrx.c244
-rw-r--r--firmware/microblaze/lib/db_xcvr2450.c496
8 files changed, 22 insertions, 2044 deletions
diff --git a/firmware/microblaze/lib/Makefile.am b/firmware/microblaze/lib/Makefile.am
index 9119a4391..0f5a5298c 100644
--- a/firmware/microblaze/lib/Makefile.am
+++ b/firmware/microblaze/lib/Makefile.am
@@ -20,7 +20,6 @@ include $(top_srcdir)/Makefile.common
noinst_LIBRARIES = \
libu2fw.a
-
libu2fw_a_SOURCES = \
abort.c \
ad9510.c \
@@ -28,12 +27,7 @@ libu2fw_a_SOURCES = \
bsm12.c \
buffer_pool.c \
clocks.c \
- db_basic.c \
- db_dbsrx.c \
db_init.c \
- db_rfx.c \
- db_tvrx.c \
- db_xcvr2450.c \
dbsm.c \
eeprom.c \
ethernet.c \
@@ -57,8 +51,7 @@ libu2fw_a_SOURCES = \
printf.c \
sd.c \
spi.c \
- u2_init.c
-
+ u2_init.c
noinst_HEADERS = \
ad9510.h \
@@ -68,7 +61,6 @@ noinst_HEADERS = \
buffer_pool.h \
clocks.h \
db.h \
- db_base.h \
dbsm.h \
eth_mac.h \
eth_mac_regs.h \
@@ -92,7 +84,7 @@ noinst_HEADERS = \
stdio.h \
u2_init.h \
usrp2_bytesex.h \
- wb16550.h
+ wb16550.h
EXTRA_DIST = \
- microblaze.ld
+ microblaze.ld
diff --git a/firmware/microblaze/lib/db_base.h b/firmware/microblaze/lib/db_base.h
deleted file mode 100644
index 8144c8560..000000000
--- a/firmware/microblaze/lib/db_base.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2008,2009 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef INCLUDED_DB_BASE_H
-#define INCLUDED_DB_BASE_H
-
-#include <usrp2_types.h>
-#include <stdbool.h>
-
-/*!
- * \brief "base class" for firmware version of daughterboard code
- */
-struct db_base {
- uint16_t dbid; //< daughterboard ID
-
- uint16_t is_tx : 1; //< is this a transmit db?
- uint16_t is_quadrature : 1;
- uint16_t i_and_q_swapped : 1;
- uint16_t spectrum_inverted : 1;
-
- uint16_t output_enables; //< bitmask of which pins should be outputs from FPGA
- uint16_t used_pins; //< bitmask of pins used by the daughterboard
-
- u2_fxpt_freq_t freq_min; //< min freq that can be set (Hz)
- u2_fxpt_freq_t freq_max; //< max freq that can be set (Hz)
-
- u2_fxpt_gain_t gain_min; //< min gain that can be set (dB)
- u2_fxpt_gain_t gain_max; //< max gain that can be set (dB)
- u2_fxpt_gain_t gain_step_size; //< (dB)
-
- u2_fxpt_freq_t default_lo_offset; //< offset to add to tune frequency, reset value
- u2_fxpt_freq_t current_lo_offset; //< current value of lo_offset
-
- /*
- * Auto T/R control values
- */
- uint32_t atr_mask; //< which bits to control
- uint32_t atr_txval; //< value to use when transmitting
- uint32_t atr_rxval; //< value to use when receiving
-
- //! delay in clk ticks from when Tx fifo gets data to when T/R switches
- // uint32_t atr_tx_delay;
-
- //! delay in clk ticks from when Tx fifo goes empty to when T/R switches
- // uint32_t atr_rx_delay;
-
- bool (*init)(struct db_base *);
- bool (*set_freq)(struct db_base *, u2_fxpt_freq_t freq, u2_fxpt_freq_t *dc);
- bool (*set_gain)(struct db_base *, u2_fxpt_gain_t gain);
- bool (*set_tx_enable)(struct db_base *, bool on);
-};
-
-
-#endif /* INCLUDED_DB_BASE_H */
diff --git a/firmware/microblaze/lib/db_basic.c b/firmware/microblaze/lib/db_basic.c
deleted file mode 100644
index 2bd4ebfbe..000000000
--- a/firmware/microblaze/lib/db_basic.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2008,2009 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-
-#include <db_base.h>
-
-bool db_basic_init(struct db_base *db);
-bool db_basic_set_freq(struct db_base *db, u2_fxpt_freq_t freq, u2_fxpt_freq_t *dc);
-bool db_basic_set_gain(struct db_base *db, u2_fxpt_gain_t gain);
-bool db_basic_set_tx_enable(struct db_base *, bool on);
-
-struct db_basic {
- struct db_base base;
-};
-
-
-struct db_basic db_basic_tx = {
- .base.dbid = 0x0000,
- .base.is_tx = true,
- .base.output_enables = 0x0000,
- .base.used_pins = 0x0000,
- .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(-90e9),
- .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(90e9),
- .base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.is_quadrature = true,
- .base.i_and_q_swapped = false,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(0),
- .base.atr_mask = 0,
- .base.atr_txval = 0,
- .base.atr_rxval = 0,
- //.base.atr_tx_delay = 0,
- //.base.atr_rx_delay = 0,
-
- .base.init = db_basic_init,
- .base.set_freq = db_basic_set_freq,
- .base.set_gain = db_basic_set_gain,
- .base.set_tx_enable = db_basic_set_tx_enable,
-};
-
-struct db_basic db_basic_rx = {
- .base.dbid = 0x0001,
- .base.is_tx = false,
- .base.output_enables = 0x0000,
- .base.used_pins = 0x0000,
- .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(-90e9),
- .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(90e9),
- .base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.is_quadrature = false,
- .base.i_and_q_swapped = false,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(0),
- .base.atr_mask = 0,
- .base.atr_txval = 0,
- .base.atr_rxval = 0,
- //.base.atr_tx_delay = 0,
- //.base.atr_rx_delay = 0,
-
- .base.init = db_basic_init,
- .base.set_freq = db_basic_set_freq,
- .base.set_gain = db_basic_set_gain,
- .base.set_tx_enable = db_basic_set_tx_enable,
-};
-
-struct db_basic db_lf_tx = {
- .base.dbid = 0x000e,
- .base.is_tx = true,
- .base.output_enables = 0x0000,
- .base.used_pins = 0x0000,
- .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(-32e6),
- .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(32e6),
- .base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.is_quadrature = true,
- .base.i_and_q_swapped = false,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(0),
- .base.atr_mask = 0,
- .base.atr_txval = 0,
- .base.atr_rxval = 0,
- //.base.atr_tx_delay = 0,
- //.base.atr_rx_delay = 0,
-
- .base.init = db_basic_init,
- .base.set_freq = db_basic_set_freq,
- .base.set_gain = db_basic_set_gain,
- .base.set_tx_enable = db_basic_set_tx_enable,
-};
-
-struct db_basic db_lf_rx = {
- .base.dbid = 0x000f,
- .base.is_tx = false,
- .base.output_enables = 0x0000,
- .base.used_pins = 0x0000,
- .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(0),
- .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(32e6),
- .base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.is_quadrature = false,
- .base.i_and_q_swapped = false,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(0),
- .base.atr_mask = 0,
- .base.atr_txval = 0,
- .base.atr_rxval = 0,
- //.base.atr_tx_delay = 0,
- //.base.atr_rx_delay = 0,
-
- .base.init = db_basic_init,
- .base.set_freq = db_basic_set_freq,
- .base.set_gain = db_basic_set_gain,
- .base.set_tx_enable = db_basic_set_tx_enable,
-};
-
-
-bool
-db_basic_init(struct db_base *db)
-{
- return true;
-}
-
-bool
-db_basic_set_freq(struct db_base *db, u2_fxpt_freq_t freq, u2_fxpt_freq_t *dc)
-{
- *dc = 0;
- return true;
-}
-
-bool
-db_basic_set_gain(struct db_base *db, u2_fxpt_gain_t gain)
-{
- return true;
-}
-
-bool
-db_basic_set_tx_enable(struct db_base *db, bool on)
-{
- return true;
-}
-
diff --git a/firmware/microblaze/lib/db_dbsrx.c b/firmware/microblaze/lib/db_dbsrx.c
deleted file mode 100644
index 2174a6cd8..000000000
--- a/firmware/microblaze/lib/db_dbsrx.c
+++ /dev/null
@@ -1,395 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2009 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <i2c.h>
-#include <db_base.h>
-#include <lsdac.h>
-#include <memory_map.h>
-#include <clocks.h>
-#include <stdio.h>
-#include <hal_io.h>
-
-#define min(X,Y) ((X) < (Y) ? (X) : (Y))
-#define max(X,Y) ((X) > (Y) ? (X) : (Y))
-#define abs(X) ((X) < (0) ? ((-1)*(X)) : (X))
-
-#define I2C_ADDR 0x67
-#define REFCLK_DIVISOR 25 // Gives a 4 MHz clock
-#define REFCLK_FREQ U2_DOUBLE_TO_FXPT_FREQ(MASTER_CLK_RATE/REFCLK_DIVISOR)
-#define REFCLK_FREQ_INT u2_fxpt_freq_round_to_int(REFCLK_FREQ)
-
-#define VMAXGAIN .75
-#define VMINGAIN 2.6
-#define RFGAINMAX 60
-#define BBGAINMAX 24
-#define DACFULLSCALE 3.3
-
-bool db_dbsrx_init(struct db_base *db);
-bool db_dbsrx_set_freq(struct db_base *db, u2_fxpt_freq_t freq, u2_fxpt_freq_t *dc);
-bool db_dbsrx_set_gain(struct db_base *db, u2_fxpt_gain_t gain);
-
-struct db_dbsrx_common {
- int d_n;
- int d_div2;
- int d_osc;
- int d_cp;
- int d_r_reg;
- int d_fdac;
- int d_m;
- int d_dl;
- int d_ade;
- int d_adl;
- int d_gc2;
- int d_diag;
-};
-
-struct db_dbsrx_dummy {
- struct db_base base;
- struct db_dbsrx_common common;
-};
-
-struct db_dbsrx {
- struct db_base base;
- struct db_dbsrx_common common;
-};
-
-struct db_dbsrx db_dbsrx = {
- .base.dbid = 0x000d,
- .base.is_tx = false,
- .base.output_enables = 0x0000,
- .base.used_pins = 0x0000,
- .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(500e6),
- .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(2.6e9),
- .base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(RFGAINMAX+BBGAINMAX),
- .base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(1),
- .base.is_quadrature = true,
- .base.i_and_q_swapped = false,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(0),
- .base.init = db_dbsrx_init,
- .base.set_freq = db_dbsrx_set_freq,
- .base.set_gain = db_dbsrx_set_gain,
- .base.set_tx_enable = 0,
- .base.atr_mask = 0x0000,
- .base.atr_txval = 0,
- .base.atr_rxval = 0,
- //.base.atr_tx_delay =
- //.base.atr_rx_delay =
- .common.d_n = 950,
- .common.d_div2 = 0,
- .common.d_osc = 5,
- .common.d_cp = 3,
- .common.d_r_reg = 1,
- .common.d_fdac = 127,
- .common.d_m = 2,
- .common.d_dl = 1,
- .common.d_ade = 0,
- .common.d_adl = 0,
- .common.d_gc2 = 31,
- .common.d_diag = 0,
-};
-
-bool
-db_dbsrx_init(struct db_base *dbb){
- struct db_dbsrx_dummy *db = (struct db_dbsrx_dummy *) dbb;
- db->base.set_gain(dbb, (db->base.gain_max + db->base.gain_min)/2);
- clocks_enable_rx_dboard(true, REFCLK_DIVISOR); // Gives 4 MHz clock
-
- return true;
-}
-
-/**************************************************
- * Registers
- **************************************************/
-static int
-_read_adc (void){
- unsigned char readback[2];
- i2c_read(I2C_ADDR, readback, 2*sizeof(unsigned char));
- int adc_val = (readback[0] >> 2)&7;
- //printf("READBACK[0] %d, [1] %d\n",readback[0],readback[1]);
- //printf("ADC: %d\n",adc_val);
- return adc_val;
-}
-
-static void
-_write_reg (int regno, int v){
- //regno is in [0,5], v is value to write to register"""
- unsigned char args[2];
- args[0] = (unsigned char)regno;
- args[1] = (unsigned char)v;
- i2c_write(I2C_ADDR, args, 2*sizeof(unsigned char));
- //printf("Reg %d, Val %x\n",regno,v);
-}
-
-static void _send_reg_0(struct db_dbsrx_dummy *db){
- _write_reg(0,(db->common.d_div2<<7) + (db->common.d_n>>8));
-}
-
-static void _send_reg_1(struct db_dbsrx_dummy *db){
- _write_reg(1,db->common.d_n & 255);
-}
-
-static void _send_reg_2(struct db_dbsrx_dummy *db){
- _write_reg(2,db->common.d_osc + (db->common.d_cp<<3) + (db->common.d_r_reg<<5));
-}
-
-static void _send_reg_3(struct db_dbsrx_dummy *db){
- _write_reg(3,db->common.d_fdac);
-}
-
-static void _send_reg_4(struct db_dbsrx_dummy *db){
- _write_reg(4,db->common.d_m + (db->common.d_dl<<5) + (db->common.d_ade<<6) + (db->common.d_adl<<7));
-}
-
-static void _send_reg_5(struct db_dbsrx_dummy *db){
- _write_reg(5,db->common.d_gc2 + (db->common.d_diag<<5));
-}
-
-/**************************************************
- * Helpers for setting the freq
- **************************************************/
-static void
-_set_div2(struct db_dbsrx_dummy *db, int div2){
- db->common.d_div2 = div2;
- _send_reg_0(db);
-}
-
-// FIXME How do we handle ADE and ADL properly?
-static void
-_set_ade(struct db_dbsrx_dummy *db, int ade){
- db->common.d_ade = ade;
- _send_reg_4(db);
-}
-
-static void
-_set_r(struct db_dbsrx_dummy *db, int r){
- db->common.d_r_reg = r;
- _send_reg_2(db);
-}
-
-static void
-_set_n(struct db_dbsrx_dummy *db, int n){
- db->common.d_n = n;
- _send_reg_0(db);
- _send_reg_1(db);
-}
-
-static void
-_set_osc(struct db_dbsrx_dummy *db, int osc){
- db->common.d_osc = osc;
- _send_reg_2(db);
-}
-
-static void
-_set_cp(struct db_dbsrx_dummy *db, int cp){
- db->common.d_cp = cp;
- _send_reg_2(db);
-}
-
-/**************************************************
- * Set the freq
- **************************************************/
-
-
-bool
-db_dbsrx_set_freq(struct db_base *dbb, u2_fxpt_freq_t freq, u2_fxpt_freq_t *dc){
- struct db_dbsrx_dummy *db = (struct db_dbsrx_dummy *) dbb;
-
- if(!(freq>=db->base.freq_min && freq<=db->base.freq_max)) {
- return false;
- }
-
- u2_fxpt_freq_t vcofreq;
- if(freq < U2_DOUBLE_TO_FXPT_FREQ(1150e6)) {
- _set_div2(db, 0);
- vcofreq = 4 * freq;
- }
- else {
- _set_div2(db, 1);
- vcofreq = 2 * freq;
- }
-
- _set_ade(db, 1);
- int rmin = max(2, u2_fxpt_freq_round_to_int(REFCLK_FREQ/2e6)); //TODO? remove max()
- //int rmax = min(128, u2_fxpt_freq_round_to_int(REFCLK_FREQ/500e3)); //TODO? remove min()
- int n = 0;
- u2_fxpt_freq_t best_delta = U2_DOUBLE_TO_FXPT_FREQ(10e6);
- u2_fxpt_freq_t delta;
-
- int r_reg = 0;
- while ((r_reg<7) && ((2<<r_reg) < rmin)) {
- r_reg++;
- }
- //printf ("r_reg = %d, r = %d\n",r_reg,2<<r_reg);
- int best_r = r_reg;
- int best_n = 0;
-
- while(r_reg <= 7) {
- n = u2_fxpt_freq_round_to_int(freq/REFCLK_FREQ_INT*(2<<r_reg));
- //printf("LOOP: r_reg %d, best_r %d, best_n %d, best_delta %d\n",
- //r_reg,best_r,best_n,u2_fxpt_freq_round_to_int(best_delta));
-
- //printf("N: %d\n",n);
- if(n<256) {
- r_reg++;
- continue;
- }
- delta = abs(n*REFCLK_FREQ/(2<<r_reg) - freq);
- if(delta < best_delta) {
- best_r = r_reg;
- best_n = n;
- best_delta = delta;
- }
- if(best_delta < U2_DOUBLE_TO_FXPT_FREQ(75e3)) {
- break;
- }
- r_reg++;
- }
-
- //printf("BEST R: %d Best Delta %d Best N %d\n",
- // best_r,u2_fxpt_freq_round_to_int(best_delta),best_n);
- _set_r(db, best_r);
- _set_n(db, best_n);
-
- int vco;
- if(vcofreq < U2_DOUBLE_TO_FXPT_FREQ(2433e6))
- vco = 0;
- else if(vcofreq < U2_DOUBLE_TO_FXPT_FREQ(2711e6))
- vco=1;
- else if(vcofreq < U2_DOUBLE_TO_FXPT_FREQ(3025e6))
- vco=2;
- else if(vcofreq < U2_DOUBLE_TO_FXPT_FREQ(3341e6))
- vco=3;
- else if(vcofreq < U2_DOUBLE_TO_FXPT_FREQ(3727e6))
- vco=4;
- else if(vcofreq < U2_DOUBLE_TO_FXPT_FREQ(4143e6))
- vco=5;
- else if(vcofreq < U2_DOUBLE_TO_FXPT_FREQ(4493e6))
- vco=6;
- else
- vco=7;
- //printf("Initial VCO choice %d\n",vco);
- _set_osc(db, vco);
-
-
- int adc_val = 0;
- while(adc_val == 0 || adc_val == 7) {
- adc_val = _read_adc();
- //printf("adc %d\n",adc_val);
-
- if(adc_val == 0) {
- if(vco <= 0) {
- return false;
- }
- else {
- vco = vco - 1;
- }
- }
- else if(adc_val == 7) {
- if(vco >= 7) {
- return false;
- }
- else {
- vco = vco + 1;
- }
- }
- _set_osc(db, vco);
- }
-
- if(adc_val == 1 || adc_val == 2) {
- _set_cp(db, 1);
- }
- else if(adc_val == 3 || adc_val == 4) {
- _set_cp(db, 2);
- }
- else {
- _set_cp(db, 3);
- }
- //printf("Final VCO choice %d\n",vco);
-
- *dc = db->common.d_n * REFCLK_FREQ / (2<<db->common.d_r_reg);
- return true;
-
-}
-
-/**************************************************
- * Helpers for setting the gain
- **************************************************/
-
-static void
-_set_gc2(struct db_dbsrx_dummy *db, int gc2){
- db->common.d_gc2 = gc2;
- _send_reg_5(db);
-}
-
-/**************************************************
- * Set the gain
- **************************************************/
-bool
-db_dbsrx_set_gain(struct db_base *dbb, u2_fxpt_gain_t gain){
- struct db_dbsrx_dummy *db = (struct db_dbsrx_dummy *) dbb;
-
- u2_fxpt_gain_t rfgain, bbgain;
-
- if(!(gain >= db->base.gain_min && gain <= db->base.gain_max)) {
- return false;
- }
-
- if(gain < U2_DOUBLE_TO_FXPT_GAIN(RFGAINMAX)) {
- rfgain = gain;
- bbgain = 0;
- }
- else {
- rfgain = U2_DOUBLE_TO_FXPT_GAIN(RFGAINMAX);
- bbgain = gain - U2_DOUBLE_TO_FXPT_GAIN(RFGAINMAX);
- }
-
- int rf_gain_slope_q8 = 256 * 4096 * (VMAXGAIN-VMINGAIN) / RFGAINMAX / DACFULLSCALE;
- int rf_gain_offset_q8 = 128 * 256 * 4096 * VMINGAIN / DACFULLSCALE;
-
- int rfdac = (rfgain*rf_gain_slope_q8 + rf_gain_offset_q8)>>15;
-
- //printf("Set RF Gain %d, %d\n",rfgain,rfdac);
- lsdac_write_rx(1,rfdac);
-
- // Set GC2
- int bb_gain_slope_q8 = 256*(0-31)/(BBGAINMAX-0);
-
- int gc2 = u2_fxpt_gain_round_to_int((bb_gain_slope_q8 * bbgain)>>8) + 31;
- //printf("Set BB Gain: %d, gc2 %d\n",bbgain,gc2);
-
- _set_gc2(db, gc2);
-
- return true;
-}
-
-/**************************************************
- * Helpers for setting the bw
- **************************************************/
-static void
-_set_m(struct db_dbsrx_dummy *db, int m){
- db->common.d_m = m;
- _send_reg_4(db);
-}
-
-static void
-_set_fdac(struct db_dbsrx_dummy *db, int fdac){
- db->common.d_fdac = fdac;
- _send_reg_3(db);
-}
diff --git a/firmware/microblaze/lib/db_init.c b/firmware/microblaze/lib/db_init.c
index a0bfc5cfb..537078fb6 100644
--- a/firmware/microblaze/lib/db_init.c
+++ b/firmware/microblaze/lib/db_init.c
@@ -1,4 +1,6 @@
-/* -*- c++ -*- */
+//
+// Copyright 2010 Ettus Research LLC
+//
/*
* Copyright 2008,2009 Free Software Foundation, Inc.
*
@@ -23,63 +25,10 @@
#include <string.h>
#include <stdio.h>
#include <db.h>
-#include <db_base.h>
#include <hal_io.h>
#include <nonstdio.h>
-struct db_base *tx_dboard; // the tx daughterboard that's installed
-struct db_base *rx_dboard; // the rx daughterboard that's installed
-
-extern struct db_base db_basic_tx;
-extern struct db_base db_basic_rx;
-extern struct db_base db_lf_tx;
-extern struct db_base db_lf_rx;
-extern struct db_base db_rfx_400_tx;
-extern struct db_base db_rfx_400_rx;
-extern struct db_base db_rfx_900_tx;
-extern struct db_base db_rfx_900_rx;
-extern struct db_base db_rfx_1200_tx;
-extern struct db_base db_rfx_1200_rx;
-extern struct db_base db_rfx_1800_tx;
-extern struct db_base db_rfx_1800_rx;
-extern struct db_base db_rfx_2400_tx;
-extern struct db_base db_rfx_2400_rx;
-extern struct db_base db_tvrx1;
-extern struct db_base db_tvrx2;
-extern struct db_base db_tvrx3;
-extern struct db_base db_dbsrx;
-
-extern struct db_base db_xcvr2450_tx;
-extern struct db_base db_xcvr2450_rx;
-
-struct db_base *all_dboards[] = {
- &db_basic_tx,
- &db_basic_rx,
- &db_lf_tx,
- &db_lf_rx,
- &db_rfx_400_tx,
- &db_rfx_400_rx,
- &db_rfx_900_tx,
- &db_rfx_900_rx,
- &db_rfx_1200_tx,
- &db_rfx_1200_rx,
- &db_rfx_1800_tx,
- &db_rfx_1800_rx,
- &db_rfx_2400_tx,
- &db_rfx_2400_rx,
- &db_tvrx1,
-#if 0
- &db_tvrx2,
-#endif
- &db_tvrx3,
- &db_dbsrx,
- &db_xcvr2450_tx,
- &db_xcvr2450_rx,
- 0
-};
-
-
typedef enum { UDBE_OK, UDBE_NO_EEPROM, UDBE_INVALID_EEPROM } usrp_dbeeprom_status_t;
static usrp_dbeeprom_status_t
@@ -132,14 +81,6 @@ read_dboard_eeprom(int i2c_addr)
static struct db_base *
lookup_dbid(int dbid)
{
- if (dbid < 0)
- return 0;
-
- int i;
- for (i = 0; all_dboards[i]; i++)
- if (all_dboards[i]->dbid == dbid)
- return all_dboards[i];
-
return 0;
}
@@ -172,10 +113,10 @@ set_atr_regs(int bank, struct db_base *db)
int mask;
int i;
- val[ATR_IDLE] = db->atr_rxval;
- val[ATR_RX] = db->atr_rxval;
- val[ATR_TX] = db->atr_txval;
- val[ATR_FULL] = db->atr_txval;
+ val[ATR_IDLE] = 0;//db->atr_rxval;
+ val[ATR_RX] = 0;//db->atr_rxval;
+ val[ATR_TX] = 0;//db->atr_txval;
+ val[ATR_FULL] = 0;//db->atr_txval;
if (bank == GPIO_TX_BANK){
mask = 0xffff0000;
@@ -198,13 +139,13 @@ set_gpio_mode(int bank, struct db_base *db)
{
int i;
- hal_gpio_set_ddr(bank, db->output_enables, 0xffff);
+ hal_gpio_set_ddr(bank, /*db->output_enables*/0, 0xffff);
set_atr_regs(bank, db);
for (i = 0; i < 16; i++){
- if (db->used_pins & (1 << i)){
+ if (/*db->used_pins*/0 & (1 << i)){
// set to either GPIO_SEL_SW or GPIO_SEL_ATR
- hal_gpio_set_sel(bank, i, (db->atr_mask & (1 << i)) ? 'a' : 's');
+ hal_gpio_set_sel(bank, i, (/*db->atr_mask*/0 & (1 << i)) ? 'a' : 's');
}
}
}
@@ -212,7 +153,7 @@ set_gpio_mode(int bank, struct db_base *db)
static int __attribute__((unused))
determine_tx_mux_value(struct db_base *db)
{
- if (db->i_and_q_swapped)
+ if (/*db->i_and_q_swapped*/0)
return 0x01;
else
return 0x10;
@@ -241,7 +182,7 @@ determine_rx_mux_value(struct db_base *db)
int subdev1_uses;
int uses;
- if (db->is_quadrature)
+ if (/*db->is_quadrature*/0)
subdev0_uses = 0x3; // uses A/D 0 and 1
else
subdev0_uses = 0x1; // uses A/D 0 only
@@ -253,7 +194,7 @@ determine_rx_mux_value(struct db_base *db)
uses = subdev0_uses;
- int swap_iq = db->i_and_q_swapped & 0x1;
+ int swap_iq = /*db->i_and_q_swapped*/0 & 0x1;
int index = (swap_iq << 2) | uses;
return truth_table[index];
@@ -263,7 +204,7 @@ determine_rx_mux_value(struct db_base *db)
void
db_init(void)
{
- int m;
+ /*int m;
tx_dboard = lookup_dboard(I2C_ADDR_TX_A, &db_basic_tx, "Tx");
//printf("db_init: tx dbid = 0x%x\n", tx_dboard->dbid);
@@ -281,7 +222,7 @@ db_init(void)
m = determine_rx_mux_value(rx_dboard);
dsp_rx_regs->rx_mux = m;
//printf("rx_mux = 0x%x\n", m);
- rx_dboard->current_lo_offset = rx_dboard->default_lo_offset;
+ rx_dboard->current_lo_offset = rx_dboard->default_lo_offset;*/
}
/*!
@@ -337,14 +278,14 @@ calc_dxc_freq(u2_fxpt_freq_t target_freq, u2_fxpt_freq_t baseband_freq,
bool
db_set_lo_offset(struct db_base *db, u2_fxpt_freq_t offset)
{
- db->current_lo_offset = offset;
+ //db->current_lo_offset = offset;
return true;
}
bool
db_tune(struct db_base *db, u2_fxpt_freq_t target_freq, struct tune_result *result)
{
- memset(result, 0, sizeof(*result));
+ /*memset(result, 0, sizeof(*result));
bool inverted = false;
u2_fxpt_freq_t dxc_freq;
u2_fxpt_freq_t actual_dxc_freq;
@@ -379,7 +320,7 @@ db_tune(struct db_base *db, u2_fxpt_freq_t target_freq, struct tune_result *resu
result->dxc_freq = dxc_freq;
result->residual_freq = dxc_freq - actual_dxc_freq;
result->inverted = inverted;
- return ok;
+ return ok;*/return false;
}
static int32_t
@@ -424,5 +365,5 @@ db_set_duc_freq(u2_fxpt_freq_t dxc_freq, u2_fxpt_freq_t *actual_dxc_freq)
bool
db_set_gain(struct db_base *db, u2_fxpt_gain_t gain)
{
- return db->set_gain(db, gain);
+ return false;//db->set_gain(db, gain);
}
diff --git a/firmware/microblaze/lib/db_rfx.c b/firmware/microblaze/lib/db_rfx.c
deleted file mode 100644
index ff12f9e32..000000000
--- a/firmware/microblaze/lib/db_rfx.c
+++ /dev/null
@@ -1,590 +0,0 @@
-/*
- * Copyright 2008,2009 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <spi.h>
-#include <memory_map.h>
-#include <db_base.h>
-#include <hal_io.h>
-#include <stdio.h>
-#include <mdelay.h>
-#include <lsdac.h>
-#include <clocks.h>
-
-
-bool rfx_init_rx(struct db_base *db);
-bool rfx_init_tx(struct db_base *db);
-bool rfx_set_freq(struct db_base *db, u2_fxpt_freq_t freq, u2_fxpt_freq_t *dc);
-bool rfx_set_gain_rx(struct db_base *db, u2_fxpt_gain_t gain);
-bool rfx_set_gain_tx(struct db_base *db, u2_fxpt_gain_t gain);
-bool rfx_set_tx_enable(struct db_base *, bool on);
-
-// Control Latch Defines
-#define P 0 // Prescalar value for setting in regs, must match the next line...
-#define PRESCALER 8 // Presacalar value for computations
-#define PD 0 // Power down, 0 = normal operation
-#define PL 0 // PLL power output
-#define MTLD 1 // Mute till lock detect
-#define CPGAIN 0 // Charge pump gain, use setting 1, also in N-reg
-#define CP3S 0 // Charge pump tri-state, 0 = normal operation
-#define PDP 1 // Phase detector polarity
-#define MUXOUT 1 // Digital lock detect, active high
-#define CR 0 // normal operation
-#define PC 1 // core power
-
-// N Latch Defines
-#define DIVSEL 0 // N Counter always operates on full rate
-#define N_RSV 0
-
-// R Latch Defines
-#define R_RSV 0
-#define R_BSC 3
-#define R_TMB 0
-#define R_LDP 1
-#define R_ABP 0
-#define R_DIV 16
-
-#define phdet_freq (U2_DOUBLE_TO_FXPT_FREQ(100e6/R_DIV))
-
-// IO Pin functions
-#define POWER_UP (1 << 7) // Low enables power supply
-#define ANT_SW (1 << 6) // On TX DB, 0 = TX, 1 = RX, on RX DB 0 = main ant, 1 = RX2
-#define MIX_EN (1 << 5) // Enable appropriate mixer
-#define LOCKDET_MASK (1 << 2) // Input pin
-
-struct db_rfx_common {
- // RFX common stuff
- unsigned char DIV2;
- unsigned char CP1;
- unsigned char CP2;
- int freq_mult;
- int spi_mask;
-};
-
-struct db_rfx_dummy {
- struct db_base base;
- struct db_rfx_common common;
-};
-
-
-struct db_rfx_400_rx {
- struct db_base base;
- struct db_rfx_common common;
-};
-
-struct db_rfx_400_tx {
- struct db_base base;
- struct db_rfx_common common;
-};
-
-struct db_rfx_900_rx {
- struct db_base base;
- struct db_rfx_common common;
-};
-
-struct db_rfx_900_tx {
- struct db_base base;
- struct db_rfx_common common;
-};
-
-struct db_rfx_1200_rx {
- struct db_base base;
- struct db_rfx_common common;
-};
-
-struct db_rfx_1200_tx {
- struct db_base base;
- struct db_rfx_common common;
-};
-
-struct db_rfx_1800_rx {
- struct db_base base;
- struct db_rfx_common common;
-};
-
-struct db_rfx_1800_tx {
- struct db_base base;
- struct db_rfx_common common;
-};
-
-struct db_rfx_2400_rx {
- struct db_base base;
- struct db_rfx_common common;
-};
-
-struct db_rfx_2400_tx {
- struct db_base base;
- struct db_rfx_common common;
-};
-
-
-/*
- * The class instances
- */
-struct db_rfx_400_rx db_rfx_400_rx = {
- .base.dbid = 0x0024,
- .base.is_tx = false,
- .base.output_enables = 0x00E0,
- .base.used_pins = 0x00FF,
- .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(400e6),
- .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(500e6),
- .base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(45),
- .base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(0.022),
- .base.is_quadrature = true,
- .base.i_and_q_swapped = true,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(0),
- .base.init = rfx_init_rx,
- .base.set_freq = rfx_set_freq,
- .base.set_gain = rfx_set_gain_rx,
- .base.set_tx_enable = 0,
- .base.atr_mask = 0x00E0,
- .base.atr_txval = POWER_UP,
- .base.atr_rxval = POWER_UP|MIX_EN,
- // .base.atr_tx_delay =
- // .base.atr_rx_delay =
- .common.DIV2 = 0,
- .common.CP1 = 7,
- .common.CP2 = 7,
- .common.spi_mask = SPI_SS_RX_DB,
- .common.freq_mult = 2
-};
-
-
-struct db_rfx_400_tx db_rfx_400_tx = {
- .base.dbid = 0x0028,
- .base.is_tx = true,
- .base.output_enables = 0x00E0,
- .base.used_pins = 0x00FF,
- .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(400e6),
- .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(500e6),
- //.base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(xxx),
- //.base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(xxx),
- //.base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(xxx),
- .base.is_quadrature = true,
- .base.i_and_q_swapped = false,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(12.5e6),
- .base.init = rfx_init_tx,
- .base.set_freq = rfx_set_freq,
- .base.set_gain = rfx_set_gain_tx,
- .base.set_tx_enable = rfx_set_tx_enable,
- .base.atr_mask = 0x00E0,
- .base.atr_txval = POWER_UP|MIX_EN,
- .base.atr_rxval = POWER_UP|ANT_SW,
- // .base.atr_tx_delay =
- // .base.atr_rx_delay =
- .common.DIV2 = 1,
- .common.CP1 = 7,
- .common.CP2 = 7,
- .common.spi_mask = SPI_SS_TX_DB,
- .common.freq_mult = 2
-};
-
-struct db_rfx_900_rx db_rfx_900_rx = {
- .base.dbid = 0x0025,
- .base.is_tx = false,
- .base.output_enables = 0x00E0,
- .base.used_pins = 0x00FF,
- .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(750e6),
- .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(1050e6),
- .base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(70),
- .base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(0.034),
- .base.is_quadrature = true,
- .base.i_and_q_swapped = true,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(0),
- .base.init = rfx_init_rx,
- .base.set_freq = rfx_set_freq,
- .base.set_gain = rfx_set_gain_rx,
- .base.set_tx_enable = 0,
- .base.atr_mask = 0x00E0,
- .base.atr_txval = 0,
- .base.atr_rxval = MIX_EN,
- // .base.atr_tx_delay =
- // .base.atr_rx_delay =
- .common.DIV2 = 1,
- .common.CP1 = 7,
- .common.CP2 = 7,
- .common.spi_mask = SPI_SS_RX_DB,
- .common.freq_mult = 2
-};
-
-
-struct db_rfx_900_tx db_rfx_900_tx = {
- .base.dbid = 0x0029,
- .base.is_tx = true,
- .base.output_enables = 0x00E0,
- .base.used_pins = 0x00FF,
- .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(750e6),
- .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(1050e6),
- //.base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(xxx),
- //.base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(xxx),
- //.base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(xxx),
- .base.is_quadrature = true,
- .base.i_and_q_swapped = false,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(12.5e6),
- .base.init = rfx_init_tx,
- .base.set_freq = rfx_set_freq,
- .base.set_gain = rfx_set_gain_tx,
- .base.set_tx_enable = rfx_set_tx_enable,
- .base.atr_mask = 0x00E0,
- .base.atr_txval = MIX_EN,
- .base.atr_rxval = ANT_SW,
- // .base.atr_tx_delay =
- // .base.atr_rx_delay =
- .common.DIV2 = 1,
- .common.CP1 = 7,
- .common.CP2 = 7,
- .common.spi_mask = SPI_SS_TX_DB,
- .common.freq_mult = 2
-};
-
-struct db_rfx_1200_rx db_rfx_1200_rx = {
- .base.dbid = 0x0026,
- .base.is_tx = false,
- .base.output_enables = 0x00E0,
- .base.used_pins = 0x00FF,
- .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(1150e6),
- .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(1450e6),
- .base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(70),
- .base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(0.034),
- .base.is_quadrature = true,
- .base.i_and_q_swapped = true,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(0),
- .base.init = rfx_init_rx,
- .base.set_freq = rfx_set_freq,
- .base.set_gain = rfx_set_gain_rx,
- .base.set_tx_enable = 0,
- .base.atr_mask = 0x00E0,
- .base.atr_txval = 0,
- .base.atr_rxval = MIX_EN,
- // .base.atr_tx_delay =
- // .base.atr_rx_delay =
- .common.DIV2 = 1,
- .common.CP1 = 7,
- .common.CP2 = 7,
- .common.spi_mask = SPI_SS_RX_DB,
- .common.freq_mult = 2
-};
-
-
-struct db_rfx_1200_tx db_rfx_1200_tx = {
- .base.dbid = 0x002a,
- .base.is_tx = true,
- .base.output_enables = 0x00E0,
- .base.used_pins = 0x00FF,
- .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(1150e6),
- .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(1450e6),
- //.base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(xxx),
- //.base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(xxx),
- //.base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(xxx),
- .base.is_quadrature = true,
- .base.i_and_q_swapped = false,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(12.5e6),
- .base.init = rfx_init_tx,
- .base.set_freq = rfx_set_freq,
- .base.set_gain = rfx_set_gain_tx,
- .base.set_tx_enable = rfx_set_tx_enable,
- .base.atr_mask = 0x00E0,
- .base.atr_txval = MIX_EN,
- .base.atr_rxval = ANT_SW,
- // .base.atr_tx_delay =
- // .base.atr_rx_delay =
- .common.DIV2 = 1,
- .common.CP1 = 7,
- .common.CP2 = 7,
- .common.spi_mask = SPI_SS_TX_DB,
- .common.freq_mult = 2
-};
-
-struct db_rfx_1800_rx db_rfx_1800_rx = {
- .base.dbid = 0x0034,
- .base.is_tx = false,
- .base.output_enables = 0x00E0,
- .base.used_pins = 0x00FF,
- .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(1500e6),
- .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(2100e6),
- .base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(70),
- .base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(0.034),
- .base.is_quadrature = true,
- .base.i_and_q_swapped = true,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(0),
- .base.init = rfx_init_rx,
- .base.set_freq = rfx_set_freq,
- .base.set_gain = rfx_set_gain_rx,
- .base.set_tx_enable = 0,
- .base.atr_mask = 0x00E0,
- .base.atr_txval = 0,
- .base.atr_rxval = MIX_EN,
- // .base.atr_tx_delay =
- // .base.atr_rx_delay =
- .common.DIV2 = 0,
- .common.CP1 = 7,
- .common.CP2 = 7,
- .common.spi_mask = SPI_SS_RX_DB,
- .common.freq_mult = 1
-};
-
-
-struct db_rfx_1800_tx db_rfx_1800_tx = {
- .base.dbid = 0x0035,
- .base.is_tx = true,
- .base.output_enables = 0x00E0,
- .base.used_pins = 0x00FF,
- .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(1500e6),
- .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(2100e6),
- //.base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(xxx),
- //.base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(xxx),
- //.base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(xxx),
- .base.is_quadrature = true,
- .base.i_and_q_swapped = false,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(12.5e6),
- .base.init = rfx_init_tx,
- .base.set_freq = rfx_set_freq,
- .base.set_gain = rfx_set_gain_tx,
- .base.set_tx_enable = rfx_set_tx_enable,
- .base.atr_mask = 0x00E0,
- .base.atr_txval = MIX_EN,
- .base.atr_rxval = ANT_SW,
- // .base.atr_tx_delay =
- // .base.atr_rx_delay =
- .common.DIV2 = 0,
- .common.CP1 = 7,
- .common.CP2 = 7,
- .common.spi_mask = SPI_SS_TX_DB,
- .common.freq_mult = 1
-};
-
-
-struct db_rfx_2400_rx db_rfx_2400_rx = {
- .base.dbid = 0x0027,
- .base.is_tx = false,
- .base.output_enables = 0x00E0,
- .base.used_pins = 0x00FF,
- .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(2300e6),
- .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(2900e6),
- .base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(70),
- .base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(0.034),
- .base.is_quadrature = true,
- .base.i_and_q_swapped = true,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(0),
- .base.init = rfx_init_rx,
- .base.set_freq = rfx_set_freq,
- .base.set_gain = rfx_set_gain_rx,
- .base.set_tx_enable = 0,
- .base.atr_mask = 0x00E0,
- .base.atr_txval = 0,
- .base.atr_rxval = MIX_EN,
- // .base.atr_tx_delay =
- // .base.atr_rx_delay =
- .common.DIV2 = 0,
- .common.CP1 = 7,
- .common.CP2 = 7,
- .common.spi_mask = SPI_SS_RX_DB,
- .common.freq_mult = 1
-};
-
-
-struct db_rfx_2400_tx db_rfx_2400_tx = {
- .base.dbid = 0x002b,
- .base.is_tx = true,
- .base.output_enables = 0x00E0,
- .base.used_pins = 0x00FF,
- .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(2300e6),
- .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(2900e6),
- //.base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(xxx),
- //.base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(xxx),
- //.base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(xxx),
- .base.is_quadrature = true,
- .base.i_and_q_swapped = false,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(12.5e6),
- .base.init = rfx_init_tx,
- .base.set_freq = rfx_set_freq,
- .base.set_gain = rfx_set_gain_tx,
- .base.set_tx_enable = rfx_set_tx_enable,
- .base.atr_mask = 0x00E0,
- .base.atr_txval = MIX_EN,
- .base.atr_rxval = ANT_SW,
- // .base.atr_tx_delay =
- // .base.atr_rx_delay =
- .common.DIV2 = 0,
- .common.CP1 = 7,
- .common.CP2 = 7,
- .common.spi_mask = SPI_SS_TX_DB,
- .common.freq_mult = 1
-};
-
-
-bool
-rfx_init_tx(struct db_base *dbb)
-{
- //struct db_rfx_dummy *db = (struct db_rfx_dummy *) dbb;
- clocks_enable_tx_dboard(true, 0);
-
- // Set the freq now to get the one time 10ms delay out of the way.
- u2_fxpt_freq_t dc;
- dbb->set_freq(dbb, dbb->freq_min, &dc);
- return true;
-}
-
-bool
-rfx_init_rx(struct db_base *dbb)
-{
- //struct db_rfx_dummy *db = (struct db_rfx_dummy *) dbb;
- clocks_enable_rx_dboard(true, 0);
-
- // test gain
- dbb->set_gain(dbb,U2_DOUBLE_TO_FXPT_GAIN(45.0));
-
- // Set the freq now to get the one time 10ms delay out of the way.
- u2_fxpt_freq_t dc;
- dbb->set_freq(dbb, dbb->freq_min, &dc);
-
- return true;
-}
-
-bool
-rfx_set_freq(struct db_base *dbb, u2_fxpt_freq_t freq, u2_fxpt_freq_t *dc)
-{
- static unsigned char first = true;
-
- *dc = 0;
- struct db_rfx_dummy *db = (struct db_rfx_dummy *) dbb;
- u2_fxpt_freq_t desired_n = (U2_DOUBLE_TO_FXPT_FREQ(1.0)*db->common.freq_mult*freq)/phdet_freq;
- int N_DIV = u2_fxpt_freq_round_to_int(desired_n);
- int B = N_DIV/PRESCALER;
- int A = N_DIV - PRESCALER*B;
-
- if(B<A)
- return false;
-
- int R = (R_RSV<<22)|(R_BSC<<20)|(R_TMB<<19)|(R_LDP<<18)|(R_ABP<<16)|(R_DIV<<2)|1;
- int N = (DIVSEL<<23)|(db->common.DIV2<<22)|(CPGAIN<<21)|(B<<8)|(N_RSV<<7)|(A<<2)|2;
- int C = (P<<22)|(PD<<20)|(db->common.CP2<<17)|(db->common.CP1<<14)|(PL<<12)|
- (MTLD<<11)|(CPGAIN<<10)|(CP3S<<9)|(PDP<<8)|(MUXOUT<<5)|(CR<<4)|(PC<<2)|0;
-
- spi_transact(SPI_TXONLY,db->common.spi_mask,R,24,SPIF_PUSH_FALL);
- spi_transact(SPI_TXONLY,db->common.spi_mask,C,24,SPIF_PUSH_FALL);
- if (first){
- first = false;
- mdelay(10);
- }
- spi_transact(SPI_TXONLY,db->common.spi_mask,N,24,SPIF_PUSH_FALL);
-
- //printf("A = %d, B = %d, N_DIV = %d\n",A, B, N_DIV);
- *dc = (N_DIV * phdet_freq) / db->common.freq_mult;
- return true;
-}
-
-bool
-rfx_set_gain_tx(struct db_base *dbb, u2_fxpt_gain_t gain)
-{
- // There is no analog gain control on TX
- return true;
-}
-
-bool
-rfx_set_gain_rx(struct db_base *dbb, u2_fxpt_gain_t gain)
-{
- struct db_rfx_dummy *db = (struct db_rfx_dummy *) dbb;
-
- int offset_q8 = (int)(1.2/3.3*4096*(1<<15));
- int range_q15 = (int)(-1.0*4096/3.3*256*128);
- int slope_q8 = range_q15/db->base.gain_max;
-
- int dacword = ((slope_q8 * gain) + offset_q8)>>15;
- //printf("DACWORD %d\n",dacword);
- lsdac_write_rx(1,dacword);
- return true;
-}
-
-
-bool
-rfx_set_tx_enable(struct db_base *dbb, bool on)
-{
- struct db_rfx_dummy *db = (struct db_rfx_dummy *) dbb;
-
- // FIXME
-
- return false;
-}
-
-bool
-rfx_lock_detect(struct db_base *dbb)
-{
- struct db_rfx_dummy *db = (struct db_rfx_dummy *) dbb;
- int pins;
- pins = hal_gpio_read( db->base.is_tx ? GPIO_TX_BANK : GPIO_RX_BANK );
- if(pins & LOCKDET_MASK)
- return true;
- return false;
-}
-
-/*
- def select_rx_antenna(self, which_antenna):
- """
- Specify which antenna port to use for reception.
- @param which_antenna: either 'TX/RX' or 'RX2'
- """
- if which_antenna in (0, 'TX/RX'):
- self._u.write_io(self._which, 0, RX2_RX1N)
- elif which_antenna in (1, 'RX2'):
- self._u.write_io(self._which, RX2_RX1N, RX2_RX1N)
- else:
- raise ValueError, "which_antenna must be either 'TX/RX' or 'RX2'"
-
- def set_gain(self, gain):
- """
- Set the gain.
-
- @param gain: gain in decibels
- @returns True/False
- """
- maxgain = self.gain_range()[1] - self._u.pga_max()
- mingain = self.gain_range()[0]
- if gain > maxgain:
- pga_gain = gain-maxgain
- assert pga_gain <= self._u.pga_max()
- agc_gain = maxgain
- else:
- pga_gain = 0
- agc_gain = gain
- V_maxgain = .2
- V_mingain = 1.2
- V_fullscale = 3.3
- dac_value = (agc_gain*(V_maxgain-V_mingain)/(maxgain-mingain) + V_mingain)*4096/V_fullscale
- assert dac_value>=0 and dac_value<4096
- return self._u.write_aux_dac(self._which, 0, int(dac_value)) and \
- self._set_pga(int(pga_gain))
-
- def gain_range(self):
- return (self._u.pga_min(), self._u.pga_max() + 70, 0.05) -- For 900-2400
- return (self._u.pga_min(), self._u.pga_max() + 45, 0.035) -- For 400
-
-*/
diff --git a/firmware/microblaze/lib/db_tvrx.c b/firmware/microblaze/lib/db_tvrx.c
deleted file mode 100644
index 49bf75883..000000000
--- a/firmware/microblaze/lib/db_tvrx.c
+++ /dev/null
@@ -1,244 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2008,2009 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <i2c.h>
-#include <lsdac.h>
-#include <memory_map.h>
-#include <db_base.h>
-#include <hal_io.h>
-#include <stdio.h>
-
-bool tvrx_init(struct db_base *db);
-bool tvrx_set_freq(struct db_base *db, u2_fxpt_freq_t freq, u2_fxpt_freq_t *dc);
-bool tvrx_set_gain(struct db_base *db, u2_fxpt_gain_t gain);
-
-#define I2C_ADDR 0x60
-#define REF_FREQ (U2_DOUBLE_TO_FXPT_FREQ(4e6)/640*8)
-
-#define ref_div 640 /* choices are 640, 512, 1024 */
-
-#if (ref_div == 640)
-#define ref_div_byte 0
-#else
-#if (ref_div == 512)
-#define ref_div_byte 0x6
-#else
-#define ref_div_byte 0x2
-#endif
-#endif
-
-#define fast_tuning 0x40
-
-#define control_byte_1 (0x88|fast_tuning|ref_div_byte)
-
-
-struct db_tvrx_common {
- // TVRX common stuff
- u2_fxpt_freq_t first_if;
- u2_fxpt_freq_t second_if;
-};
-
-struct db_tvrx_dummy {
- struct db_base base;
- struct db_tvrx_common common;
-};
-
-struct db_tvrx1 {
- struct db_base base;
- struct db_tvrx_common common;
-};
-
-struct db_tvrx2 {
- struct db_base base;
- struct db_tvrx_common common;
-};
-
-struct db_tvrx3 {
- struct db_base base;
- struct db_tvrx_common common;
-};
-
-/* The class instances */
-struct db_tvrx1 db_tvrx1 = {
- .base.dbid = 0x0003,
- .base.is_tx = false,
- .base.output_enables = 0x0000,
- .base.used_pins = 0x0000,
- .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(50e6),
- .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(860e6),
- .base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(95),
- .base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(1),
- .base.is_quadrature = false,
- .base.i_and_q_swapped = false,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(0),
- .base.init = tvrx_init,
- .base.set_freq = tvrx_set_freq,
- .base.set_gain = tvrx_set_gain,
- .base.set_tx_enable = 0,
- .base.atr_mask = 0x0000,
- .base.atr_txval = 0,
- .base.atr_rxval = 0,
- // .base.atr_tx_delay =
- // .base.atr_rx_delay =
- .common.first_if = U2_DOUBLE_TO_FXPT_FREQ(43.75e6),
- .common.second_if = U2_DOUBLE_TO_FXPT_FREQ(5.75e6),
-};
-
-#if 0
-struct db_tvrx2 db_tvrx2 = {
- .base.dbid = 0x000c,
- .base.is_tx = false,
- .base.output_enables = 0x0000,
- .base.used_pins = 0x0000,
- .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(50e6),
- .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(860e6),
- .base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(95),
- .base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(1),
- .base.is_quadrature = false,
- .base.i_and_q_swapped = false,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(0),
- .base.init = tvrx_init,
- .base.set_freq = tvrx_set_freq,
- .base.set_gain = tvrx_set_gain,
- .base.set_tx_enable = 0,
- .base.atr_mask = 0x0000,
- .base.atr_txval = 0,
- .base.atr_rxval = 0,
- // .base.atr_tx_delay =
- // .base.atr_rx_delay =
- .common.first_if = U2_DOUBLE_TO_FXPT_FREQ(44e6),
- .common.second_if = U2_DOUBLE_TO_FXPT_FREQ(56e6), // Fs - 44e6
-};
-#endif
-
-struct db_tvrx3 db_tvrx3 = {
- .base.dbid = 0x0040,
- .base.is_tx = false,
- .base.output_enables = 0x0000,
- .base.used_pins = 0x0000,
- .base.freq_min = U2_DOUBLE_TO_FXPT_FREQ(50e6),
- .base.freq_max = U2_DOUBLE_TO_FXPT_FREQ(860e6),
- .base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(95),
- .base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(1),
- .base.is_quadrature = false,
- .base.i_and_q_swapped = false,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(0),
- .base.init = tvrx_init,
- .base.set_freq = tvrx_set_freq,
- .base.set_gain = tvrx_set_gain,
- .base.set_tx_enable = 0,
- .base.atr_mask = 0x0000,
- .base.atr_txval = 0,
- .base.atr_rxval = 0,
- // .base.atr_tx_delay =
- // .base.atr_rx_delay =
- .common.first_if = U2_DOUBLE_TO_FXPT_FREQ(44e6),
- .common.second_if = U2_DOUBLE_TO_FXPT_FREQ(56e6), // Fs - 44e6
-};
-
-bool
-tvrx_init(struct db_base *dbb)
-{
- struct db_tvrx_dummy *db = (struct db_tvrx_dummy *) dbb;
- db->base.set_gain(dbb,U2_DOUBLE_TO_FXPT_GAIN(94.0));
- return true;
-}
-
-bool
-tvrx_set_freq(struct db_base *dbb, u2_fxpt_freq_t freq, u2_fxpt_freq_t *dc)
-{
- *dc = 0;
- if (freq < dbb->freq_min || freq > dbb->freq_max)
- return false;
-
- struct db_tvrx_dummy *db = (struct db_tvrx_dummy *) dbb;
-
- u2_fxpt_freq_t target_lo_freq = freq + db->common.first_if;
- int n_div = u2_fxpt_freq_round_to_int(((1LL<<20) * target_lo_freq)/REF_FREQ);
-
- u2_fxpt_freq_t actual_lo_freq = REF_FREQ * n_div;
- u2_fxpt_freq_t actual_freq = actual_lo_freq - db->common.first_if;
- if(n_div > 32767)
- return false;
-
- if (0)
- printf("n_div = %d, actual_freq = %d, actual_lo_freq = %d\n",
- n_div, u2_fxpt_freq_round_to_int(actual_freq),
- u2_fxpt_freq_round_to_int(actual_lo_freq));
-
- unsigned char buf[4];
- buf[0] = (n_div>>8) & 0xff;
- buf[1] = n_div & 0xff;
- buf[2] = control_byte_1;
- buf[3] = ((actual_freq < U2_DOUBLE_TO_FXPT_FREQ(158e6)) ? 0xa8 : // VHF LOW
- (actual_freq < U2_DOUBLE_TO_FXPT_FREQ(464e6)) ? 0x98 : // VHF HIGH
- 0x38); // UHF
-
- *dc = actual_freq - db->common.second_if;
- return i2c_write(I2C_ADDR,buf,4);
-}
-
-bool
-tvrx_set_gain(struct db_base *dbb, u2_fxpt_gain_t gain)
-{
- //struct db_tvrx_dummy *db = (struct db_tvrx_dummy *) dbb;
- int rfgain;
- int ifgain;
- if(gain>U2_DOUBLE_TO_FXPT_GAIN(95.0))
- return false;
- if(gain<0)
- return false;
-
- if(gain>U2_DOUBLE_TO_FXPT_GAIN(60.0)) {
- rfgain = U2_DOUBLE_TO_FXPT_GAIN(60.0);
- ifgain = gain-U2_DOUBLE_TO_FXPT_GAIN(60.0);
- } else {
- rfgain = gain;
- ifgain = 0;
- }
-
- int rf_slope_q8 = 256 * 4096 * 2.5 / 60.0 / 1.22 / 3.3;
- int rf_offset_q8 = 128 * 256 * 4096 * 1.25 / 1.22 / 3.3;
- int if_slope_q8 = 256 * 4096 * 2.25 / 35.0 / 1.22 / 3.3;
- int if_offset_q8 = 128 * 256 * 4096 * 1.4 / 1.22 / 3.3;
-
-
- int rfdac = (rfgain*rf_slope_q8 + rf_offset_q8)>>15;
- int ifdac = (ifgain*if_slope_q8 + if_offset_q8)>>15;
- lsdac_write_rx(0,rfdac);
- lsdac_write_rx(1,ifdac);
-
- if (0)
- printf("Setting gain %d, rf %d, if %d\n",gain,rfdac,ifdac);
-
- return true;
-}
-
-
-bool
-tvrx_lock_detect(struct db_base *dbb)
-{
- // struct db_tvrx_dummy *db = (struct db_tvrx_dummy *) dbb;
- return true;
-}
diff --git a/firmware/microblaze/lib/db_xcvr2450.c b/firmware/microblaze/lib/db_xcvr2450.c
deleted file mode 100644
index d7ab728e7..000000000
--- a/firmware/microblaze/lib/db_xcvr2450.c
+++ /dev/null
@@ -1,496 +0,0 @@
-/*
- * Copyright 2009 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <memory_map.h>
-#include <db_base.h>
-#include <stdio.h>
-#include <spi.h>
-#include <hal_io.h>
-#include <clocks.h>
-#include <mdelay.h>
-
-void set_atr_regs(int bank, struct db_base *db); //FIXME I need to be in a header
-
-// RX IO Pins
-#define LOCKDET (1 << 15) // This is an INPUT!!!
-#define EN (1 << 14)
-#define RX_EN (1 << 13) // 1 = RX on, 0 = RX off
-#define RX_HP (1 << 12)
-#define B1 (1 << 11)
-#define B2 (1 << 10)
-#define B3 (1 << 9)
-#define B4 (1 << 8)
-#define B5 (1 << 7)
-#define B6 (1 << 6)
-#define B7 (1 << 5)
-#define RX_OE_MASK EN|RX_EN|RX_HP|B1|B2|B3|B4|B5|B6|B7
-#define RX_SAFE_IO EN
-#define RX_ATR_MASK EN|RX_EN|RX_HP
-
-// TX IO Pins
-#define HB_PA_OFF (1 << 15) // 5GHz PA, 1 = off, 0 = on
-#define LB_PA_OFF (1 << 14) // 2.4GHz PA, 1 = off, 0 = on
-#define ANTSEL_TX1_RX2 (1 << 13) // 1 = Ant 1 to TX, Ant 2 to RX
-#define ANTSEL_TX2_RX1 (1 << 12) // 1 = Ant 2 to TX, Ant 1 to RX
-#define TX_EN (1 << 11) // 1 = TX on, 0 = TX off
-#define AD9515DIV (1 << 4) // 1 = Div by 3, 0 = Div by 2
-#define TX_OE_MASK HB_PA_OFF|LB_PA_OFF|ANTSEL_TX1_RX2|ANTSEL_TX2_RX1|TX_EN|AD9515DIV
-#define TX_SAFE_IO HB_PA_OFF|LB_PA_OFF|ANTSEL_TX1_RX2|AD9515DIV
-#define TX_ATR_MASK HB_PA_OFF|LB_PA_OFF|ANTSEL_TX1_RX2|ANTSEL_TX2_RX1|TX_EN|AD9515DIV
-
-#define LB_FREQ_MIN U2_DOUBLE_TO_FXPT_FREQ(2.3e9)
-#define LB_FREQ_MAX U2_DOUBLE_TO_FXPT_FREQ(2.6e9)
-#define HB_FREQ_MIN U2_DOUBLE_TO_FXPT_FREQ(4.8e9)
-#define HB_FREQ_MAX U2_DOUBLE_TO_FXPT_FREQ(6.1e9)
-#define MASTER_REF_CLK_DIV 1
-#define N_DIV_MIN_Q16 (131 << 16)
-
-bool xcvr2450_init(struct db_base *db);
-bool xcvr2450_set_freq(struct db_base *db, u2_fxpt_freq_t freq, u2_fxpt_freq_t *dc);
-bool xcvr2450_set_gain_rx(struct db_base *db, u2_fxpt_gain_t gain);
-bool xcvr2450_set_gain_tx(struct db_base *db, u2_fxpt_gain_t gain);
-bool xcvr2450_set_tx_enable(struct db_base *db, bool on);
-
-struct db_xcvr2450_common {
- int d_mimo, d_int_div, d_frac_div, d_highband, d_five_gig;
- int d_cp_current, d_ref_div, d_rssi_hbw;
- int d_txlpf_bw, d_rxlpf_bw, d_rxlpf_fine, d_rxvga_ser;
- int d_rssi_range, d_rssi_mode, d_rssi_mux;
- int d_rx_hp_pin, d_rx_hpf, d_rx_ant;
- int d_tx_ant, d_txvga_ser, d_tx_driver_lin;
- int d_tx_vga_lin, d_tx_upconv_lin, d_tx_bb_gain;
- int d_pabias_delay, d_pabias;
- int d_rx_rf_gain, d_rx_bb_gain, d_txgain;
- int d_ad9515_div;
- int d_tx_enb;
-};
-
-struct db_xcvr2450_dummy {
- struct db_base base;
- struct db_xcvr2450_common *common;
-};
-
-struct db_xcvr2450_rx {
- struct db_base base;
- struct db_xcvr2450_common *common;
-};
-
-struct db_xcvr2450_tx {
- struct db_base base;
- struct db_xcvr2450_common *common;
-};
-
-/*
- * shared common between rx and tx db
- */
-struct db_xcvr2450_common db_xcvr2450_common = {
- /* set sane defaults */
- .d_mimo = 1, // 0 = OFF, 1 = ON
- .d_int_div = 192, // 128 = min, 255 = max
- .d_frac_div = 0, // 0 = min, 65535 = max
- .d_highband = 0, // 0 = freq <= 5.4e9, 1 = freq > 5.4e9
- .d_five_gig = 0, // 0 = freq <= 3.e9, 1 = freq > 3e9
- .d_cp_current = 0, // 0 = 2mA, 1 = 4mA
- .d_ref_div = 1, // 1 to 7
- .d_rssi_hbw = 0, // 0 = 2 MHz, 1 = 6 MHz
- .d_txlpf_bw = 1, // 1 = 12 MHz, 2 = 18 MHz, 3 = 24 MHz
- .d_rxlpf_bw = 1, // 0 = 7.5 MHz, 1 = 9.5 MHz, 2 = 14 MHz, 3 = 18 MHz
- .d_rxlpf_fine = 2, // 0 = 90%, 1 = 95%, 2 = 100%, 3 = 105%, 4 = 110%
- .d_rxvga_ser = 1, // 0 = RXVGA controlled by B7:1, 1=controlled serially
- .d_rssi_range = 1, // 0 = low range (datasheet typo), 1=high range (0.5V - 2.0V)
- .d_rssi_mode = 1, // 0 = enable follows RXHP, 1 = enabled
- .d_rssi_mux = 0, // 0 = RSSI, 1 = TEMP
- .d_rx_hp_pin = 0, // 0 = Fc set by rx_hpf, 1 = 600 KHz
- .d_rx_hpf = 0, // 0 = 100Hz, 1 = 30KHz
- .d_rx_ant = 0, // 0 = Ant. #1, 1 = Ant. #2
- .d_tx_ant = 0, // 0 = Ant. #1, 1 = Ant. #2
- .d_txvga_ser = 1, // 0 = TXVGA controlled by B6:1, 1=controlled serially
- .d_tx_driver_lin = 2, // 0=50% (worst linearity), 1=63%, 2=78%, 3=100% (best lin)
- .d_tx_vga_lin = 2, // 0=50% (worst linearity), 1=63%, 2=78%, 3=100% (best lin)
- .d_tx_upconv_lin = 2, // 0=50% (worst linearity), 1=63%, 2=78%, 3=100% (best lin)
- .d_tx_bb_gain = 3, // 0=maxgain-5dB, 1=max-3dB, 2=max-1.5dB, 3=max
- .d_pabias_delay = 15, // 0 = 0, 15 = 7uS
- .d_pabias = 0, // 0 = 0 uA, 63 = 315uA
- .d_rx_rf_gain = 0, // 0 = 0dB, 1 = 0dB, 2 = 15dB, 3 = 30dB
- .d_rx_bb_gain = 16, // 0 = min, 31 = max (0 - 62 dB)
- .d_txgain = 63, // 0 = min, 63 = max
- .d_tx_enb = 1, // 0 = disabled, 1 = enabled
-};
-
-/*
- * The class instances
- */
-struct db_xcvr2450_rx db_xcvr2450_rx = {
- .base.dbid = 0x0061,
- .base.is_tx = false,
- .base.output_enables = RX_OE_MASK,
- .base.used_pins = 0xFFFF,
- .base.freq_min = LB_FREQ_MIN,
- .base.freq_max = HB_FREQ_MAX,
- .base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(92),
- .base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(1),
- .base.is_quadrature = true,
- .base.i_and_q_swapped = false,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(0),
- .base.init = xcvr2450_init,
- .base.set_freq = xcvr2450_set_freq,
- .base.set_gain = xcvr2450_set_gain_rx,
- .base.atr_mask = RX_ATR_MASK,
- .base.atr_txval = 0x0,
- .base.atr_rxval = 0x0,
- .common = &db_xcvr2450_common,
-};
-
-struct db_xcvr2450_tx db_xcvr2450_tx = {
- .base.dbid = 0x0060,
- .base.is_tx = true,
- .base.output_enables = TX_OE_MASK,
- .base.used_pins = 0xFFFF,
- .base.freq_min = LB_FREQ_MIN,
- .base.freq_max = HB_FREQ_MAX,
- .base.gain_min = U2_DOUBLE_TO_FXPT_GAIN(0),
- .base.gain_max = U2_DOUBLE_TO_FXPT_GAIN(30),
- .base.gain_step_size = U2_DOUBLE_TO_FXPT_GAIN(30.0/63.0),
- .base.is_quadrature = true,
- .base.i_and_q_swapped = true,
- .base.spectrum_inverted = false,
- .base.default_lo_offset = U2_DOUBLE_TO_FXPT_FREQ(0),
- .base.init = xcvr2450_init,
- .base.set_freq = xcvr2450_set_freq,
- .base.set_gain = xcvr2450_set_gain_tx,
- .base.set_tx_enable = xcvr2450_set_tx_enable,
- .base.atr_mask = TX_ATR_MASK,
- .base.atr_txval = 0x0,
- .base.atr_rxval = 0x0,
- .common = &db_xcvr2450_common,
-};
-
-/**************************************************
- * Set Registers
- **************************************************/
-static void
-send_reg(int v){
- // Send 24 bits, it keeps last 18 clocked in
- spi_transact(SPI_TXONLY,SPI_SS_RX_DB,v,24,SPIF_PUSH_FALL);
- //printf("xcvr2450: Setting reg %d to %x\n", (v&15), v);
-}
-
-static void
-set_reg_standby(struct db_xcvr2450_dummy *db){
- int reg_standby = (
- (db->common->d_mimo<<17) |
- (1<<16) |
- (1<<6) |
- (1<<5) |
- (1<<4) | 2);
- send_reg(reg_standby);
-}
-
-static void
-set_reg_int_divider(struct db_xcvr2450_dummy *db){
- int reg_int_divider = ((
- (db->common->d_frac_div & 0x03)<<16) |
- (db->common->d_int_div<<4) | 3);
- send_reg(reg_int_divider);
-}
-
-static void
-set_reg_frac_divider(struct db_xcvr2450_dummy *db){
- int reg_frac_divider = ((db->common->d_frac_div & 0xfffc)<<2) | 4;
- send_reg(reg_frac_divider);
-}
-
-static void
-set_reg_bandselpll(struct db_xcvr2450_dummy *db){
- int reg_bandselpll = ((db->common->d_mimo<<17) |
- (1<<16) |
- (1<<15) |
- (0<<11) | //this bit gets toggled
- (db->common->d_highband<<10) |
- (db->common->d_cp_current<<9) |
- (db->common->d_ref_div<<5) |
- (db->common->d_five_gig<<4) | 5);
- send_reg(reg_bandselpll);
- reg_bandselpll = ((db->common->d_mimo<<17) |
- (1<<16) |
- (1<<15) |
- (1<<11) |
- (db->common->d_highband<<10) |
- (db->common->d_cp_current<<9) |
- (db->common->d_ref_div<<5) |
- (db->common->d_five_gig<<4) | 5);
- send_reg(reg_bandselpll);
-}
-
-static void
-set_reg_cal(struct db_xcvr2450_dummy *db){
- // FIXME do calibration
- int reg_cal = (
- (1<<14) | 6);
- send_reg(reg_cal);
-}
-
-static void
-set_reg_lpf(struct db_xcvr2450_dummy *db){
- int reg_lpf = (
- (db->common->d_rssi_hbw<<15) |
- (db->common->d_txlpf_bw<<9) |
- (db->common->d_rxlpf_bw<<7) |
- (db->common->d_rxlpf_fine<<4) | 7);
- send_reg(reg_lpf);
-}
-
-static void
-set_reg_rxrssi_ctrl(struct db_xcvr2450_dummy *db){
- int reg_rxrssi_ctrl = (
- (db->common->d_rxvga_ser<<16) |
- (db->common->d_rssi_range<<15) |
- (db->common->d_rssi_mode<<14) |
- (db->common->d_rssi_mux<<12) |
- (1<<9) |
- (db->common->d_rx_hpf<<6) |
- (1<<4) | 8);
- send_reg(reg_rxrssi_ctrl);
-}
-
-static void
-set_reg_txlin_gain(struct db_xcvr2450_dummy *db){
- int reg_txlin_gain = (
- (db->common->d_txvga_ser<<14) |
- (db->common->d_tx_driver_lin<<12) |
- (db->common->d_tx_vga_lin<<10) |
- (db->common->d_tx_upconv_lin<<6) |
- (db->common->d_tx_bb_gain<<4) | 9);
- send_reg(reg_txlin_gain);
-}
-
-static void
-set_reg_pabias(struct db_xcvr2450_dummy *db){
- int reg_pabias = (
- (db->common->d_pabias_delay<<10) |
- (db->common->d_pabias<<4) | 10);
- send_reg(reg_pabias);
-}
-
-static void
-set_reg_rxgain(struct db_xcvr2450_dummy *db){
- int reg_rxgain = (
- (db->common->d_rx_rf_gain<<9) |
- (db->common->d_rx_bb_gain<<4) | 11);
- send_reg(reg_rxgain);
-}
-
-static void
-set_reg_txgain(struct db_xcvr2450_dummy *db){
- int reg_txgain = (
- (db->common->d_txgain<<4) | 12);
- send_reg(reg_txgain);
-}
-
-/**************************************************
- * GPIO
- **************************************************/
-static void
-set_gpio(struct db_xcvr2450_dummy *db){
- //set tx/rx gpio pins for auto tr
- int tx_enb_sel = (db->common->d_tx_enb)? TX_EN:0;
- int ad9515_sel = (db->common->d_ad9515_div == 3)? AD9515DIV:0;
- int rx_hp = (db->common->d_rx_hp_pin)? RX_HP:0;
- int tx_antsel = (db->common->d_tx_ant)? ANTSEL_TX2_RX1:ANTSEL_TX1_RX2;
- int rx_antsel = (db->common->d_rx_ant)? ANTSEL_TX2_RX1:ANTSEL_TX1_RX2;
- int tx_pa_sel = (db->common->d_five_gig)? LB_PA_OFF:HB_PA_OFF;
-
- /* FIXME better way to set rx and tx val for RX and TX banks */
- /* set rx bank */
- db->base.atr_rxval = EN|rx_hp|RX_EN;
- db->base.atr_txval = EN|rx_hp;
- set_atr_regs(GPIO_RX_BANK, (struct db_base *)db);
- /* set tx bank */
- db->base.atr_rxval = HB_PA_OFF|LB_PA_OFF|rx_antsel|ad9515_sel;
- db->base.atr_txval = tx_pa_sel|tx_antsel|tx_enb_sel|ad9515_sel;
- set_atr_regs(GPIO_TX_BANK, (struct db_base *)db);
-}
-
-/**************************************************
- * Init for TX and RX
- **************************************************/
-bool
-xcvr2450_init(struct db_base *dbb){
- struct db_xcvr2450_dummy *db = (struct db_xcvr2450_dummy *) dbb;
- /* Initialize chipset */
- clocks_enable_tx_dboard(true, MASTER_REF_CLK_DIV);
- set_gpio(db);
- set_reg_standby(db);
- set_reg_bandselpll(db);
- set_reg_cal(db);
- set_reg_lpf(db);
- set_reg_rxrssi_ctrl(db);
- set_reg_txlin_gain(db);
- set_reg_pabias(db);
- set_reg_rxgain(db);
- set_reg_txgain(db);
- //u2_fxpt_freq_t dc;
- //db->base.set_freq(dbb, U2_DOUBLE_TO_FXPT_FREQ(2.434e9), &dc);
- return true;
-}
-
-/**************************************************
- * Lock detect
- **************************************************/
-static bool
-lock_detect(){
- //true when the VCO/PLL lock detect bit is set.
- if(hal_gpio_read(GPIO_RX_BANK) & LOCKDET) {
- return true;
- }
- else { // Give it a second chance
- mdelay(1);
- if(hal_gpio_read(GPIO_RX_BANK) & LOCKDET)
- return true;
- else
- return false;
- }
-}
-
-/**************************************************
- * Set the freq
- **************************************************/
-bool
-xcvr2450_set_freq(struct db_base *dbb, u2_fxpt_freq_t freq, u2_fxpt_freq_t *dc){
- unsigned int scaler, div_factor, actual_div_q16;
- struct db_xcvr2450_dummy *db = (struct db_xcvr2450_dummy *) dbb;
- /* determine if the freq range is in low or high band */
- if (freq >= LB_FREQ_MIN && freq <= LB_FREQ_MAX) {
- db->common->d_five_gig = 0;
- scaler = 3;
- //printf("2.4-GHZ\n");
- } else if (freq >= HB_FREQ_MIN && freq <= HB_FREQ_MAX) {
- db->common->d_five_gig = 1;
- scaler = 5;
- //printf("5-GHZ\n");
- } else {
- printf("Out of range\n");
- return false;
- }
- /* set the highband bit */
- if(freq > U2_DOUBLE_TO_FXPT_FREQ(5.408e9)) {
- db->common->d_highband = 1;
- //printf("5-HB\n");
- }
- else {
- db->common->d_highband = 0;
- //printf("5-LB\n");
- }
- unsigned int loop_iter = 0;
- do { /* set the dividers so that the n divider is above the practical minimum */
- switch(loop_iter){
- case 0:
- db->common->d_ad9515_div = 3;
- db->common->d_ref_div = 1;
- break;
- case 1:
- db->common->d_ad9515_div = 2;
- db->common->d_ref_div = 2;
- break;
- default:
- db->common->d_ad9515_div = 3;
- db->common->d_ref_div = loop_iter;
- }
- loop_iter++;
- div_factor = db->common->d_ref_div*db->common->d_ad9515_div*4*MASTER_REF_CLK_DIV;
- actual_div_q16 = ((freq*div_factor)/(scaler*MASTER_CLK_RATE)) >> (U2_FPF_RP-16);
- } while (actual_div_q16 < N_DIV_MIN_Q16);
- /* calculate the divisors */
- db->common->d_int_div = actual_div_q16 >> 16;
- db->common->d_frac_div = actual_div_q16 & 0xffff; //isolate lower 16 bits
- /* calculate the dc freq */
- *dc = ((((u2_fxpt_freq_t)MASTER_CLK_RATE)*actual_div_q16*scaler) / div_factor) << (U2_FPF_RP-16);
- /*printf("scaler %d, div(int) %u, div_factor %d, ad9515_div %u, ref_div %u\n",
- scaler, db->common->d_int_div, div_factor, db->common->d_ad9515_div, db->common->d_ref_div);
- printf("actual div %u, Target Freq %uKHz, Actual Freq %uKHz\n",
- actual_div_q16, u2_fxpt_freq_round_to_int(freq/1000), u2_fxpt_freq_round_to_int(*dc/1000));
- */
- set_gpio(db);
- set_reg_int_divider(db);
- set_reg_frac_divider(db);
- set_reg_bandselpll(db);
-
- bool ok = lock_detect();
- if(!ok){
- //printf("Fail lock detect %uKHz\n", u2_fxpt_freq_round_to_int(freq/1000));
- }
- return ok;
-}
-
-/**************************************************
- * Set RX Gain
- **************************************************/
-bool
-xcvr2450_set_gain_rx(struct db_base *dbb, u2_fxpt_gain_t gain){
- struct db_xcvr2450_dummy *db = (struct db_xcvr2450_dummy *) dbb;
- //ensure gain is within range
- if(!(gain >= db->base.gain_min && gain <= db->base.gain_max)) {
- return false;
- }
- // Split the gain between RF and baseband
- // This is experimental, not prescribed
- if(gain < U2_DOUBLE_TO_FXPT_GAIN(30.0)) {
- db->common->d_rx_rf_gain = 0; // 0 dB RF gain
- db->common->d_rx_bb_gain = u2_fxpt_gain_round_to_int(gain/2);
- }
- else if(gain >= U2_DOUBLE_TO_FXPT_GAIN(30.0) && gain < U2_DOUBLE_TO_FXPT_GAIN(61.0)) {
- db->common->d_rx_rf_gain = 2; // 15 dB RF gain
- db->common->d_rx_bb_gain = u2_fxpt_gain_round_to_int((gain-U2_DOUBLE_TO_FXPT_GAIN(15.0))/2);
- }
- else if(gain >= U2_DOUBLE_TO_FXPT_GAIN(61.0)) {
- db->common->d_rx_rf_gain = 3; // 30.5 dB RF gain
- db->common->d_rx_bb_gain = u2_fxpt_gain_round_to_int((gain-U2_DOUBLE_TO_FXPT_GAIN(30.5))/2);
- }
- //printf("RX RF Gain %u, RX BB Gain %u\n", db->common->d_rx_rf_gain, db->common->d_rx_bb_gain);
- set_reg_rxgain(db);
- return true;
-}
-
-/**************************************************
- * Set TX Gain
- **************************************************/
-bool
-xcvr2450_set_gain_tx(struct db_base *dbb, u2_fxpt_gain_t gain){
- struct db_xcvr2450_dummy *db = (struct db_xcvr2450_dummy *) dbb;
- //ensure gain in within range
- if(!(gain >= db->base.gain_min && gain <= db->base.gain_max)) {
- return false;
- }
- //scale for register and set
- db->common->d_txgain = (gain*63)/db->base.gain_max;
- //printf("TX Gain %u, TX Reg %u\n", u2_fxpt_gain_round_to_int(gain), db->common->d_txgain);
- set_reg_txgain(db);
- return true;
-}
-
-/**************************************************
- * Set TX Enable
- **************************************************/
-bool
-xcvr2450_set_tx_enable(struct db_base *dbb, bool on){
- struct db_xcvr2450_dummy *db = (struct db_xcvr2450_dummy *) dbb;
- db->common->d_tx_enb = on;
- set_gpio(db);
- return true;
-}
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