diff options
Diffstat (limited to 'firmware/microblaze/include')
| -rw-r--r-- | firmware/microblaze/include/.gitignore | 2 | ||||
| -rw-r--r-- | firmware/microblaze/include/Makefile.am | 31 | ||||
| -rw-r--r-- | firmware/microblaze/include/network.h | 82 | ||||
| -rw-r--r-- | firmware/microblaze/include/usrp2_cdefs.h | 34 | ||||
| -rw-r--r-- | firmware/microblaze/include/usrp2_clock_bits.h | 55 | ||||
| -rw-r--r-- | firmware/microblaze/include/usrp2_eth_packet.h | 405 | ||||
| -rw-r--r-- | firmware/microblaze/include/usrp2_fpga_regs.h | 80 | ||||
| -rw-r--r-- | firmware/microblaze/include/usrp2_i2c_addr.h | 82 | ||||
| -rw-r--r-- | firmware/microblaze/include/usrp2_ipv4_packet.h | 52 | ||||
| -rw-r--r-- | firmware/microblaze/include/usrp2_types.h | 112 | ||||
| -rw-r--r-- | firmware/microblaze/include/usrp2_udp_packet.h | 37 | ||||
| -rw-r--r-- | firmware/microblaze/include/vrt/bits.h | 92 | ||||
| -rw-r--r-- | firmware/microblaze/include/vrt/types.h | 138 |
13 files changed, 1202 insertions, 0 deletions
diff --git a/firmware/microblaze/include/.gitignore b/firmware/microblaze/include/.gitignore new file mode 100644 index 000000000..b336cc7ce --- /dev/null +++ b/firmware/microblaze/include/.gitignore @@ -0,0 +1,2 @@ +/Makefile +/Makefile.in diff --git a/firmware/microblaze/include/Makefile.am b/firmware/microblaze/include/Makefile.am new file mode 100644 index 000000000..1e4eadfe6 --- /dev/null +++ b/firmware/microblaze/include/Makefile.am @@ -0,0 +1,31 @@ +# +# Copyright 2008, 2010 Free Software Foundation, Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +include $(top_srcdir)/Makefile.common + +noinst_HEADERS = \ + usrp2_cdefs.h \ + usrp2_eth_packet.h \ + usrp2_ipv4_packet.h \ + usrp2_udp_packet.h \ + usrp2_fpga_regs.h \ + usrp2_i2c_addr.h \ + usrp2_clock_bits.h \ + usrp2_types.h \ + network.h \ + vrt/bits.h \ + vrt/types.h diff --git a/firmware/microblaze/include/network.h b/firmware/microblaze/include/network.h new file mode 100644 index 000000000..4c6c43585 --- /dev/null +++ b/firmware/microblaze/include/network.h @@ -0,0 +1,82 @@ +/* -*- c++ -*- */ +/* + * Copyright 2009 Free Software Foundation, Inc. + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +/*! + * Various networking related structures and defines + */ + +#ifndef INCLUDED_NETWORK_H +#define INCLUDED_NETWORK_H + +#include <stdint.h> +#include <stdbool.h> + +// Ethernet MAC address + +typedef struct { + uint8_t addr[6]; +} eth_mac_addr_t; + + +// IPv4 address + +#ifndef __cplusplus + +struct in_addr { + uint32_t s_addr; +}; + +static inline struct in_addr +make_in_addr(uint32_t addr) +{ + struct in_addr r; + r.s_addr = addr; + return r; +} + +static inline bool +in_addr_eq(const struct in_addr a, const struct in_addr b) +{ + return a.s_addr == b.s_addr; +} + +#define MK_IP_ADDR(a, b, c, d) \ + (((a) << 24) | ((b) << 16) | ((c) << 8) | (d)) + + +// IPv4 AF_INET sockets: + +struct sockaddr_in { + short sin_family; // e.g. AF_INET, AF_INET6 + unsigned short sin_port; // e.g. htons(3490) + struct in_addr sin_addr; +}; + +static inline struct sockaddr_in +make_sockaddr_in(struct in_addr addr, int port) +{ + struct sockaddr_in r; + r.sin_family = 0; // not used + r.sin_port = port; + r.sin_addr = addr; + return r; +} + +#endif + +#endif /* INCLUDED_NETWORK_H */ diff --git a/firmware/microblaze/include/usrp2_cdefs.h b/firmware/microblaze/include/usrp2_cdefs.h new file mode 100644 index 000000000..71395cda8 --- /dev/null +++ b/firmware/microblaze/include/usrp2_cdefs.h @@ -0,0 +1,34 @@ +/* -*- c++ -*- */ +/* + * Copyright 2007 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#ifndef INCLUDED_USRP2_CDEFS_H +#define INCLUDED_USRP2_CDEFS_H + +/* C++ needs to know that types and declarations are C, not C++. */ +#ifdef __cplusplus +# define __U2_BEGIN_DECLS extern "C" { +# define __U2_END_DECLS } +#else +# define __U2_BEGIN_DECLS +# define __U2_END_DECLS +#endif + +#endif /* INCLUDED_USRP2_CDEFS_H */ diff --git a/firmware/microblaze/include/usrp2_clock_bits.h b/firmware/microblaze/include/usrp2_clock_bits.h new file mode 100644 index 000000000..d2052e941 --- /dev/null +++ b/firmware/microblaze/include/usrp2_clock_bits.h @@ -0,0 +1,55 @@ +// +// Copyright 2010 Ettus Research LLC +// +/* + * Copyright 2008 Free Software Foundation, Inc. + * + * This file is part of GNU Radio + * + * GNU Radio is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3, or (at your option) + * any later version. + * + * GNU Radio is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ +#ifndef INCLUDED_USRP2_CLOCK_BITS_H +#define INCLUDED_USRP2_CLOCK_BITS_H + +#define _MC_WE_LOCK 0x0001 +#define _MC_MIMO_CLK_INPUT 0x0002 // else SMA input + +/* + * Derived masks (use these): + * + * We get our input from 1 of three places: + * Our free running oscilator, our SMA connector, or from the MIMO connector + */ +#define MC_WE_DONT_LOCK 0x0000 +#define MC_WE_LOCK_TO_SMA (_MC_WE_LOCK | 0) +#define MC_WE_LOCK_TO_MIMO (_MC_WE_LOCK | _MC_MIMO_CLK_INPUT) + +/* + * Independent of the source of the clock, we may or may not drive our + * clock onto the mimo connector. Note that there are dedicated clock + * signals in each direction, so disaster doesn't occurs if we're + * unnecessarily providing clock. + */ +#define MC_PROVIDE_CLK_TO_MIMO 0x0004 + +#define MC_REF_CLK_MASK 0x0f + +#define MC_PPS_SOURCE_SMA (0x00 << 4) +#define MC_PPS_SOURCE_MIMO (0x01 << 4) + +#define MC_PPS_POLARITY_NEG (0x00 << 5) +#define MC_PPS_POLARITY_POS (0x01 << 5) + +#endif /* INCLUDED_USRP2_CLOCK_BITS_H */ diff --git a/firmware/microblaze/include/usrp2_eth_packet.h b/firmware/microblaze/include/usrp2_eth_packet.h new file mode 100644 index 000000000..7d5b84f00 --- /dev/null +++ b/firmware/microblaze/include/usrp2_eth_packet.h @@ -0,0 +1,405 @@ +// +// Copyright 2010 Ettus Research LLC +// +/* + * Copyright 2007,2008,2009 Free Software Foundation, Inc. + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef INCLUDED_USRP2_ETH_PACKET_H +#define INCLUDED_USRP2_ETH_PACKET_H + +#include "usrp2_cdefs.h" +#include "network.h" + +__U2_BEGIN_DECLS + +#define U2_DATA_ETHERTYPE 0xBEEF // used in our data frames +#define U2_CTRL_ETHERTYPE 0xBEF0 // used in our control frames +#define MAC_CTRL_ETHERTYPE 0x8808 // used in PAUSE frames +#define ETHERTYPE_IPV4 0x0800 // used in ip packets + +/* + * All these data structures are BIG-ENDIAN on the wire + */ + +// FIXME gcc specific. Really ought to come from compiler.h +#define _AL4 __attribute__((aligned (4))) + +/*! + * \brief The classic 14-byte ethernet header + */ +typedef struct { + eth_mac_addr_t dst; + eth_mac_addr_t src; + uint16_t ethertype; +} __attribute__((packed)) u2_eth_hdr_t; + +/*! + * \brief consolidated packet: ethernet header + */ +typedef struct { + u2_eth_hdr_t ehdr; +} u2_eth_packet_t; + +/*! + * \brief consolidated packet: padding + ethernet header + */ +typedef struct { + uint16_t padding; + u2_eth_hdr_t ehdr; +} u2_eth_packet_pad_before_t; + +/* + * Opcodes for control channel + * + * Reply opcodes are the same as the request opcode with the OP_REPLY_BIT set (0x80). + */ +#define OP_REPLY_BIT 0x80 + +#define OP_EOP 0 // marks last subpacket in packet + +#define OP_ID 1 +#define OP_ID_REPLY (OP_ID | OP_REPLY_BIT) +#define OP_BURN_MAC_ADDR 2 +#define OP_BURN_MAC_ADDR_REPLY (OP_BURN_MAC_ADDR | OP_REPLY_BIT) +#define OP_CONFIG_RX_V2 4 +#define OP_CONFIG_RX_REPLY_V2 (OP_CONFIG_RX_V2 | OP_REPLY_BIT) +#define OP_CONFIG_TX_V2 5 +#define OP_CONFIG_TX_REPLY_V2 (OP_CONFIG_TX_V2 | OP_REPLY_BIT) +#define OP_START_RX_STREAMING 6 +#define OP_START_RX_STREAMING_REPLY (OP_START_RX_STREAMING | OP_REPLY_BIT) +#define OP_STOP_RX 7 +#define OP_STOP_RX_REPLY (OP_STOP_RX | OP_REPLY_BIT) +#define OP_CONFIG_CLOCK 8 +#define OP_CONFIG_CLOCK_REPLY (OP_CONFIG_CLOCK | OP_REPLY_BIT) +#define OP_DBOARD_INFO 9 +#define OP_DBOARD_INFO_REPLY (OP_DBOARD_INFO | OP_REPLY_BIT) +#define OP_PEEK 11 +#define OP_PEEK_REPLY (OP_PEEK | OP_REPLY_BIT) +#define OP_POKE 12 +#define OP_POKE_REPLY (OP_POKE | OP_REPLY_BIT) +#define OP_SET_TX_LO_OFFSET 13 +#define OP_SET_TX_LO_OFFSET_REPLY (OP_SET_TX_LO_OFFSET | OP_REPLY_BIT) +#define OP_SET_RX_LO_OFFSET 14 +#define OP_SET_RX_LO_OFFSET_REPLY (OP_SET_RX_LO_OFFSET | OP_REPLY_BIT) +#define OP_RESET_DB 15 +#define OP_RESET_DB_REPLY (OP_RESET_DB | OP_REPLY_BIT) +#define OP_GPIO_SET_DDR 17 +#define OP_GPIO_SET_DDR_REPLY (OP_GPIO_SET_DDR | OP_REPLY_BIT) +#define OP_GPIO_SET_SELS 18 +#define OP_GPIO_SET_SELS_REPLY (OP_GPIO_SET_SELS | OP_REPLY_BIT) +#define OP_GPIO_READ 19 +#define OP_GPIO_READ_REPLY (OP_GPIO_READ | OP_REPLY_BIT) +#define OP_GPIO_WRITE 20 +#define OP_GPIO_WRITE_REPLY (OP_GPIO_WRITE | OP_REPLY_BIT) +#define OP_GPIO_STREAM 21 +#define OP_GPIO_STREAM_REPLY (OP_GPIO_STREAM | OP_REPLY_BIT) +#define OP_SET_TIME 22 +#define OP_SET_TIME_REPLY (OP_SET_TIME | OP_REPLY_BIT) + +/* + * All subpackets are a multiple of 4 bytes long. + * All subpackets start with an 8-bit opcode, an 8-bit len and an 8-bit rid. + */ +#define MAX_SUBPKT_LEN 252 + +/*! + * \brief Generic request and reply packet + * + * Used by: + * OP_EOP, OP_BURN_MAC_ADDR_REPLY, OP_START_RX_STREAMING_REPLY, + * OP_STOP_RX_REPLY, OP_DBOARD_INFO, OP_SYNC_TO_PPS + */ +typedef struct { + uint8_t opcode; + uint8_t len; + uint8_t rid; + uint8_t ok; // bool +} _AL4 op_generic_t; + +/*! + * \brief Set the ticks and secs on a usrp2 + */ +typedef struct { + uint8_t opcode; + uint8_t len; + uint8_t rid; + uint8_t type; + uint32_t time_secs; + uint32_t time_ticks; +} _AL4 op_set_time_t; + +typedef enum { + OP_SET_TIME_TYPE_NOW, + OP_SET_TIME_TYPE_PPS +} op_set_time_type_t; + +/*! + * \brief Reply info from a USRP2 + */ +typedef struct { + uint8_t opcode; + uint8_t len; + uint8_t rid; + uint8_t mbz; + eth_mac_addr_t addr; + uint16_t hw_rev; + uint8_t fpga_md5sum[16]; + uint8_t sw_md5sum[16]; +} _AL4 op_id_reply_t; + +typedef struct { + uint8_t opcode; + uint8_t len; + uint8_t rid; + uint8_t mbz; + uint32_t items_per_frame; // # of 32-bit data items; MTU=1500: [9,371] + uint32_t time_secs; + uint32_t time_ticks; +} _AL4 op_start_rx_streaming_t; + +typedef struct { + uint8_t opcode; + uint8_t len; + uint8_t rid; + eth_mac_addr_t addr; +} _AL4 op_burn_mac_addr_t; + +/*! + * \brief Configure receiver + */ +typedef struct { + uint8_t opcode; + uint8_t len; + uint8_t rid; + uint8_t mbz; + // bitmask indicating which of the following fields are valid + uint16_t valid; + uint16_t gain; // fxpt_db (Q9.7) + uint32_t freq_hi; // high 32-bits of 64-bit fxpt_freq (Q44.20) + uint32_t freq_lo; // low 32-bits of 64-bit fxpt_freq (Q44.20) + uint32_t decim; // desired decimation factor (NOT -1) + uint32_t scale_iq; // (scale_i << 16) | scale_q [16.0 format] +} _AL4 op_config_rx_v2_t; + +// bitmask for "valid" field. If the bit is set, there's +// meaningful data in the corresonding field. + +#define CFGV_GAIN 0x0001 // gain field is valid +#define CFGV_FREQ 0x0002 // target_freq field is valid +#define CFGV_INTERP_DECIM 0x0004 // interp or decim is valid +#define CFGV_SCALE_IQ 0x0008 // scale_iq is valid + +/*! + * \brief Reply to receiver configuration + */ +typedef struct { + uint8_t opcode; + uint8_t len; + uint8_t rid; + uint8_t mbz; + + uint16_t ok; // config was successful (bool) + uint16_t inverted; // spectrum is inverted (bool) + + // RF frequency that corresponds to DC in the IF (fxpt_freq) + uint32_t baseband_freq_hi; + uint32_t baseband_freq_lo; + // DDC frequency (fxpt_freq) + uint32_t ddc_freq_hi; + uint32_t ddc_freq_lo; + // residual frequency (fxpt_freq) + uint32_t residual_freq_hi; + uint32_t residual_freq_lo; + +} _AL4 op_config_rx_reply_v2_t; + +/*! + * \brief Configure transmitter + */ +typedef struct { + uint8_t opcode; + uint8_t len; + uint8_t rid; + uint8_t mbz; + + // bitmask indicating which of the following fields are valid + uint16_t valid; + uint16_t gain; // fxpt_db (Q9.7) + uint32_t freq_hi; // high 32-bits of 64-bit fxpt_freq (Q44.20) + uint32_t freq_lo; // low 32-bits of 64-bit fxpt_freq (Q44.20) + uint32_t interp; // desired interpolation factor (NOT -1) + uint32_t scale_iq; // (scale_i << 16) | scale_q [16.0 format] +} _AL4 op_config_tx_v2_t; + +/*! + * \brief Reply to configure transmitter + */ +typedef struct { + uint8_t opcode; + uint8_t len; + uint8_t rid; + uint8_t mbz; + + uint16_t ok; // config was successful (bool) + uint16_t inverted; // spectrum is inverted (bool) + + // RF frequency that corresponds to DC in the IF (fxpt_freq) + uint32_t baseband_freq_hi; + uint32_t baseband_freq_lo; + // DUC frequency (fxpt_freq) + uint32_t duc_freq_hi; + uint32_t duc_freq_lo; + // residual frequency (fxpt_freq) + uint32_t residual_freq_hi; + uint32_t residual_freq_lo; + +} _AL4 op_config_tx_reply_v2_t; + +/*! + * \brief Configure clocking, etc (uses generic reply) + */ +typedef struct { + uint8_t opcode; + uint8_t len; + uint8_t rid; + uint8_t flags; +} op_config_clock_t; + +/*! + * \brief High-level information about daughterboards + */ +typedef struct { + int32_t dbid; //< d'board ID (-1 none, -2 invalid eeprom) + uint32_t freq_min_hi; //< high 32-bits of 64-bit fxpt_freq (Q44.20) + uint32_t freq_min_lo; //< low 32-bits of 64-bit fxpt_freq (Q44.20) + uint32_t freq_max_hi; //< high 32-bits of 64-bit fxpt_freq (Q44.20) + uint32_t freq_max_lo; //< low 32-bits of 64-bit fxpt_freq (Q44.20) + uint16_t gain_min; //< min gain that can be set. fxpt_db (Q9.7) + uint16_t gain_max; //< max gain that can be set. fxpt_db (Q9.7) + uint16_t gain_step_size; //< fxpt_db (Q9.7) +} u2_db_info_t; + + +/*! + * \brief Reply to d'board info request + */ +typedef struct { + uint8_t opcode; + uint8_t len; + uint8_t rid; + uint8_t ok; // request was successful (bool) + + u2_db_info_t tx_db_info; + u2_db_info_t rx_db_info; +} _AL4 op_dboard_info_reply_t; + +/*! + * \brief Read from Wishbone memory + */ +typedef struct { + uint8_t opcode; + uint8_t len; + uint8_t rid; + uint8_t mbz; + uint32_t addr; + uint32_t bytes; +} _AL4 op_peek_t; + +/*! + * \brief Write to Wishbone memory + */ +typedef struct { + uint8_t opcode; + uint8_t len; + uint8_t rid; + uint8_t mbz; + uint32_t addr; + // Words follow here +} _AL4 op_poke_t; + +/* + * Common structure for commands with a single frequency param + * (e.g., set_*_lo_offset, set_*_bw) + */ +typedef struct { + uint8_t opcode; + uint8_t len; + uint8_t rid; + uint8_t mbz; + uint32_t freq_hi; //< high 32-bits of 64-bit fxpt_freq (Q44.20) + uint32_t freq_lo; //< low 32-bits of 64-bit fxpt_freq (Q44.20) +} _AL4 op_freq_t; + +/* + * Structures for commands in GPIO system + */ +typedef struct { + uint8_t opcode; // OP_GPIO_SET_DDR, OP_GPIO_WRITE, OP_GPIO_STREAM + uint8_t len; + uint8_t rid; + uint8_t bank; + uint16_t value; + uint16_t mask; +} _AL4 op_gpio_t; + +typedef struct { + uint8_t opcode; // OP_GPIO_SET_SELS + uint8_t len; + uint8_t rid; + uint8_t bank; + uint8_t sels[16]; +} _AL4 op_gpio_set_sels_t; + +typedef struct { + uint8_t opcode; // OP_GPIO_READ_REPLY + uint8_t len; + uint8_t rid; + uint8_t ok; + uint16_t mbz; + uint16_t value; +} _AL4 op_gpio_read_reply_t; + +/* + * ================================================================ + * union of all of subpacket types + * ================================================================ + */ +typedef union { + + op_generic_t op_generic; + op_id_reply_t op_id_reply; + op_start_rx_streaming_t op_start_rx_streaming; + op_burn_mac_addr_t op_burn_mac_addr; + op_config_rx_v2_t op_config_rx_v2; + op_config_rx_reply_v2_t op_config_rx_reply_v2; + op_config_tx_v2_t op_config_tx_v2; + op_config_tx_reply_v2_t op_config_tx_reply_v2; + op_config_clock_t op_config_clock; + op_peek_t op_peek; + op_poke_t op_poke; + op_freq_t op_freq; + op_gpio_t op_gpio; + op_gpio_set_sels_t op_gpio_set_sels; + op_gpio_read_reply_t op_gpio_read_reply; + op_set_time_t op_set_time; + +} u2_subpkt_t; + + +__U2_END_DECLS + +#endif /* INCLUDED_USRP2_ETH_PACKET_H */ diff --git a/firmware/microblaze/include/usrp2_fpga_regs.h b/firmware/microblaze/include/usrp2_fpga_regs.h new file mode 100644 index 000000000..b0f83df60 --- /dev/null +++ b/firmware/microblaze/include/usrp2_fpga_regs.h @@ -0,0 +1,80 @@ +/* -*- c++ -*- */ +/* + * Copyright 2007 Free Software Foundation, Inc. + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef INCLUDED_USRP2_FPGA_REGS_H +#define INCLUDED_USSRP2_FPGA_REGS_H + +#include "usrp2_cdefs.h" + +__U2_BEGIN_DECLS + +// ---------------------------------------------------------------- + +#define DSP_CORE_TX_BASE 128 + +// DUC center frequency tuning word (phase increment) +#define FR_TX_FREQ_0 (0 + DSP_CORE_TX_BASE) + +// I & Q output scaling, 16.0 format ((I_SCALE << 16) | Q_SCALE) +#define FR_TX_SCALE_0 (1 + DSP_CORE_TX_BASE) + +// Tx interpolation rate (set to 1 less than desired rate) +#define FR_TX_INTERP_RATE_0 (2 + DSP_CORE_TX_BASE) + +// Write 1 (actually anything) to clear tx state +#define FR_TX_CLEAR_STATE_0 (3 + DSP_CORE_TX_BASE) + +// ---------------------------------------------------------------- + +#define DSP_CORE_RX_BASE 160 + +// DDC center frequency tuning word (phase increment) +#define FR_RX_FREQ_0 (0 + DSP_CORE_RX_BASE) + +// I & Q input scaling, 16.0 format ((I_SCALE << 16) | Q_SCALE) +#define FR_RX_SCALE_0 (1 + DSP_CORE_RX_BASE) + +// Rx decimation rate (set to 1 less than desired rate) +#define FR_RX_DECIM_RATE_0 (2 + DSP_CORE_RX_BASE) + +// The next two registers concatenated are the Rx command register. +// +// Writing FR_RX_TIME_TO_RX_0 writes the concatenated value into the +// cmd queue. Thus, if you're writing both, be sure to write +// FR_RX_QTY_0 first. +// +// +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ +// | Timestamp | +// +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + +#define FR_RX_TIME_TO_RX (3 + DSP_CORE_RX_BASE) + +// 23-bits 9-bits +// +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ +// | number_of_lines | lines_per_frame | +// +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + +#define FR_RX_QTY_0 (4 + DSP_CORE_RX_BASE) + +// write a 1 (anything actually) to clear the overrun +#define FR_RX_CLR_OVERRUN_0 (5 + DSP_CORE_RX_BASE) + + +__U2_END_DECLS + +#endif /* INCLUDED_USRP2_FPGA_REGS_H */ diff --git a/firmware/microblaze/include/usrp2_i2c_addr.h b/firmware/microblaze/include/usrp2_i2c_addr.h new file mode 100644 index 000000000..f25996903 --- /dev/null +++ b/firmware/microblaze/include/usrp2_i2c_addr.h @@ -0,0 +1,82 @@ +/* -*- c++ -*- */ +/* + * Copyright 2004,2007 Free Software Foundation, Inc. + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef INCLUDED_USRP2_I2C_ADDR_H +#define INCLUDED_USRP2_I2C_ADDR_H + +#include "usrp2_cdefs.h" + +__U2_BEGIN_DECLS + +// I2C addresses + +#define I2C_DEV_EEPROM 0x50 // 24LC02[45]: 7-bits 1010xxx + +#define I2C_ADDR_MBOARD (I2C_DEV_EEPROM | 0x0) +#define I2C_ADDR_TX_A (I2C_DEV_EEPROM | 0x4) +#define I2C_ADDR_RX_A (I2C_DEV_EEPROM | 0x5) + + +// format of USRP2 motherboard rom +// 00: 0x00 h/w rev (LSB) +// 01: 0x00 h/w rev (MSB) +// 02: 0x00 MAC addr 0 +// 03: 0x50 MAC addr 1 +// 04: 0xC2 MAC addr 2 +// 05: 0x85 MAC addr 3 +// 06: 0x3. MAC addr 4 +// 07: 0x.. MAC addr 5 + +#define MBOARD_REV_LSB 0x00 +#define MBOARD_REV_MSB 0x01 +#define MBOARD_MAC_ADDR 0x02 + + +// format of daughterboard EEPROM +// 00: 0xDB code for ``I'm a daughterboard'' +// 01: .. Daughterboard ID (LSB) +// 02: .. Daughterboard ID (MSB) +// 03: .. io bits 7-0 direction (bit set if it's an output from m'board) +// 04: .. io bits 15-8 direction (bit set if it's an output from m'board) +// 05: .. ADC0 DC offset correction (LSB) +// 06: .. ADC0 DC offset correction (MSB) +// 07: .. ADC1 DC offset correction (LSB) +// 08: .. ADC1 DC offset correction (MSB) +// ... +// 1f: .. negative of the sum of bytes [0x00, 0x1e] + +#define DB_EEPROM_MAGIC 0x00 +#define DB_EEPROM_MAGIC_VALUE 0xDB +#define DB_EEPROM_ID_LSB 0x01 +#define DB_EEPROM_ID_MSB 0x02 +#define DB_EEPROM_OE_LSB 0x03 +#define DB_EEPROM_OE_MSB 0x04 +#define DB_EEPROM_OFFSET_0_LSB 0x05 // offset correction for ADC or DAC 0 +#define DB_EEPROM_OFFSET_0_MSB 0x06 +#define DB_EEPROM_OFFSET_1_LSB 0x07 // offset correction for ADC or DAC 1 +#define DB_EEPROM_OFFSET_1_MSB 0x08 +#define DB_EEPROM_CHKSUM 0x1f + +#define DB_EEPROM_CLEN 0x20 // length of common portion of eeprom + +#define DB_EEPROM_CUSTOM_BASE DB_EEPROM_CLEN // first avail offset for + // daughterboard specific use +__U2_END_DECLS + +#endif /* INCLUDED_USRP2_I2C_ADDR_H */ + diff --git a/firmware/microblaze/include/usrp2_ipv4_packet.h b/firmware/microblaze/include/usrp2_ipv4_packet.h new file mode 100644 index 000000000..2822dee89 --- /dev/null +++ b/firmware/microblaze/include/usrp2_ipv4_packet.h @@ -0,0 +1,52 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#ifndef INCLUDED_USRP2_IPV4_PACKET_H +#define INCLUDED_USRP2_IPV4_PACKET_H + +#include "usrp2_cdefs.h" +#include "network.h" + +__U2_BEGIN_DECLS + +/*! + * \brief The classic ipv4 header + */ +typedef struct { + unsigned int ip_v:4; /* both fields are 4 bits */ + unsigned int ip_hl:4; + uint8_t ip_tos; + uint16_t ip_len; + uint16_t ip_id; + uint16_t ip_off; + uint8_t ip_ttl; + uint8_t ip_p; + uint16_t ip_sum; + struct in_addr ip_src; + struct in_addr ip_dst; +} __attribute__((packed)) u2_ipv4_hdr_t; + +#define IP_RF 0x8000 /* reserved fragment flag */ +#define IP_DF 0x4000 /* dont fragment flag */ +#define IP_MF 0x2000 /* more fragments flag */ +#define IP_OFFMASK 0x1fff /* mask for fragmenting bits */ + +#define IP_PROTO_UDP 17 + +__U2_END_DECLS + +#endif /* INCLUDED_USRP2_IPV4_PACKET_H */ diff --git a/firmware/microblaze/include/usrp2_types.h b/firmware/microblaze/include/usrp2_types.h new file mode 100644 index 000000000..dd2bcf1ed --- /dev/null +++ b/firmware/microblaze/include/usrp2_types.h @@ -0,0 +1,112 @@ +/* -*- c++ -*- */ +/* + * Copyright 2008 Free Software Foundation, Inc. + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ +#ifndef INCLUDED_USRP2_TYPES_H +#define INCLUDED_USRP2_TYPES_H + +#include <usrp2_cdefs.h> +#include <stdint.h> + +__U2_BEGIN_DECLS + +/*! + * \brief Fixed point representation of a frequency in Hertz (VITA-49 compatible) + * + * 64-bit two's complement, with the radix point 20 bits up from the bottom. + * Q44.20 format (20 bits to the right of the radix point) + * + * Values range from +/- 8.79 terahertz with a resolution of 0.95 microhertz. + */ +typedef int64_t u2_fxpt_freq_t; + +#define U2_FPF_RP 20 // location of radix point in u2_fxpt_freq_t + +// macro so we can init structs at compile time +#define U2_DOUBLE_TO_FXPT_FREQ(f) (int64_t)((f) * (1LL << U2_FPF_RP)) + +static inline u2_fxpt_freq_t +u2_double_to_fxpt_freq(double f) +{ + return U2_DOUBLE_TO_FXPT_FREQ(f); +} + +static inline int +u2_fxpt_freq_round_to_int(u2_fxpt_freq_t fx) +{ + return (int)((fx+(1<<(U2_FPF_RP-1)))>>U2_FPF_RP); +} + +static inline double +u2_fxpt_freq_to_double(u2_fxpt_freq_t fx) +{ + return ((double) fx) * 1.0/(1 << U2_FPF_RP); +} + +static inline uint32_t +u2_fxpt_freq_hi(u2_fxpt_freq_t f) +{ + return ((f >> 32) & 0xffffffff); +} + +static inline uint32_t +u2_fxpt_freq_lo(u2_fxpt_freq_t f) +{ + return (f & 0xffffffff); +} + +static inline u2_fxpt_freq_t +u2_fxpt_freq_from_hilo(uint32_t hi, uint32_t lo) +{ + return (((u2_fxpt_freq_t) hi) << 32) | lo; +} + +/*! + * \brief Fixed point representation of a gain in dB (VITA-49 compatible) + * + * 16-bit two's complement, with the radix point 7 bits up from the bottom. + * Q9.7 format (7 bits to the right of the radix point) + */ +typedef int16_t u2_fxpt_gain_t; + +#define U2_FPG_RP 7 // location of radix point in u2_fxpt_gain_t + +// macro so we can init structs at compile time +#define U2_DOUBLE_TO_FXPT_GAIN(g) (int16_t)((g) * (1 << U2_FPG_RP)) + +static inline u2_fxpt_gain_t +u2_double_to_fxpt_gain(double g) +{ + return U2_DOUBLE_TO_FXPT_GAIN(g); +} + +static inline float +u2_fxpt_gain_to_double(u2_fxpt_gain_t fx) +{ + return ((double) fx) * 1.0/(1 << U2_FPG_RP); +} + +static inline int +u2_fxpt_gain_round_to_int(u2_fxpt_gain_t fx) +{ + return (int)((fx+(1<<(U2_FPG_RP-1)))>>U2_FPG_RP); +} + + +__U2_END_DECLS + + +#endif /* INCLUDED_USRP2_TYPES_H */ diff --git a/firmware/microblaze/include/usrp2_udp_packet.h b/firmware/microblaze/include/usrp2_udp_packet.h new file mode 100644 index 000000000..4739d4c49 --- /dev/null +++ b/firmware/microblaze/include/usrp2_udp_packet.h @@ -0,0 +1,37 @@ +// +// Copyright 2010 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + +#ifndef INCLUDED_USRP2_UDP_PACKET_H +#define INCLUDED_USRP2_UDP_PACKET_H + +#include "usrp2_cdefs.h" + +__U2_BEGIN_DECLS + +/*! + * \brief The classic udp header + */ +typedef struct { + uint16_t src_port; + uint16_t dst_port; + uint16_t length; + uint16_t checksum; +} __attribute__((packed)) u2_udp_hdr_t; + +__U2_END_DECLS + +#endif /* INCLUDED_USRP2_UDP_PACKET_H */ diff --git a/firmware/microblaze/include/vrt/bits.h b/firmware/microblaze/include/vrt/bits.h new file mode 100644 index 000000000..54eeec7b4 --- /dev/null +++ b/firmware/microblaze/include/vrt/bits.h @@ -0,0 +1,92 @@ +/* -*- c++ -*- */ +/* + * Copyright 2009 Free Software Foundation, Inc. + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ +#ifndef INCLUDED_VRT_BITS_H +#define INCLUDED_VRT_BITS_H + +#include <stdint.h> + + +/* VRT Header bits */ + +#define VRTH_PT_MASK (0xf << 28) +#define VRTH_PT_IF_DATA_NO_SID (0x0 << 28) // IF-Data, no stream id +#define VRTH_PT_IF_DATA_WITH_SID (0x1 << 28) // IF-Data, w/ stream id +#define VRTH_PT_EXT_DATA_NO_SID (0x2 << 28) +#define VRTH_PT_EXT_DATA_WITH_SID (0x3 << 28) +#define VRTH_PT_IF_CONTEXT (0x4 << 28) +#define VRTH_PT_EXT_CONTEXT (0x5 << 28) + +#define VRTH_HAS_CLASSID (1 << 27) +#define VRTH_HAS_TRAILER (1 << 26) // Data pkts only +#define VRTH_START_OF_BURST (1 << 25) // Data (Tx) pkts only +#define VRTH_END_OF_BURST (1 << 24) // Data (Tx) pkts only +#define VRTH_TSM (1 << 24) // Context pkts only + +#define VRTH_TSI_MASK (0x3 << 22) +#define VRTH_TSI_NONE (0x0 << 22) +#define VRTH_TSI_UTC (0x1 << 22) +#define VRTH_TSI_GPS (0x2 << 22) +#define VRTH_TSI_OTHER (0x3 << 22) + +#define VRTH_TSF_MASK (0x3 << 20) +#define VRTH_TSF_NONE (0x0 << 20) +#define VRTH_TSF_SAMPLE_CNT (0x1 << 20) +#define VRTH_TSF_REAL_TIME_PS (0x2 << 20) +#define VRTH_TSF_FREE_RUNNING (0x3 << 20) + +#define VRTH_PKT_CNT_SHIFT 16 +#define VRTH_PKT_CNT_MASK (0xf << 16) + +#define VRTH_PKT_SIZE_MASK 0xffff + + +static inline int +vrth_pkt_cnt(uint32_t h) +{ + return (h & VRTH_PKT_CNT_MASK) >> 16; +} + +static inline int +vrth_pkt_size(uint32_t h) +{ + return h & VRTH_PKT_SIZE_MASK; +} + +/* + * Trailer bits + */ +#define TR_E (1 << 8) + +#define TR_ENABLE(x) ((x) << 20) +#define TR_STATE(x) ((x) << 8) + +// Use these with TR_ENABLE and TR_STATE +#define TR_CAL_TIME (1 << 11) +#define TR_VALID_DATA (1 << 10) +#define TR_REF_LOCK (1 << 9) +#define TR_AGC (1 << 8) +#define TR_DETECTED_SIG (1 << 7) +#define TR_SPECTRAL_INVERSION (1 << 6) +#define TR_OVER_RANGE (1 << 5) +#define TR_SAMPLE_LOSS (1 << 4) +#define TR_USER_3 (1 << 3) +#define TR_USER_2 (1 << 2) +#define TR_USER_1 (1 << 1) +#define TR_USER_0 (1 << 0) + +#endif /* INCLUDED_VRT_BITS_H */ diff --git a/firmware/microblaze/include/vrt/types.h b/firmware/microblaze/include/vrt/types.h new file mode 100644 index 000000000..edfa4ec37 --- /dev/null +++ b/firmware/microblaze/include/vrt/types.h @@ -0,0 +1,138 @@ +/* -*- c++ -*- */ +/* + * Copyright 2009 Free Software Foundation, Inc. + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ +#ifndef INCLUDED_VRT_TYPES_H +#define INCLUDED_VRT_TYPES_H + +#include <stdint.h> + +/* macros for dealing with fixed point numbers */ +#define _FXPT_C(_type, _x, _rp) ((_type)((_x)*(1ll << _rp))) +#define _FXPT_TO_INT(_x, _one) (((_x) + ((_one)/2))/(_one)) +#define _FXPT_TO_DOUBLE(_x, _one) ((double)(_x) * (1.0/(_one))) + +/*********************************************************************** + * The VRT Altitude Type (meters) + **********************************************************************/ +typedef int32_t vrt_altitude_t; +#define VRT_ALTITUDE_RP 5 +#define VRT_ALTITUDE_C(_x) _FXPT_C(vrt_altitude_t, _x, VRT_ALTITUDE_RP) + +static inline vrt_altitude_t +double_to_vrt_altitude(double num){ + return VRT_ALTITUDE_C(num); +} + +static inline int32_t +vrt_altitude_round_to_int(vrt_altitude_t fx){ + return _FXPT_TO_INT(fx, VRT_ALTITUDE_C(1)); +} + +static inline double +vrt_altitude_to_double(vrt_altitude_t fx){ + return _FXPT_TO_DOUBLE(fx, VRT_ALTITUDE_C(1)); +} + +/*********************************************************************** + * The VRT Geolocation Angle Type (degrees) + **********************************************************************/ +typedef int32_t vrt_geo_angle_t; +#define VRT_GEO_ANGLE_RP 22 +#define VRT_GEO_ANGLE_C(_x) _FXPT_C(vrt_geo_angle_t, _x, VRT_GEO_ANGLE_RP) + +static inline vrt_geo_angle_t +double_to_vrt_geo_angle(double num){ + return VRT_GEO_ANGLE_C(num); +} + +static inline int16_t +vrt_geo_angle_round_to_int(vrt_geo_angle_t fx){ + return _FXPT_TO_INT(fx, VRT_GEO_ANGLE_C(1)); +} + +static inline double +vrt_geo_angle_to_double(vrt_geo_angle_t fx){ + return _FXPT_TO_DOUBLE(fx, VRT_GEO_ANGLE_C(1)); +} + +/*********************************************************************** + * The VRT Frequency Type (Hz) + **********************************************************************/ +typedef int64_t vrt_freq_t; +#define VRT_FREQ_RP 20 +#define VRT_FREQ_C(_x) _FXPT_C(vrt_freq_t, _x, VRT_FREQ_RP) + +static inline vrt_freq_t +double_to_vrt_freq(double num){ + return VRT_FREQ_C(num); +} + +static inline int64_t +vrt_freq_round_to_int(vrt_freq_t fx){ + return _FXPT_TO_INT(fx, VRT_FREQ_C(1)); +} + +static inline double +vrt_freq_to_double(vrt_freq_t fx){ + return _FXPT_TO_DOUBLE(fx, VRT_FREQ_C(1)); +} + +/*********************************************************************** + * The VRT Gain Type (dB) + **********************************************************************/ +typedef int16_t vrt_gain_t; +#define VRT_GAIN_RP 7 +#define VRT_GAIN_C(_x) _FXPT_C(vrt_gain_t, _x, VRT_GAIN_RP) + +static inline vrt_gain_t +double_to_vrt_gain(double num){ + return VRT_GAIN_C(num); +} + +static inline int16_t +vrt_gain_round_to_int(vrt_gain_t fx){ + return _FXPT_TO_INT(fx, VRT_GAIN_C(1)); +} + +static inline double +vrt_gain_to_double(vrt_gain_t fx){ + return _FXPT_TO_DOUBLE(fx, VRT_GAIN_C(1)); +} + +/*********************************************************************** + * The VRT Temperature Type (Celcius) + **********************************************************************/ +typedef int16_t vrt_temp_t; +#define VRT_TEMP_RP 6 +#define VRT_TEMP_C(_x) _FXPT_C(vrt_temp_t, _x, VRT_TEMP_RP) + +static inline vrt_temp_t +double_to_vrt_temp(double num){ + return VRT_TEMP_C(num); +} + +static inline int16_t +vrt_temp_round_to_int(vrt_temp_t fx){ + return _FXPT_TO_INT(fx, VRT_TEMP_C(1)); +} + +static inline double +vrt_temp_to_double(vrt_temp_t fx){ + return _FXPT_TO_DOUBLE(fx, VRT_TEMP_C(1)); +} + +#endif /* INCLUDED_VRT_TYPES_H */ |