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-rw-r--r--firmware/fx2/usrp1/board_specific.c2
-rw-r--r--firmware/fx2/usrp1/eeprom_io.c8
-rw-r--r--firmware/fx2/usrp1/eeprom_io.h4
-rw-r--r--firmware/fx2/usrp1/fpga_load.c10
-rw-r--r--firmware/fx2/usrp1/fpga_rev2.c4
-rw-r--r--firmware/fx2/usrp1/usrp_main.c8
-rw-r--r--firmware/fx2/usrp1/usrp_regs.h10
7 files changed, 23 insertions, 23 deletions
diff --git a/firmware/fx2/usrp1/board_specific.c b/firmware/fx2/usrp1/board_specific.c
index ef0081d84..92fc28f94 100644
--- a/firmware/fx2/usrp1/board_specific.c
+++ b/firmware/fx2/usrp1/board_specific.c
@@ -64,7 +64,7 @@ set_sleep_bits (unsigned char bits, unsigned char mask)
// NOP on usrp1
}
-static xdata unsigned char xbuf[1];
+static __xdata unsigned char xbuf[1];
void
write_9862 (unsigned char which, unsigned char regno, unsigned char value)
diff --git a/firmware/fx2/usrp1/eeprom_io.c b/firmware/fx2/usrp1/eeprom_io.c
index 9eeb53636..666f3f692 100644
--- a/firmware/fx2/usrp1/eeprom_io.c
+++ b/firmware/fx2/usrp1/eeprom_io.c
@@ -27,12 +27,12 @@
// returns non-zero if successful, else 0
unsigned char
eeprom_read (unsigned char i2c_addr, unsigned char eeprom_offset,
- xdata unsigned char *buf, unsigned char len)
+ __xdata unsigned char *buf, unsigned char len)
{
// We setup a random read by first doing a "zero byte write".
// Writes carry an address. Reads use an implicit address.
- static xdata unsigned char cmd[1];
+ static __xdata unsigned char cmd[1];
cmd[0] = eeprom_offset;
if (!i2c_write(i2c_addr, cmd, 1))
return 0;
@@ -46,9 +46,9 @@ eeprom_read (unsigned char i2c_addr, unsigned char eeprom_offset,
// returns non-zero if successful, else 0
unsigned char
eeprom_write (unsigned char i2c_addr, unsigned char eeprom_offset,
- const xdata unsigned char *buf, unsigned char len)
+ const __xdata unsigned char *buf, unsigned char len)
{
- static xdata unsigned char cmd[2];
+ static __xdata unsigned char cmd[2];
unsigned char ok;
while (len-- > 0){
diff --git a/firmware/fx2/usrp1/eeprom_io.h b/firmware/fx2/usrp1/eeprom_io.h
index 558017b12..d1c4ee6ac 100644
--- a/firmware/fx2/usrp1/eeprom_io.h
+++ b/firmware/fx2/usrp1/eeprom_io.h
@@ -27,12 +27,12 @@
// returns non-zero if successful, else 0
unsigned char
eeprom_read (unsigned char i2c_addr, unsigned char eeprom_offset,
- xdata unsigned char *buf, unsigned char len);
+ __xdata unsigned char *buf, unsigned char len);
// returns non-zero if successful, else 0
unsigned char
eeprom_write (unsigned char i2c_addr, unsigned char eeprom_offset,
- const xdata unsigned char *buf, unsigned char len);
+ const __xdata unsigned char *buf, unsigned char len);
#endif /* INCLUDED_EEPROM_IO_H */
diff --git a/firmware/fx2/usrp1/fpga_load.c b/firmware/fx2/usrp1/fpga_load.c
index c3ae9e707..4c0a85ee2 100644
--- a/firmware/fx2/usrp1/fpga_load.c
+++ b/firmware/fx2/usrp1/fpga_load.c
@@ -89,9 +89,9 @@ clock_out_config_byte (unsigned char bits)
#else
static void
-clock_out_config_byte (unsigned char bits) _naked
+clock_out_config_byte (unsigned char bits) __naked
{
- _asm
+ __asm
mov a, dpl
rrc a
@@ -136,14 +136,14 @@ clock_out_config_byte (unsigned char bits) _naked
ret
- _endasm;
+ __endasm;
}
#endif
static void
clock_out_bytes (unsigned char bytecount,
- unsigned char xdata *p)
+ unsigned char __xdata *p)
{
while (bytecount-- > 0)
clock_out_config_byte (*p++);
@@ -163,7 +163,7 @@ clock_out_bytes (unsigned char bytecount,
* ALTERA_NSTATUS = 1 (input)
*/
unsigned char
-fpga_load_xfer (xdata unsigned char *p, unsigned char bytecount)
+fpga_load_xfer (__xdata unsigned char *p, unsigned char bytecount)
{
clock_out_bytes (bytecount, p);
return 1;
diff --git a/firmware/fx2/usrp1/fpga_rev2.c b/firmware/fx2/usrp1/fpga_rev2.c
index cca961dc4..a1081f5cb 100644
--- a/firmware/fx2/usrp1/fpga_rev2.c
+++ b/firmware/fx2/usrp1/fpga_rev2.c
@@ -30,7 +30,7 @@ unsigned char g_tx_reset = 0;
unsigned char g_rx_reset = 0;
void
-fpga_write_reg (unsigned char regno, const xdata unsigned char *regval)
+fpga_write_reg (unsigned char regno, const __xdata unsigned char *regval)
{
spi_write (0, 0x00 | (regno & 0x7f),
SPI_ENABLE_FPGA,
@@ -39,7 +39,7 @@ fpga_write_reg (unsigned char regno, const xdata unsigned char *regval)
}
-static xdata unsigned char regval[4] = {0, 0, 0, 0};
+static __xdata unsigned char regval[4] = {0, 0, 0, 0};
static void
write_fpga_master_ctrl (void)
diff --git a/firmware/fx2/usrp1/usrp_main.c b/firmware/fx2/usrp1/usrp_main.c
index 802516c0b..de213e164 100644
--- a/firmware/fx2/usrp1/usrp_main.c
+++ b/firmware/fx2/usrp1/usrp_main.c
@@ -63,7 +63,7 @@ unsigned char g_tx_underrun = 0;
* into hash1.
*/
#define USRP_HASH_SIZE 16
-xdata at USRP_HASH_SLOT_1_ADDR unsigned char hash1[USRP_HASH_SIZE];
+__xdata __at (USRP_HASH_SLOT_1_ADDR) unsigned char hash1[USRP_HASH_SIZE];
static void
get_ep0_data (void)
@@ -305,7 +305,7 @@ main_loop (void)
* Toggle led 0
*/
void
-isr_tick (void) interrupt
+isr_tick (void) __interrupt
{
static unsigned char count = 1;
@@ -324,8 +324,8 @@ isr_tick (void) interrupt
void
patch_usb_descriptors(void)
{
- static xdata unsigned char hw_rev;
- static xdata unsigned char serial_no[8];
+ static __xdata unsigned char hw_rev;
+ static __xdata unsigned char serial_no[8];
unsigned char i;
eeprom_read(I2C_ADDR_BOOT, HW_REV_OFFSET, &hw_rev, 1); // LSB of device id
diff --git a/firmware/fx2/usrp1/usrp_regs.h b/firmware/fx2/usrp1/usrp_regs.h
index a4f1d9896..8e5ade295 100644
--- a/firmware/fx2/usrp1/usrp_regs.h
+++ b/firmware/fx2/usrp1/usrp_regs.h
@@ -47,9 +47,9 @@
#define bmPA_TX_UNDERRUN bmBIT7 // misc pin to FPGA (underflow)
-sbit at 0x80+0 bitS_CLK; // 0x80 is the bit address of PORT A
-sbit at 0x80+1 bitS_OUT; // out from FX2 point of view
-sbit at 0x80+2 bitS_IN; // in from FX2 point of view
+__sbit __at (0x80+0) bitS_CLK; // 0x80 is the bit address of PORT A
+__sbit __at (0x80+1) bitS_OUT; // out from FX2 point of view
+__sbit __at (0x80+2) bitS_IN; // in from FX2 point of view
/* all outputs except S_DATA_FROM_PERIPH, FX2_2, FX2_3 */
@@ -85,8 +85,8 @@ sbit at 0x80+2 bitS_IN; // in from FX2 point of view
#define bmPC_LED0 bmBIT6 // active low
#define bmPC_LED1 bmBIT7 // active low
-sbit at 0xA0+1 bitALTERA_DATA0; // 0xA0 is the bit address of PORT C
-sbit at 0xA0+3 bitALTERA_DCLK;
+__sbit __at (0xA0+1) bitALTERA_DATA0; // 0xA0 is the bit address of PORT C
+__sbit __at (0xA0+3) bitALTERA_DCLK;
#define bmALTERA_BITS (bmALTERA_DATA0 \