diff options
| -rw-r--r-- | host/lib/usrp/n230/n230_impl.cpp | 41 | ||||
| -rw-r--r-- | host/lib/usrp/n230/n230_resource_manager.cpp | 4 | ||||
| -rw-r--r-- | host/lib/usrp/n230/n230_resource_manager.hpp | 7 |
3 files changed, 18 insertions, 34 deletions
diff --git a/host/lib/usrp/n230/n230_impl.cpp b/host/lib/usrp/n230/n230_impl.cpp index b3cc4ab59..a0094d573 100644 --- a/host/lib/usrp/n230/n230_impl.cpp +++ b/host/lib/usrp/n230/n230_impl.cpp @@ -31,6 +31,7 @@ #include <uhd/utils/msg.hpp> #include <uhd/types/sensors.hpp> #include <uhd/types/ranges.hpp> +#include <uhd/types/direction.hpp> #include <uhd/usrp/mboard_eeprom.hpp> #include <uhd/usrp/dboard_eeprom.hpp> #include <uhd/usrp/gps_ctrl.hpp> @@ -459,38 +460,14 @@ void n230_impl::_initialize_radio_properties(const fs_path& mb_path, size_t inst .publish(boost::bind(&tx_dsp_core_3000::get_freq_range, perif.duc)); //RF Frontend Interfacing - static const std::vector<std::string> data_directions = boost::assign::list_of("tx")("rx"); - BOOST_FOREACH(const std::string& direction, data_directions) { - const std::string key = boost::to_upper_copy(direction) + str(boost::format("%u") % (instance + 1)); - const fs_path rf_fe_path = mb_path / "dboards" / "A" / (direction + "_frontends") / ((instance==0)?"A":"B"); - - _tree->create<std::string>(rf_fe_path / "name") - .set("FE-" + key); - _tree->create<int>(rf_fe_path / "sensors"); //empty TODO - BOOST_FOREACH(const std::string &name, ad9361_ctrl::get_gain_names(key)) { - _tree->create<meta_range_t>(rf_fe_path / "gains" / name / "range") - .set(ad9361_ctrl::get_gain_range(key)); - _tree->create<double>(rf_fe_path / "gains" / name / "value") - .coerce(boost::bind(&ad9361_ctrl::set_gain, _resource_mgr->get_codec_ctrl_sptr(), key, _1)) - .set(n230::DEFAULT_FE_GAIN); - } - _tree->create<std::string>(rf_fe_path / "connection") - .set("IQ"); - _tree->create<bool>(rf_fe_path / "enabled") - .set(true); - _tree->create<bool>(rf_fe_path / "use_lo_offset") - .set(false); - _tree->create<double>(rf_fe_path / "bandwidth" / "value") - .coerce(boost::bind(&ad9361_ctrl::set_bw_filter, _resource_mgr->get_codec_ctrl_sptr(), key, _1)) - .set(n230::DEFAULT_FE_BW); - _tree->create<meta_range_t>(rf_fe_path / "bandwidth" / "range") - .publish(boost::bind(&ad9361_ctrl::get_bw_filter_range, key)); - _tree->create<double>(rf_fe_path / "freq" / "value") - .set(n230::DEFAULT_FE_FREQ) - .coerce(boost::bind(&ad9361_ctrl::tune, _resource_mgr->get_codec_ctrl_sptr(), key, _1)) - .subscribe(boost::bind(&n230_frontend_ctrl::set_bandsel, _resource_mgr->get_frontend_ctrl_sptr(), key, _1)); - _tree->create<meta_range_t>(rf_fe_path / "freq" / "range") - .publish(boost::bind(&ad9361_ctrl::get_rf_freq_range)); + static const std::vector<direction_t> data_directions = boost::assign::list_of(RX_DIRECTION)(TX_DIRECTION); + BOOST_FOREACH(direction_t direction, data_directions) { + const std::string dir_str = (direction == RX_DIRECTION) ? "rx" : "tx"; + const std::string key = boost::to_upper_copy(dir_str) + str(boost::format("%u") % (instance + 1)); + const fs_path rf_fe_path = mb_path / "dboards" / "A" / (dir_str + "_frontends") / ((instance==0)?"A":"B"); + + //CODEC subtree + _resource_mgr->get_codec_mgr().populate_frontend_subtree(_tree->subtree(rf_fe_path), key, direction); //User settings _tree->create<uhd::wb_iface::sptr>(rf_fe_path / "user_settings" / "iface") diff --git a/host/lib/usrp/n230/n230_resource_manager.cpp b/host/lib/usrp/n230/n230_resource_manager.cpp index 38e689533..340bc7c6c 100644 --- a/host/lib/usrp/n230/n230_resource_manager.cpp +++ b/host/lib/usrp/n230/n230_resource_manager.cpp @@ -143,7 +143,7 @@ n230_resource_manager::n230_resource_manager( throw uhd::runtime_error("N230 Initialization Error: Could not create SPI ctrl.)"); } - //Create Catalina interface + //Create AD9361 interface UHD_MSG(status) << "Initializing CODEC...\n"; _codec_ctrl = ad9361_ctrl::make_spi( boost::make_shared<n230_ad9361_client_t>(), _core_spi_ctrl, fpga::AD9361_SPI_SLAVE_NUM); @@ -151,6 +151,8 @@ n230_resource_manager::n230_resource_manager( throw uhd::runtime_error("N230 Initialization Error: Could not create Catalina ctrl.)"); } _codec_ctrl->set_clock_rate(fpga::CODEC_DEFAULT_CLK_RATE); + _codec_mgr = ad936x_manager::make(_codec_ctrl, fpga::NUM_RADIOS); + _codec_mgr->init_codec(); //Create AD4001 interface _ref_pll_ctrl = boost::make_shared<n230_ref_pll_ctrl>(_core_spi_ctrl); diff --git a/host/lib/usrp/n230/n230_resource_manager.hpp b/host/lib/usrp/n230/n230_resource_manager.hpp index c98140141..3a0b13329 100644 --- a/host/lib/usrp/n230/n230_resource_manager.hpp +++ b/host/lib/usrp/n230/n230_resource_manager.hpp @@ -28,6 +28,7 @@ #include "tx_dsp_core_3000.hpp" #include "user_settings_core_3000.hpp" #include "ad9361_ctrl.hpp" +#include "ad936x_manager.hpp" #include <uhd/utils/tasks.hpp> #include <uhd/types/sid.hpp> #include <uhd/types/device_addr.hpp> @@ -139,13 +140,16 @@ public: //Methods return _core_ctrl; } - //Catalina control interface + //AD931 control interface inline ad9361_ctrl& get_codec_ctrl() const { return *_codec_ctrl; } inline ad9361_ctrl::sptr get_codec_ctrl_sptr() { return _codec_ctrl; } + inline uhd::usrp::ad936x_manager& get_codec_mgr() const { + return *_codec_mgr; + } //Clock PPS controls inline n230_ref_pll_ctrl& get_ref_pll_ctrl() const { @@ -282,6 +286,7 @@ private: radio_ctrl_core_3000::sptr _core_ctrl; n230_core_spi_core::sptr _core_spi_ctrl; ad9361_ctrl::sptr _codec_ctrl; + uhd::usrp::ad936x_manager::sptr _codec_mgr; //Core Registers fpga::core_radio_ctrl_reg_t _core_radio_ctrl_reg; |