diff options
| -rw-r--r-- | usrp2/vrt/vita_tx_chain.v | 4 | ||||
| -rw-r--r-- | usrp2/vrt/vita_tx_control.v | 10 |
2 files changed, 8 insertions, 6 deletions
diff --git a/usrp2/vrt/vita_tx_chain.v b/usrp2/vrt/vita_tx_chain.v index ad9f11fc6..705be4a0e 100644 --- a/usrp2/vrt/vita_tx_chain.v +++ b/usrp2/vrt/vita_tx_chain.v @@ -25,10 +25,10 @@ module vita_tx_chain wire [31:0] debug_vtc, debug_vtd, debug_tx_dsp; wire error; - wire [3:0] error_code; + wire [15:0] error_code; assign underrun = error; - assign message = {28'h0,error_code}; + assign message = {16'h0,error_code}; setting_reg #(.my_addr(BASE_CTRL+2), .at_reset(0)) sr_streamid (.clk(clk),.rst(reset),.strobe(set_stb),.addr(set_addr), diff --git a/usrp2/vrt/vita_tx_control.v b/usrp2/vrt/vita_tx_control.v index f45ba73f1..56a6c5a17 100644 --- a/usrp2/vrt/vita_tx_control.v +++ b/usrp2/vrt/vita_tx_control.v @@ -7,7 +7,7 @@ module vita_tx_control input [63:0] vita_time, output error, - output reg [3:0] error_code, + output reg [15:0] error_code, // From vita_tx_deframer input [5+64+WIDTH-1:0] sample_fifo_i, @@ -49,6 +49,8 @@ module vita_tx_control localparam CODE_UNDERRUN = 2; localparam CODE_SEQ_ERROR = 4; localparam CODE_TIME_ERROR = 8; + localparam CODE_UNDERRUN_MIDPKT = 16; + localparam CODE_SEQ_ERROR_MIDBURST = 32; reg [2:0] ibs_state; @@ -59,7 +61,7 @@ module vita_tx_control always @(posedge clk) if(reset | clear_state) - ibs_state <= 0; + ibs_state <= IBS_IDLE; else case(ibs_state) IBS_IDLE : @@ -82,7 +84,7 @@ module vita_tx_control if(~sample_fifo_src_rdy_i) begin ibs_state <= IBS_ERROR; - error_code <= CODE_UNDERRUN; + error_code <= CODE_UNDERRUN_MIDPKT; end else if(eop) if(eob) @@ -100,7 +102,7 @@ module vita_tx_control if(seqnum_err) begin ibs_state <= IBS_ERROR; - error_code <= CODE_SEQ_ERROR; + error_code <= CODE_SEQ_ERROR_MIDBURST; end else ibs_state <= IBS_RUN; |