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-rw-r--r--control_lib/SYSCTRL.sav24
-rw-r--r--control_lib/WB_SIM.sav47
-rw-r--r--control_lib/clock_control_tb.sav28
-rw-r--r--opencores/i2c/sim/i2c_verilog/run/ncverilog.log118
-rw-r--r--testbench/BOOTSTRAP.sav82
-rw-r--r--testbench/PAUSE.sav62
-rw-r--r--testbench/SERDES.sav35
-rw-r--r--testbench/U2_SIM.sav95
-rw-r--r--usrp2/.gitignore (renamed from .gitignore)0
-rw-r--r--usrp2/boot_cpld/.gitignore (renamed from boot_cpld/.gitignore)0
-rwxr-xr-xusrp2/boot_cpld/_impact.cmd (renamed from boot_cpld/_impact.cmd)0
-rwxr-xr-xusrp2/boot_cpld/boot_cpld.ipf (renamed from boot_cpld/boot_cpld.ipf)bin2967 -> 2967 bytes
-rwxr-xr-xusrp2/boot_cpld/boot_cpld.ise (renamed from boot_cpld/boot_cpld.ise)bin227573 -> 227573 bytes
-rwxr-xr-xusrp2/boot_cpld/boot_cpld.lfp (renamed from boot_cpld/boot_cpld.lfp)0
-rwxr-xr-xusrp2/boot_cpld/boot_cpld.ucf (renamed from boot_cpld/boot_cpld.ucf)0
-rwxr-xr-xusrp2/boot_cpld/boot_cpld.v (renamed from boot_cpld/boot_cpld.v)0
-rw-r--r--usrp2/control_lib/.gitignore (renamed from control_lib/.gitignore)0
-rw-r--r--usrp2/control_lib/CRC16_D16.v (renamed from control_lib/CRC16_D16.v)0
-rw-r--r--usrp2/control_lib/atr_controller.v (renamed from control_lib/atr_controller.v)0
-rw-r--r--usrp2/control_lib/bin2gray.v (renamed from control_lib/bin2gray.v)0
-rw-r--r--usrp2/control_lib/bootrom.mem (renamed from control_lib/bootrom.mem)0
-rw-r--r--usrp2/control_lib/clock_bootstrap_rom.v (renamed from control_lib/clock_bootstrap_rom.v)0
-rw-r--r--usrp2/control_lib/clock_control.v (renamed from control_lib/clock_control.v)0
-rw-r--r--usrp2/control_lib/clock_control_tb.v (renamed from control_lib/clock_control_tb.v)0
-rw-r--r--usrp2/control_lib/cmdfile (renamed from control_lib/cmdfile)0
-rw-r--r--usrp2/control_lib/dcache.v (renamed from control_lib/dcache.v)0
-rw-r--r--usrp2/control_lib/decoder_3_8.v (renamed from control_lib/decoder_3_8.v)0
-rw-r--r--usrp2/control_lib/dpram32.v (renamed from control_lib/dpram32.v)0
-rw-r--r--usrp2/control_lib/fifo_tb.v (renamed from control_lib/fifo_tb.v)0
-rw-r--r--usrp2/control_lib/gray2bin.v (renamed from control_lib/gray2bin.v)0
-rw-r--r--usrp2/control_lib/gray_send.v (renamed from control_lib/gray_send.v)0
-rw-r--r--usrp2/control_lib/icache.v (renamed from control_lib/icache.v)0
-rw-r--r--usrp2/control_lib/longfifo.v (renamed from control_lib/longfifo.v)0
-rw-r--r--usrp2/control_lib/medfifo.v (renamed from control_lib/medfifo.v)0
-rw-r--r--usrp2/control_lib/mux4.v (renamed from control_lib/mux4.v)0
-rw-r--r--usrp2/control_lib/mux8.v (renamed from control_lib/mux8.v)0
-rw-r--r--usrp2/control_lib/mux_32_4.v (renamed from control_lib/mux_32_4.v)0
-rw-r--r--usrp2/control_lib/newfifo/.gitignore (renamed from control_lib/newfifo/.gitignore)0
-rw-r--r--usrp2/control_lib/newfifo/buffer_int.v (renamed from control_lib/newfifo/buffer_int.v)0
-rw-r--r--usrp2/control_lib/newfifo/buffer_int_tb.v (renamed from control_lib/newfifo/buffer_int_tb.v)0
-rw-r--r--usrp2/control_lib/newfifo/buffer_pool.v (renamed from control_lib/newfifo/buffer_pool.v)0
-rw-r--r--usrp2/control_lib/newfifo/buffer_pool_tb.v (renamed from control_lib/newfifo/buffer_pool_tb.v)0
-rw-r--r--usrp2/control_lib/newfifo/fifo19_to_fifo36.v (renamed from control_lib/newfifo/fifo19_to_fifo36.v)0
-rw-r--r--usrp2/control_lib/newfifo/fifo19_to_ll8.v (renamed from control_lib/newfifo/fifo19_to_ll8.v)0
-rw-r--r--usrp2/control_lib/newfifo/fifo36_to_fifo18.v (renamed from control_lib/newfifo/fifo36_to_fifo18.v)0
-rw-r--r--usrp2/control_lib/newfifo/fifo36_to_fifo19.v (renamed from control_lib/newfifo/fifo36_to_fifo19.v)0
-rw-r--r--usrp2/control_lib/newfifo/fifo36_to_ll8.v (renamed from control_lib/newfifo/fifo36_to_ll8.v)0
-rw-r--r--usrp2/control_lib/newfifo/fifo_2clock.v (renamed from control_lib/newfifo/fifo_2clock.v)0
-rw-r--r--usrp2/control_lib/newfifo/fifo_2clock_cascade.v (renamed from control_lib/newfifo/fifo_2clock_cascade.v)0
-rw-r--r--usrp2/control_lib/newfifo/fifo_cascade.v (renamed from control_lib/newfifo/fifo_cascade.v)0
-rw-r--r--usrp2/control_lib/newfifo/fifo_long.v (renamed from control_lib/newfifo/fifo_long.v)0
-rw-r--r--usrp2/control_lib/newfifo/fifo_new_tb.vcd (renamed from control_lib/newfifo/fifo_new_tb.vcd)0
-rw-r--r--usrp2/control_lib/newfifo/fifo_short.v (renamed from control_lib/newfifo/fifo_short.v)0
-rw-r--r--usrp2/control_lib/newfifo/fifo_spec.txt (renamed from control_lib/newfifo/fifo_spec.txt)0
-rw-r--r--usrp2/control_lib/newfifo/fifo_tb.v (renamed from control_lib/newfifo/fifo_tb.v)0
-rw-r--r--usrp2/control_lib/newfifo/ll8_shortfifo.v (renamed from control_lib/newfifo/ll8_shortfifo.v)0
-rw-r--r--usrp2/control_lib/newfifo/ll8_to_fifo19.v (renamed from control_lib/newfifo/ll8_to_fifo19.v)0
-rw-r--r--usrp2/control_lib/newfifo/ll8_to_fifo36.v (renamed from control_lib/newfifo/ll8_to_fifo36.v)0
-rw-r--r--usrp2/control_lib/nsgpio.v (renamed from control_lib/nsgpio.v)0
-rw-r--r--usrp2/control_lib/oneshot_2clk.v (renamed from control_lib/oneshot_2clk.v)0
-rw-r--r--usrp2/control_lib/pic.v (renamed from control_lib/pic.v)0
-rw-r--r--usrp2/control_lib/priority_enc.v (renamed from control_lib/priority_enc.v)0
-rw-r--r--usrp2/control_lib/ram_2port.v (renamed from control_lib/ram_2port.v)0
-rw-r--r--usrp2/control_lib/ram_harv_cache.v (renamed from control_lib/ram_harv_cache.v)0
-rw-r--r--usrp2/control_lib/ram_loader.v (renamed from control_lib/ram_loader.v)0
-rw-r--r--usrp2/control_lib/ram_wb_harvard.v (renamed from control_lib/ram_wb_harvard.v)0
-rw-r--r--usrp2/control_lib/reset_sync.v (renamed from control_lib/reset_sync.v)0
-rw-r--r--usrp2/control_lib/sd_spi.v (renamed from control_lib/sd_spi.v)0
-rw-r--r--usrp2/control_lib/sd_spi_tb.v (renamed from control_lib/sd_spi_tb.v)0
-rw-r--r--usrp2/control_lib/sd_spi_wb.v (renamed from control_lib/sd_spi_wb.v)0
-rw-r--r--usrp2/control_lib/setting_reg.v (renamed from control_lib/setting_reg.v)0
-rw-r--r--usrp2/control_lib/settings_bus.v (renamed from control_lib/settings_bus.v)0
-rw-r--r--usrp2/control_lib/shortfifo.v (renamed from control_lib/shortfifo.v)0
-rw-r--r--usrp2/control_lib/simple_uart.v (renamed from control_lib/simple_uart.v)0
-rw-r--r--usrp2/control_lib/simple_uart_rx.v (renamed from control_lib/simple_uart_rx.v)0
-rw-r--r--usrp2/control_lib/simple_uart_tx.v (renamed from control_lib/simple_uart_tx.v)0
-rw-r--r--usrp2/control_lib/spi.v (renamed from control_lib/spi.v)0
-rw-r--r--usrp2/control_lib/srl.v (renamed from control_lib/srl.v)0
-rw-r--r--usrp2/control_lib/ss_rcvr.v (renamed from control_lib/ss_rcvr.v)0
-rw-r--r--usrp2/control_lib/system_control.v (renamed from control_lib/system_control.v)0
-rw-r--r--usrp2/control_lib/system_control_tb.v (renamed from control_lib/system_control_tb.v)0
-rw-r--r--usrp2/control_lib/traffic_cop.v (renamed from control_lib/traffic_cop.v)0
-rw-r--r--usrp2/control_lib/wb_1master.v (renamed from control_lib/wb_1master.v)0
-rw-r--r--usrp2/control_lib/wb_bridge_16_32.v (renamed from control_lib/wb_bridge_16_32.v)0
-rw-r--r--usrp2/control_lib/wb_bus_writer.v (renamed from control_lib/wb_bus_writer.v)0
-rw-r--r--usrp2/control_lib/wb_output_pins32.v (renamed from control_lib/wb_output_pins32.v)0
-rw-r--r--usrp2/control_lib/wb_ram_block.v (renamed from control_lib/wb_ram_block.v)0
-rw-r--r--usrp2/control_lib/wb_ram_dist.v (renamed from control_lib/wb_ram_dist.v)0
-rw-r--r--usrp2/control_lib/wb_readback_mux.v (renamed from control_lib/wb_readback_mux.v)0
-rw-r--r--usrp2/control_lib/wb_regfile_2clock.v (renamed from control_lib/wb_regfile_2clock.v)0
-rw-r--r--usrp2/control_lib/wb_semaphore.v (renamed from control_lib/wb_semaphore.v)0
-rw-r--r--usrp2/control_lib/wb_sim.v (renamed from control_lib/wb_sim.v)0
-rw-r--r--usrp2/coregen/.gitignore (renamed from coregen/.gitignore)0
-rw-r--r--usrp2/coregen/coregen.cgp (renamed from coregen/coregen.cgp)0
-rw-r--r--usrp2/coregen/fifo_generator_release_notes.txt (renamed from coregen/fifo_generator_release_notes.txt)0
-rw-r--r--usrp2/coregen/fifo_generator_ug175.pdf (renamed from coregen/fifo_generator_ug175.pdf)bin1069823 -> 1069823 bytes
-rw-r--r--usrp2/coregen/fifo_xlnx_16x19_2clk.ngc (renamed from coregen/fifo_xlnx_16x19_2clk.ngc)0
-rw-r--r--usrp2/coregen/fifo_xlnx_16x19_2clk.v (renamed from coregen/fifo_xlnx_16x19_2clk.v)0
-rw-r--r--usrp2/coregen/fifo_xlnx_16x19_2clk.veo (renamed from coregen/fifo_xlnx_16x19_2clk.veo)0
-rw-r--r--usrp2/coregen/fifo_xlnx_16x19_2clk.xco (renamed from coregen/fifo_xlnx_16x19_2clk.xco)0
-rw-r--r--usrp2/coregen/fifo_xlnx_16x19_2clk_fifo_generator_v4_3_xst_1.lso (renamed from coregen/fifo_xlnx_16x19_2clk_fifo_generator_v4_3_xst_1.lso)0
-rw-r--r--usrp2/coregen/fifo_xlnx_16x19_2clk_fifo_generator_v4_3_xst_1.ngc_xst.xrpt (renamed from coregen/fifo_xlnx_16x19_2clk_fifo_generator_v4_3_xst_1.ngc_xst.xrpt)0
-rw-r--r--usrp2/coregen/fifo_xlnx_16x19_2clk_flist.txt (renamed from coregen/fifo_xlnx_16x19_2clk_flist.txt)0
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-rw-r--r--usrp2/coregen/fifo_xlnx_2Kx36_2clk.asy (renamed from coregen/fifo_xlnx_2Kx36_2clk.asy)0
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diff --git a/control_lib/SYSCTRL.sav b/control_lib/SYSCTRL.sav
deleted file mode 100644
index 43bfef10e..000000000
--- a/control_lib/SYSCTRL.sav
+++ /dev/null
@@ -1,24 +0,0 @@
-[size] 1400 971
-[pos] -1 -1
-*-11.026821 2450 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
-@28
-system_control_tb.aux_clk
-@29
-system_control_tb.clk_fpga
-@28
-system_control_tb.dsp_clk
-system_control_tb.dsp_rst
-system_control_tb.proc_rst
-system_control_tb.rl_done
-system_control_tb.rl_rst
-system_control_tb.wb_clk
-system_control_tb.wb_rst
-system_control_tb.system_control.POR
-@22
-system_control_tb.system_control.POR_ctr[3:0]
-@28
-system_control_tb.clock_ready
-system_control_tb.system_control.half_clk
-system_control_tb.system_control.fin_ret_half
-system_control_tb.system_control.fin_ret_aux
-system_control_tb.system_control.gate_dsp_clk
diff --git a/control_lib/WB_SIM.sav b/control_lib/WB_SIM.sav
deleted file mode 100644
index 467cd35ef..000000000
--- a/control_lib/WB_SIM.sav
+++ /dev/null
@@ -1,47 +0,0 @@
-[size] 1400 971
-[pos] -1 -1
-*-6.099828 350 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
-@28
-wb_sim.wb_rst
-wb_sim.wb_clk
-@23
-wb_sim.rom_data[47:0]
-@22
-wb_sim.rom_addr[15:0]
-@28
-wb_sim.start
-wb_sim.wb_ack
-@22
-wb_sim.wb_adr[15:0]
-@28
-wb_sim.wb_cyc
-@22
-wb_sim.wb_dat[31:0]
-wb_sim.wb_sel[3:0]
-@28
-wb_sim.wb_stb
-wb_sim.wb_we
-@22
-wb_sim.port_output[31:0]
-@28
-wb_sim.system_control.POR
-wb_sim.system_control.aux_clk
-wb_sim.system_control.clk_fpga
-@29
-wb_sim.system_control.done
-@28
-wb_sim.system_control.dsp_clk
-wb_sim.system_control.fin_del1
-wb_sim.system_control.fin_del2
-wb_sim.system_control.fin_del3
-wb_sim.system_control.fin_ret_aux
-@29
-wb_sim.system_control.fin_ret_fpga
-@28
-wb_sim.system_control.finished
-wb_sim.system_control.reset_out
-wb_sim.system_control.start
-wb_sim.system_control.started
-wb_sim.system_control.wb_clk_o
-wb_sim.system_control.wb_rst_o
-wb_sim.system_control.wb_rst_o_alt
diff --git a/control_lib/clock_control_tb.sav b/control_lib/clock_control_tb.sav
deleted file mode 100644
index be4001dc5..000000000
--- a/control_lib/clock_control_tb.sav
+++ /dev/null
@@ -1,28 +0,0 @@
-[size] 1400 971
-[pos] -1 -1
-*-7.848898 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
-@28
-clock_control_tb.aux_clk
-clock_control_tb.reset
-clock_control_tb.sclk
-clock_control_tb.sdi
-clock_control_tb.sdo
-clock_control_tb.sen
-@22
-clock_control_tb.clock_control.counter[7:0]
-@28
-clock_control_tb.clock_control.done
-@22
-clock_control_tb.clock_control.entry[5:0]
-@28
-clock_control_tb.clock_control.read
-clock_control_tb.clock_control.reset
-clock_control_tb.clock_control.sclk
-clock_control_tb.clock_control.w[1:0]
-clock_control_tb.sen
-clock_control_tb.sdo
-clock_control_tb.sclk
-clock_control_tb.clock_control.done
-clock_control_tb.clock_control.start
-@22
-clock_control_tb.clock_control.addr_data[20:0]
diff --git a/opencores/i2c/sim/i2c_verilog/run/ncverilog.log b/opencores/i2c/sim/i2c_verilog/run/ncverilog.log
deleted file mode 100644
index 420a1b9e5..000000000
--- a/opencores/i2c/sim/i2c_verilog/run/ncverilog.log
+++ /dev/null
@@ -1,118 +0,0 @@
-ncverilog: v03.40.(b001): (c) Copyright 1995 - 2001 Cadence Design Systems, Inc.
-ncverilog: v03.40.(b001): Started on Jun 15, 2002 at 13:36:36
-ncverilog
- +access+rwc
- +linedebug
- +define+"WAVES"
- +incdir+../../../../bench/verilog
- +incdir+../../../../rtl/verilog
- +libext+.v
- -y
- /tools/synopsys/dw/sim_ver/
- ../../../../rtl/verilog/i2c_master_bit_ctrl.v
- ../../../../rtl/verilog/i2c_master_byte_ctrl.v
- ../../../../rtl/verilog/i2c_master_top.v
- ../../../../bench/verilog/i2c_slave_model.v
- ../../../../bench/verilog/wb_master_model.v
- ../../../../bench/verilog/tst_bench_top.v
-
-ncverilog: *W,BADPRF: The +linedebug option may have an adverse performance impact.
-file: ../../../../rtl/verilog/i2c_master_bit_ctrl.v
- module worklib.i2c_master_bit_ctrl:v (up-to-date)
- errors: 0, warnings: 0
-file: ../../../../rtl/verilog/i2c_master_byte_ctrl.v
- module worklib.i2c_master_byte_ctrl:v (up-to-date)
- errors: 0, warnings: 0
-file: ../../../../rtl/verilog/i2c_master_top.v
- module worklib.i2c_master_top:v (up-to-date)
- errors: 0, warnings: 0
-file: ../../../../bench/verilog/i2c_slave_model.v
- module worklib.i2c_slave_model:v (up-to-date)
- errors: 0, warnings: 0
-file: ../../../../bench/verilog/wb_master_model.v
- module worklib.wb_master_model:v (up-to-date)
- errors: 0, warnings: 0
-file: ../../../../bench/verilog/tst_bench_top.v
- module worklib.tst_bench_top:v
- errors: 0, warnings: 0
-ncvlog: *W,LIBNOU: Library "/tools/synopsys/dw/sim_ver/" given but not used.
- Total errors/warnings found outside modules and primitives:
- errors: 0, warnings: 1
- Caching library 'worklib' ....... Done
- Elaborating the design hierarchy:
- Building instance overlay tables: .................... Done
- Generating native compiled code:
- worklib.tst_bench_top:v <0x7fb52c98>
- streams: 12, words: 59009
- Loading native compiled code: .................... Done
- Building instance specific data structures.
- Design hierarchy summary:
- Instances Unique
- Modules: 6 6
- Primitives: 2 1
- Registers: 68 68
- Scalar wires: 48 -
- Expanded wires: 36 2
- Vectored wires: 6 -
- Always blocks: 23 23
- Initial blocks: 3 3
- Cont. assignments: 28 28
- Pseudo assignments: 11 14
- Simulation timescale: 10ps
- Writing initial simulation snapshot: worklib.tst_bench_top:v
-Loading snapshot worklib.tst_bench_top:v .................... Done
-ncsim> source /cds/tools/inca/files/ncsimrc
-ncsim> run
-INFO: Signal dump enabled ...
-
-
-
-status: 0 Testbench started
-
-
-
-INFO: WISHBONE MASTER MODEL INSTANTIATED (tst_bench_top.u0)
-
-status: 19500 done reset
-status: 23600 programmed registers
-status: 25600 verified registers
-status: 27600 enabled core
-status: 30600 generate 'start', write cmd a0 (slave address+write)
-status: 2582600 tip==0
-status: 2585600 write slave memory address 01
-status: 4877600 tip==0
-status: 4880600 write data a5
-status: 7172600 tip==0
-status: 7175600 write next data 5a, generate 'stop'
-status: 9467600 tip==0
-status: 19467600 wait 100us
-status: 19470600 generate 'start', write cmd a0 (slave address+write)
-status: 22014600 tip==0
-status: 22017600 write slave address 01
-status: 24309600 tip==0
-status: 24312600 generate 'repeated start', write cmd a1 (slave address+read)
-status: 26858600 tip==0
-status: 26860600 read + ack
-status: 29154600 tip==0
-status: 29158600 read + ack
-status: 31448600 tip==0
-status: 31452600 read + ack
-status: 33744600 tip==0
-status: 33746600 received xx from 3rd read address
-status: 33748600 read + nack
-status: 36038600 tip==0
-status: 36040600 received xx from 4th read address
-status: 36043600 generate 'start', write cmd a0 (slave address+write). Check invalid address
-status: 38589600 tip==0
-status: 38592600 write slave memory address 10
-status: 40884600 tip==0
-status: 40884600 Check for nack
-status: 40886600 generate 'stop'
-status: 40888600 tip==0
-
-
-status: 43388600 Testbench done
-Simulation stopped via $stop(1) at time 433886 NS + 0
-/mnt/pooh/projects/I2C/bench/verilog/tst_bench_top.v:427 $stop;
-ncsim> exit
-ncverilog: v03.40.(b001): Exiting on Jun 15, 2002 at 13:47:48 (total: 00:11:12)
diff --git a/testbench/BOOTSTRAP.sav b/testbench/BOOTSTRAP.sav
deleted file mode 100644
index 41501945f..000000000
--- a/testbench/BOOTSTRAP.sav
+++ /dev/null
@@ -1,82 +0,0 @@
-[size] 1400 971
-[pos] -1 -1
-*-26.028666 3485926000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
-@28
-u2_sim_top.cpld_clk
-u2_sim_top.cpld_detached
-u2_sim_top.cpld_din
-u2_sim_top.cpld_done
-u2_sim_top.cpld_start
-u2_sim_top.aux_clk
-u2_sim_top.clk_fpga
-u2_sim_top.clk_sel[1:0]
-u2_sim_top.clk_en[1:0]
-u2_sim_top.u2_basic.ram_loader_rst
-u2_sim_top.u2_basic.wb_rst
-u2_sim_top.u2_basic.sysctrl.POR
-u2_sim_top.u2_basic.sysctrl.ram_loader_done_i
-u2_sim_top.cpld_model.sclk
-u2_sim_top.cpld_model.start
-u2_sim_top.u2_basic.ram_loader.rst_i
-u2_sim_top.sen_clk
-u2_sim_top.sen_dac
-u2_sim_top.sclk
-@22
-u2_sim_top.u2_basic.shared_spi.wb_sel_i[3:0]
-u2_sim_top.u2_basic.shared_spi.wb_adr_i[4:0]
-u2_sim_top.u2_basic.shared_spi.wb_dat_i[31:0]
-@28
-u2_sim_top.u2_basic.shared_spi.wb_we_i
-u2_sim_top.u2_basic.shared_spi.wb_stb_i
-u2_sim_top.u2_basic.shared_spi.wb_ack_o
-@22
-u2_sim_top.u2_basic.shared_spi.ss_pad_o[7:0]
-u2_sim_top.u2_basic.shared_spi.ctrl[13:0]
-u2_sim_top.u2_basic.shared_spi.divider[15:0]
-u2_sim_top.u2_basic.shared_spi.char_len[6:0]
-u2_sim_top.u2_basic.shared_spi.ss[7:0]
-u2_sim_top.u2_basic.shared_spi.wb_dat_o[31:0]
-u2_sim_top.u2_basic.shared_spi.rx[127:0]
-@28
-u2_sim_top.u2_basic.control_lines.wb_stb_i
-u2_sim_top.u2_basic.control_lines.wb_we_i
-@22
-u2_sim_top.u2_basic.control_lines.wb_dat_i[31:0]
-u2_sim_top.u2_basic.control_lines.wb_dat_o[31:0]
-u2_sim_top.u2_basic.control_lines.wb_sel_i[3:0]
-@28
-u2_sim_top.u2_basic.control_lines.wb_cyc_i
-@22
-u2_sim_top.u2_basic.control_lines.wb_sel_i[3:0]
-@28
-u2_sim_top.clock_ready
-u2_sim_top.u2_basic.ram_loader.done_o
-u2_sim_top.u2_basic.dsp_rst
-u2_sim_top.u2_basic.ram_loader_rst
-u2_sim_top.u2_basic.wb_rst
-@22
-u2_sim_top.u2_basic.ID_ram.dwb_adr_i[12:0]
-@28
-u2_sim_top.u2_basic.aeMB.iwb_ack_i
-u2_sim_top.u2_basic.ram_loader_done
-@22
-u2_sim_top.u2_basic.iram_rd_adr[15:0]
-u2_sim_top.u2_basic.iram_rd_dat[31:0]
-@28
-u2_sim_top.u2_basic.iram_wr_we
-u2_sim_top.u2_basic.iram_wr_stb
-@22
-u2_sim_top.u2_basic.iram_wr_sel[3:0]
-u2_sim_top.u2_basic.iram_wr_dat[31:0]
-u2_sim_top.u2_basic.iram_wr_adr[15:0]
-@28
-u2_sim_top.u2_basic.ram_loader.ram_loader_done_o
-u2_sim_top.u2_basic.ID_ram.dwb_we_i
-u2_sim_top.u2_basic.ID_ram.iwb_we_i
-u2_sim_top.u2_basic.ram_loader.ram_we
-u2_sim_top.u2_basic.ram_loader.ram_we_q
-u2_sim_top.u2_basic.ram_loader.ram_we_s
-u2_sim_top.u2_basic.ram_loader.wb_ack_i
-u2_sim_top.u2_basic.ID_ram.iwb_ack_o
-u2_sim_top.u2_basic.ID_ram.iwb_stb_i
-u2_sim_top.u2_basic.ID_ram.wb_rst_i
diff --git a/testbench/PAUSE.sav b/testbench/PAUSE.sav
deleted file mode 100644
index f5e1ea1ac..000000000
--- a/testbench/PAUSE.sav
+++ /dev/null
@@ -1,62 +0,0 @@
-[size] 1400 967
-[pos] -1 -1
-*-16.314999 5250420000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
-[treeopen] u2_sim_top.
-[treeopen] u2_sim_top.u2_basic.
-[treeopen] u2_sim_top.u2_basic.MAC_top.
-[treeopen] u2_sim_top.u2_basic.MAC_top.U_MAC_tx.
-@22
-u2_sim_top.GMII_TXD[7:0]
-@28
-u2_sim_top.GMII_TX_EN
-@200
--
-@24
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_rx.fc_hwmark[15:0]
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_rx.fc_lwmark[15:0]
-@28
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_rx.pause_frame_send_en
-@22
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_rx.pause_quanta_set[15:0]
-@28
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_rx.rst
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_rx.rx_clk
-@24
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_rx.rx_fifo_space[15:0]
-@28
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_rx.tx_clk
-@200
--
-@28
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_rx.xoff_gen
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_rx.xoff_gen_complete
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_rx.xoff_int
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_rx.xoff_int_d1
-@200
--
-@28
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_rx.xon_gen
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_rx.xon_gen_complete
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_rx.xon_int
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_rx.xon_int_d1
-@200
--
-@28
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_tx.pause_apply
-@22
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_tx.pause_quanta[15:0]
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_tx.pause_quanta_counter[15:0]
-@28
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_tx.pause_quanta_sub
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_tx.pause_quanta_val
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_tx.pqval_d1
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_tx.pqval_d2
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_tx.rst
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_tx.tx_clk
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_tx.tx_pause_en
-u2_sim_top.u2_basic.proc_int
-@22
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_rx.countdown[21:0]
-u2_sim_top.u2_basic.MAC_top.flow_ctrl_tx.pause_quanta_counter[15:0]
-@25
-u2_sim_top.u2_basic.MAC_top.U_MAC_tx.U_MAC_tx_ctrl.Current_state[3:0]
diff --git a/testbench/SERDES.sav b/testbench/SERDES.sav
deleted file mode 100644
index 3bb6ba929..000000000
--- a/testbench/SERDES.sav
+++ /dev/null
@@ -1,35 +0,0 @@
-[size] 1400 967
-[pos] -1 -1
-*-30.885946 6591910000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
-[treeopen] u2_sim_top.
-[treeopen] u2_sim_top.u2_basic.
-[treeopen] u2_sim_top.u2_basic.serdes.
-@22
-u2_sim_top.u2_basic.serdes.ser_t[15:0]
-@28
-u2_sim_top.u2_basic.serdes.ser_tklsb
-u2_sim_top.u2_basic.serdes.ser_tkmsb
-u2_sim_top.u2_basic.ram_loader.ram_loader_done_o
-u2_sim_top.u2_basic.proc_int
-@22
-u2_sim_top.u2_basic.serdes.fifo_space[15:0]
-@28
-u2_sim_top.u2_basic.serdes.inhibit_tx
-u2_sim_top.u2_basic.serdes.send_xoff
-u2_sim_top.u2_basic.serdes.send_xon
-u2_sim_top.u2_basic.serdes.sent
-u2_sim_top.u2_basic.serdes.xoff_rcvd
-u2_sim_top.u2_basic.serdes.xon_rcvd
-u2_sim_top.u2_basic.serdes.serdes_rx.wr_write_o
-u2_sim_top.u2_basic.serdes.serdes_rx.wr_done_o
-u2_sim_top.u2_basic.serdes.serdes_rx.write
-@22
-u2_sim_top.u2_basic.serdes.serdes_rx.line_i[31:0]
-@28
-(0)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0]
-(1)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0]
-@22
-#chosen_data[15:0] (2)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (3)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (4)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (5)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (6)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (7)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (8)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (9)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (10)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (11)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (12)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (13)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (14)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (15)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (16)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0] (17)u2_sim_top.u2_basic.serdes.serdes_rx.chosen_data[17:0]
-u2_sim_top.u2_basic.serdes.ser_t[15:0]
-@28
-u2_sim_top.u2_basic.serdes.ser_tklsb
diff --git a/testbench/U2_SIM.sav b/testbench/U2_SIM.sav
deleted file mode 100644
index d320c2b6c..000000000
--- a/testbench/U2_SIM.sav
+++ /dev/null
@@ -1,95 +0,0 @@
-[size] 1400 971
-[pos] -1 -1
-*-18.079937 3641000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
-@28
-u2_sim_top.adc_oen_a
-u2_sim_top.adc_oen_b
-u2_sim_top.adc_pdn_a
-u2_sim_top.adc_pdn_b
-u2_sim_top.aux_clk
-u2_sim_top.POR
-u2_sim_top.clk_fpga
-u2_sim_top.clk_en[1:0]
-u2_sim_top.clk_sel[1:0]
-u2_sim_top.led1
-u2_sim_top.led2
-u2_sim_top.sclk
-u2_sim_top.u2_basic.wb_conbus_top.wb_conbus_arb.gnt[2:0]
-u2_sim_top.sda_pad_o
-u2_sim_top.sda_pad_oen_o
-u2_sim_top.sdi
-u2_sim_top.sdo
-u2_sim_top.sen_clk
-u2_sim_top.sen_dac
-u2_sim_top.ser_enable
-u2_sim_top.ser_loopen
-u2_sim_top.ser_prbsen
-u2_sim_top.ser_rx_en
-u2_sim_top.u2_basic.sysctrl.start
-u2_sim_top.u2_basic.sysctrl.POR
-u2_sim_top.u2_basic.done
-u2_sim_top.u2_basic.sysctrl.POR
-u2_sim_top.u2_basic.sysctrl.aux_clk
-u2_sim_top.u2_basic.sysctrl.clk_fpga
-u2_sim_top.u2_basic.sysctrl.done
-u2_sim_top.u2_basic.bus_writer.start
-u2_sim_top.u2_basic.bus_writer.done
-@22
-u2_sim_top.u2_basic.bus_writer.rom_addr[15:0]
-u2_sim_top.u2_basic.bus_writer.rom_data[47:0]
-u2_sim_top.u2_basic.bus_writer.state[3:0]
-@29
-u2_sim_top.u2_basic.bus_writer.wb_ack_i
-@22
-u2_sim_top.u2_basic.bus_writer.wb_adr_o[15:0]
-@28
-u2_sim_top.u2_basic.bus_writer.wb_clk_i
-u2_sim_top.u2_basic.bus_writer.wb_cyc_o
-@22
-u2_sim_top.u2_basic.bus_writer.wb_dat_o[31:0]
-u2_sim_top.u2_basic.bus_writer.wb_sel_o[3:0]
-@28
-u2_sim_top.u2_basic.bus_writer.wb_stb_o
-u2_sim_top.u2_basic.bus_writer.wb_we_o
-u2_sim_top.u2_basic.bus_writer.wb_rst_i
-u2_sim_top.u2_basic.wb_conbus_top.wb_conbus_arb.req[7:0]
-u2_sim_top.sda_pad_i
-u2_sim_top.u2_basic.wb_conbus_top.m0_cyc_i
-u2_sim_top.u2_basic.wb_conbus_top.s0_cyc_o
-@22
-u2_sim_top.u2_basic.wb_conbus_top.m0_adr_i[15:0]
-u2_sim_top.u2_basic.wb_conbus_top.m1_adr_i[15:0]
-@28
-u2_sim_top.u2_basic.wb_conbus_top.m0_stb_i
-u2_sim_top.u2_basic.wb_conbus_top.m1_stb_i
-u2_sim_top.u2_basic.wb_conbus_top.s0_stb_o
-u2_sim_top.u2_basic.wb_conbus_top.s1_stb_o
-u2_sim_top.u2_basic.wb_conbus_top.s2_stb_o
-u2_sim_top.u2_basic.wb_conbus_top.s3_stb_o
-u2_sim_top.u2_basic.wb_conbus_top.s0_ack_i
-u2_sim_top.u2_basic.control_lines.wb_cyc_i
-u2_sim_top.u2_basic.control_lines.wb_stb_i
-u2_sim_top.u2_basic.control_lines.wb_we_i
-u2_sim_top.u2_basic.control_lines.wb_ack_o
-u2_sim_top.u2_basic.s0_ack
-@22
-u2_sim_top.u2_basic.control_lines.internal_reg[31:0]
-u2_sim_top.u2_basic.control_lines.port_output[31:0]
-@28
-u2_sim_top.u2_basic.led1
-u2_sim_top.u2_basic.led2
-@22
-u2_sim_top.u2_basic.misc_outs[7:0]
-u2_sim_top.u2_basic.clock_outs[7:0]
-u2_sim_top.u2_basic.adc_outs[7:0]
-u2_sim_top.u2_basic.serdes_outs[7:0]
-@28
-u2_sim_top.u2_basic.shared_spi.miso_pad_i
-u2_sim_top.u2_basic.shared_spi.mosi_pad_o
-@22
-u2_sim_top.u2_basic.shared_spi.ss[7:0]
-u2_sim_top.u2_basic.shared_spi.divider[15:0]
-@28
-u2_sim_top.u2_basic.shared_spi.sclk_pad_o
-@22
-u2_sim_top.u2_basic.shared_spi.ss_pad_o[7:0]
diff --git a/.gitignore b/usrp2/.gitignore
index a12cca79c..a12cca79c 100644
--- a/.gitignore
+++ b/usrp2/.gitignore
diff --git a/boot_cpld/.gitignore b/usrp2/boot_cpld/.gitignore
index 45cf9a86b..45cf9a86b 100644
--- a/boot_cpld/.gitignore
+++ b/usrp2/boot_cpld/.gitignore
diff --git a/boot_cpld/_impact.cmd b/usrp2/boot_cpld/_impact.cmd
index 4af86cb02..4af86cb02 100755
--- a/boot_cpld/_impact.cmd
+++ b/usrp2/boot_cpld/_impact.cmd
diff --git a/boot_cpld/boot_cpld.ipf b/usrp2/boot_cpld/boot_cpld.ipf
index 8acb6821e..8acb6821e 100755
--- a/boot_cpld/boot_cpld.ipf
+++ b/usrp2/boot_cpld/boot_cpld.ipf
Binary files differ
diff --git a/boot_cpld/boot_cpld.ise b/usrp2/boot_cpld/boot_cpld.ise
index 7252d3768..7252d3768 100755
--- a/boot_cpld/boot_cpld.ise
+++ b/usrp2/boot_cpld/boot_cpld.ise
Binary files differ
diff --git a/boot_cpld/boot_cpld.lfp b/usrp2/boot_cpld/boot_cpld.lfp
index 0f0c8f2e2..0f0c8f2e2 100755
--- a/boot_cpld/boot_cpld.lfp
+++ b/usrp2/boot_cpld/boot_cpld.lfp
diff --git a/boot_cpld/boot_cpld.ucf b/usrp2/boot_cpld/boot_cpld.ucf
index 789bb1d96..789bb1d96 100755
--- a/boot_cpld/boot_cpld.ucf
+++ b/usrp2/boot_cpld/boot_cpld.ucf
diff --git a/boot_cpld/boot_cpld.v b/usrp2/boot_cpld/boot_cpld.v
index 2ffc6daed..2ffc6daed 100755
--- a/boot_cpld/boot_cpld.v
+++ b/usrp2/boot_cpld/boot_cpld.v
diff --git a/control_lib/.gitignore b/usrp2/control_lib/.gitignore
index 025385cff..025385cff 100644
--- a/control_lib/.gitignore
+++ b/usrp2/control_lib/.gitignore
diff --git a/control_lib/CRC16_D16.v b/usrp2/control_lib/CRC16_D16.v
index 7e2816af1..7e2816af1 100644
--- a/control_lib/CRC16_D16.v
+++ b/usrp2/control_lib/CRC16_D16.v
diff --git a/control_lib/atr_controller.v b/usrp2/control_lib/atr_controller.v
index fed2791f9..fed2791f9 100644
--- a/control_lib/atr_controller.v
+++ b/usrp2/control_lib/atr_controller.v
diff --git a/control_lib/bin2gray.v b/usrp2/control_lib/bin2gray.v
index 513402163..513402163 100644
--- a/control_lib/bin2gray.v
+++ b/usrp2/control_lib/bin2gray.v
diff --git a/control_lib/bootrom.mem b/usrp2/control_lib/bootrom.mem
index d688b4342..d688b4342 100644
--- a/control_lib/bootrom.mem
+++ b/usrp2/control_lib/bootrom.mem
diff --git a/control_lib/clock_bootstrap_rom.v b/usrp2/control_lib/clock_bootstrap_rom.v
index 46563db65..46563db65 100644
--- a/control_lib/clock_bootstrap_rom.v
+++ b/usrp2/control_lib/clock_bootstrap_rom.v
diff --git a/control_lib/clock_control.v b/usrp2/control_lib/clock_control.v
index 1bbe6bd75..1bbe6bd75 100644
--- a/control_lib/clock_control.v
+++ b/usrp2/control_lib/clock_control.v
diff --git a/control_lib/clock_control_tb.v b/usrp2/control_lib/clock_control_tb.v
index 4e705cf23..4e705cf23 100644
--- a/control_lib/clock_control_tb.v
+++ b/usrp2/control_lib/clock_control_tb.v
diff --git a/control_lib/cmdfile b/usrp2/control_lib/cmdfile
index cb3756cfc..cb3756cfc 100644
--- a/control_lib/cmdfile
+++ b/usrp2/control_lib/cmdfile
diff --git a/control_lib/dcache.v b/usrp2/control_lib/dcache.v
index 9063bf02a..9063bf02a 100644
--- a/control_lib/dcache.v
+++ b/usrp2/control_lib/dcache.v
diff --git a/control_lib/decoder_3_8.v b/usrp2/control_lib/decoder_3_8.v
index 729b45d18..729b45d18 100644
--- a/control_lib/decoder_3_8.v
+++ b/usrp2/control_lib/decoder_3_8.v
diff --git a/control_lib/dpram32.v b/usrp2/control_lib/dpram32.v
index 4da621823..4da621823 100644
--- a/control_lib/dpram32.v
+++ b/usrp2/control_lib/dpram32.v
diff --git a/control_lib/fifo_tb.v b/usrp2/control_lib/fifo_tb.v
index 616fe4ee7..616fe4ee7 100644
--- a/control_lib/fifo_tb.v
+++ b/usrp2/control_lib/fifo_tb.v
diff --git a/control_lib/gray2bin.v b/usrp2/control_lib/gray2bin.v
index 5df40bd52..5df40bd52 100644
--- a/control_lib/gray2bin.v
+++ b/usrp2/control_lib/gray2bin.v
diff --git a/control_lib/gray_send.v b/usrp2/control_lib/gray_send.v
index 7fc07d40c..7fc07d40c 100644
--- a/control_lib/gray_send.v
+++ b/usrp2/control_lib/gray_send.v
diff --git a/control_lib/icache.v b/usrp2/control_lib/icache.v
index bd21f47cc..bd21f47cc 100644
--- a/control_lib/icache.v
+++ b/usrp2/control_lib/icache.v
diff --git a/control_lib/longfifo.v b/usrp2/control_lib/longfifo.v
index bf3338e0b..bf3338e0b 100644
--- a/control_lib/longfifo.v
+++ b/usrp2/control_lib/longfifo.v
diff --git a/control_lib/medfifo.v b/usrp2/control_lib/medfifo.v
index 5a77e8c16..5a77e8c16 100644
--- a/control_lib/medfifo.v
+++ b/usrp2/control_lib/medfifo.v
diff --git a/control_lib/mux4.v b/usrp2/control_lib/mux4.v
index 31c85c832..31c85c832 100644
--- a/control_lib/mux4.v
+++ b/usrp2/control_lib/mux4.v
diff --git a/control_lib/mux8.v b/usrp2/control_lib/mux8.v
index 9db96a60f..9db96a60f 100644
--- a/control_lib/mux8.v
+++ b/usrp2/control_lib/mux8.v
diff --git a/control_lib/mux_32_4.v b/usrp2/control_lib/mux_32_4.v
index fef5812e9..fef5812e9 100644
--- a/control_lib/mux_32_4.v
+++ b/usrp2/control_lib/mux_32_4.v
diff --git a/control_lib/newfifo/.gitignore b/usrp2/control_lib/newfifo/.gitignore
index cba7efc8e..cba7efc8e 100644
--- a/control_lib/newfifo/.gitignore
+++ b/usrp2/control_lib/newfifo/.gitignore
diff --git a/control_lib/newfifo/buffer_int.v b/usrp2/control_lib/newfifo/buffer_int.v
index b45ed3532..b45ed3532 100644
--- a/control_lib/newfifo/buffer_int.v
+++ b/usrp2/control_lib/newfifo/buffer_int.v
diff --git a/control_lib/newfifo/buffer_int_tb.v b/usrp2/control_lib/newfifo/buffer_int_tb.v
index df54dcc0b..df54dcc0b 100644
--- a/control_lib/newfifo/buffer_int_tb.v
+++ b/usrp2/control_lib/newfifo/buffer_int_tb.v
diff --git a/control_lib/newfifo/buffer_pool.v b/usrp2/control_lib/newfifo/buffer_pool.v
index 41ac1deb3..41ac1deb3 100644
--- a/control_lib/newfifo/buffer_pool.v
+++ b/usrp2/control_lib/newfifo/buffer_pool.v
diff --git a/control_lib/newfifo/buffer_pool_tb.v b/usrp2/control_lib/newfifo/buffer_pool_tb.v
index 91a01d268..91a01d268 100644
--- a/control_lib/newfifo/buffer_pool_tb.v
+++ b/usrp2/control_lib/newfifo/buffer_pool_tb.v
diff --git a/control_lib/newfifo/fifo19_to_fifo36.v b/usrp2/control_lib/newfifo/fifo19_to_fifo36.v
index 5f9aeff9b..5f9aeff9b 100644
--- a/control_lib/newfifo/fifo19_to_fifo36.v
+++ b/usrp2/control_lib/newfifo/fifo19_to_fifo36.v
diff --git a/control_lib/newfifo/fifo19_to_ll8.v b/usrp2/control_lib/newfifo/fifo19_to_ll8.v
index 4707f7523..4707f7523 100644
--- a/control_lib/newfifo/fifo19_to_ll8.v
+++ b/usrp2/control_lib/newfifo/fifo19_to_ll8.v
diff --git a/control_lib/newfifo/fifo36_to_fifo18.v b/usrp2/control_lib/newfifo/fifo36_to_fifo18.v
index b636ab9ca..b636ab9ca 100644
--- a/control_lib/newfifo/fifo36_to_fifo18.v
+++ b/usrp2/control_lib/newfifo/fifo36_to_fifo18.v
diff --git a/control_lib/newfifo/fifo36_to_fifo19.v b/usrp2/control_lib/newfifo/fifo36_to_fifo19.v
index de249aaeb..de249aaeb 100644
--- a/control_lib/newfifo/fifo36_to_fifo19.v
+++ b/usrp2/control_lib/newfifo/fifo36_to_fifo19.v
diff --git a/control_lib/newfifo/fifo36_to_ll8.v b/usrp2/control_lib/newfifo/fifo36_to_ll8.v
index 0dee1dfc6..0dee1dfc6 100644
--- a/control_lib/newfifo/fifo36_to_ll8.v
+++ b/usrp2/control_lib/newfifo/fifo36_to_ll8.v
diff --git a/control_lib/newfifo/fifo_2clock.v b/usrp2/control_lib/newfifo/fifo_2clock.v
index 34c85ccb4..34c85ccb4 100644
--- a/control_lib/newfifo/fifo_2clock.v
+++ b/usrp2/control_lib/newfifo/fifo_2clock.v
diff --git a/control_lib/newfifo/fifo_2clock_cascade.v b/usrp2/control_lib/newfifo/fifo_2clock_cascade.v
index 5ce726977..5ce726977 100644
--- a/control_lib/newfifo/fifo_2clock_cascade.v
+++ b/usrp2/control_lib/newfifo/fifo_2clock_cascade.v
diff --git a/control_lib/newfifo/fifo_cascade.v b/usrp2/control_lib/newfifo/fifo_cascade.v
index fdd8449bc..fdd8449bc 100644
--- a/control_lib/newfifo/fifo_cascade.v
+++ b/usrp2/control_lib/newfifo/fifo_cascade.v
diff --git a/control_lib/newfifo/fifo_long.v b/usrp2/control_lib/newfifo/fifo_long.v
index 0426779f6..0426779f6 100644
--- a/control_lib/newfifo/fifo_long.v
+++ b/usrp2/control_lib/newfifo/fifo_long.v
diff --git a/control_lib/newfifo/fifo_new_tb.vcd b/usrp2/control_lib/newfifo/fifo_new_tb.vcd
index 796889e7d..796889e7d 100644
--- a/control_lib/newfifo/fifo_new_tb.vcd
+++ b/usrp2/control_lib/newfifo/fifo_new_tb.vcd
diff --git a/control_lib/newfifo/fifo_short.v b/usrp2/control_lib/newfifo/fifo_short.v
index 53a7603c7..53a7603c7 100644
--- a/control_lib/newfifo/fifo_short.v
+++ b/usrp2/control_lib/newfifo/fifo_short.v
diff --git a/control_lib/newfifo/fifo_spec.txt b/usrp2/control_lib/newfifo/fifo_spec.txt
index 133b9fa8e..133b9fa8e 100644
--- a/control_lib/newfifo/fifo_spec.txt
+++ b/usrp2/control_lib/newfifo/fifo_spec.txt
diff --git a/control_lib/newfifo/fifo_tb.v b/usrp2/control_lib/newfifo/fifo_tb.v
index f561df7fa..f561df7fa 100644
--- a/control_lib/newfifo/fifo_tb.v
+++ b/usrp2/control_lib/newfifo/fifo_tb.v
diff --git a/control_lib/newfifo/ll8_shortfifo.v b/usrp2/control_lib/newfifo/ll8_shortfifo.v
index 39ada9a4f..39ada9a4f 100644
--- a/control_lib/newfifo/ll8_shortfifo.v
+++ b/usrp2/control_lib/newfifo/ll8_shortfifo.v
diff --git a/control_lib/newfifo/ll8_to_fifo19.v b/usrp2/control_lib/newfifo/ll8_to_fifo19.v
index af3b91afb..af3b91afb 100644
--- a/control_lib/newfifo/ll8_to_fifo19.v
+++ b/usrp2/control_lib/newfifo/ll8_to_fifo19.v
diff --git a/control_lib/newfifo/ll8_to_fifo36.v b/usrp2/control_lib/newfifo/ll8_to_fifo36.v
index 108daa903..108daa903 100644
--- a/control_lib/newfifo/ll8_to_fifo36.v
+++ b/usrp2/control_lib/newfifo/ll8_to_fifo36.v
diff --git a/control_lib/nsgpio.v b/usrp2/control_lib/nsgpio.v
index 937ea7020..937ea7020 100644
--- a/control_lib/nsgpio.v
+++ b/usrp2/control_lib/nsgpio.v
diff --git a/control_lib/oneshot_2clk.v b/usrp2/control_lib/oneshot_2clk.v
index 72f16a4b3..72f16a4b3 100644
--- a/control_lib/oneshot_2clk.v
+++ b/usrp2/control_lib/oneshot_2clk.v
diff --git a/control_lib/pic.v b/usrp2/control_lib/pic.v
index 9b9944d4a..9b9944d4a 100644
--- a/control_lib/pic.v
+++ b/usrp2/control_lib/pic.v
diff --git a/control_lib/priority_enc.v b/usrp2/control_lib/priority_enc.v
index 916192445..916192445 100644
--- a/control_lib/priority_enc.v
+++ b/usrp2/control_lib/priority_enc.v
diff --git a/control_lib/ram_2port.v b/usrp2/control_lib/ram_2port.v
index 6c8332b9c..6c8332b9c 100644
--- a/control_lib/ram_2port.v
+++ b/usrp2/control_lib/ram_2port.v
diff --git a/control_lib/ram_harv_cache.v b/usrp2/control_lib/ram_harv_cache.v
index 29fdebf7a..29fdebf7a 100644
--- a/control_lib/ram_harv_cache.v
+++ b/usrp2/control_lib/ram_harv_cache.v
diff --git a/control_lib/ram_loader.v b/usrp2/control_lib/ram_loader.v
index cb67de739..cb67de739 100644
--- a/control_lib/ram_loader.v
+++ b/usrp2/control_lib/ram_loader.v
diff --git a/control_lib/ram_wb_harvard.v b/usrp2/control_lib/ram_wb_harvard.v
index c3efc12e0..c3efc12e0 100644
--- a/control_lib/ram_wb_harvard.v
+++ b/usrp2/control_lib/ram_wb_harvard.v
diff --git a/control_lib/reset_sync.v b/usrp2/control_lib/reset_sync.v
index 94d966840..94d966840 100644
--- a/control_lib/reset_sync.v
+++ b/usrp2/control_lib/reset_sync.v
diff --git a/control_lib/sd_spi.v b/usrp2/control_lib/sd_spi.v
index 3f4d7f46a..3f4d7f46a 100644
--- a/control_lib/sd_spi.v
+++ b/usrp2/control_lib/sd_spi.v
diff --git a/control_lib/sd_spi_tb.v b/usrp2/control_lib/sd_spi_tb.v
index e30a5bdf6..e30a5bdf6 100644
--- a/control_lib/sd_spi_tb.v
+++ b/usrp2/control_lib/sd_spi_tb.v
diff --git a/control_lib/sd_spi_wb.v b/usrp2/control_lib/sd_spi_wb.v
index 7a6258b56..7a6258b56 100644
--- a/control_lib/sd_spi_wb.v
+++ b/usrp2/control_lib/sd_spi_wb.v
diff --git a/control_lib/setting_reg.v b/usrp2/control_lib/setting_reg.v
index c8aff230f..c8aff230f 100644
--- a/control_lib/setting_reg.v
+++ b/usrp2/control_lib/setting_reg.v
diff --git a/control_lib/settings_bus.v b/usrp2/control_lib/settings_bus.v
index d01a30ab4..d01a30ab4 100644
--- a/control_lib/settings_bus.v
+++ b/usrp2/control_lib/settings_bus.v
diff --git a/control_lib/shortfifo.v b/usrp2/control_lib/shortfifo.v
index d8ce1428e..d8ce1428e 100644
--- a/control_lib/shortfifo.v
+++ b/usrp2/control_lib/shortfifo.v
diff --git a/control_lib/simple_uart.v b/usrp2/control_lib/simple_uart.v
index 22f0e70a2..22f0e70a2 100644
--- a/control_lib/simple_uart.v
+++ b/usrp2/control_lib/simple_uart.v
diff --git a/control_lib/simple_uart_rx.v b/usrp2/control_lib/simple_uart_rx.v
index debdd618b..debdd618b 100644
--- a/control_lib/simple_uart_rx.v
+++ b/usrp2/control_lib/simple_uart_rx.v
diff --git a/control_lib/simple_uart_tx.v b/usrp2/control_lib/simple_uart_tx.v
index e11a347ed..e11a347ed 100644
--- a/control_lib/simple_uart_tx.v
+++ b/usrp2/control_lib/simple_uart_tx.v
diff --git a/control_lib/spi.v b/usrp2/control_lib/spi.v
index a80c488e9..a80c488e9 100644
--- a/control_lib/spi.v
+++ b/usrp2/control_lib/spi.v
diff --git a/control_lib/srl.v b/usrp2/control_lib/srl.v
index fa28c7669..fa28c7669 100644
--- a/control_lib/srl.v
+++ b/usrp2/control_lib/srl.v
diff --git a/control_lib/ss_rcvr.v b/usrp2/control_lib/ss_rcvr.v
index 8e650d21b..8e650d21b 100644
--- a/control_lib/ss_rcvr.v
+++ b/usrp2/control_lib/ss_rcvr.v
diff --git a/control_lib/system_control.v b/usrp2/control_lib/system_control.v
index 5d89f13db..5d89f13db 100644
--- a/control_lib/system_control.v
+++ b/usrp2/control_lib/system_control.v
diff --git a/control_lib/system_control_tb.v b/usrp2/control_lib/system_control_tb.v
index a8eff4811..a8eff4811 100644
--- a/control_lib/system_control_tb.v
+++ b/usrp2/control_lib/system_control_tb.v
diff --git a/control_lib/traffic_cop.v b/usrp2/control_lib/traffic_cop.v
index e7579656a..e7579656a 100644
--- a/control_lib/traffic_cop.v
+++ b/usrp2/control_lib/traffic_cop.v
diff --git a/control_lib/wb_1master.v b/usrp2/control_lib/wb_1master.v
index fb313efae..fb313efae 100644
--- a/control_lib/wb_1master.v
+++ b/usrp2/control_lib/wb_1master.v
diff --git a/control_lib/wb_bridge_16_32.v b/usrp2/control_lib/wb_bridge_16_32.v
index 405e25c3c..405e25c3c 100644
--- a/control_lib/wb_bridge_16_32.v
+++ b/usrp2/control_lib/wb_bridge_16_32.v
diff --git a/control_lib/wb_bus_writer.v b/usrp2/control_lib/wb_bus_writer.v
index fc148a0ff..fc148a0ff 100644
--- a/control_lib/wb_bus_writer.v
+++ b/usrp2/control_lib/wb_bus_writer.v
diff --git a/control_lib/wb_output_pins32.v b/usrp2/control_lib/wb_output_pins32.v
index 1517f2066..1517f2066 100644
--- a/control_lib/wb_output_pins32.v
+++ b/usrp2/control_lib/wb_output_pins32.v
diff --git a/control_lib/wb_ram_block.v b/usrp2/control_lib/wb_ram_block.v
index 044d34ca4..044d34ca4 100644
--- a/control_lib/wb_ram_block.v
+++ b/usrp2/control_lib/wb_ram_block.v
diff --git a/control_lib/wb_ram_dist.v b/usrp2/control_lib/wb_ram_dist.v
index cffc2f423..cffc2f423 100644
--- a/control_lib/wb_ram_dist.v
+++ b/usrp2/control_lib/wb_ram_dist.v
diff --git a/control_lib/wb_readback_mux.v b/usrp2/control_lib/wb_readback_mux.v
index 3922b03e3..3922b03e3 100644
--- a/control_lib/wb_readback_mux.v
+++ b/usrp2/control_lib/wb_readback_mux.v
diff --git a/control_lib/wb_regfile_2clock.v b/usrp2/control_lib/wb_regfile_2clock.v
index e248e5161..e248e5161 100644
--- a/control_lib/wb_regfile_2clock.v
+++ b/usrp2/control_lib/wb_regfile_2clock.v
diff --git a/control_lib/wb_semaphore.v b/usrp2/control_lib/wb_semaphore.v
index a9208e6a1..a9208e6a1 100644
--- a/control_lib/wb_semaphore.v
+++ b/usrp2/control_lib/wb_semaphore.v
diff --git a/control_lib/wb_sim.v b/usrp2/control_lib/wb_sim.v
index b324e1457..b324e1457 100644
--- a/control_lib/wb_sim.v
+++ b/usrp2/control_lib/wb_sim.v
diff --git a/coregen/.gitignore b/usrp2/coregen/.gitignore
index 956cab52b..956cab52b 100644
--- a/coregen/.gitignore
+++ b/usrp2/coregen/.gitignore
diff --git a/coregen/coregen.cgp b/usrp2/coregen/coregen.cgp
index 810d64dac..810d64dac 100644
--- a/coregen/coregen.cgp
+++ b/usrp2/coregen/coregen.cgp
diff --git a/coregen/fifo_generator_release_notes.txt b/usrp2/coregen/fifo_generator_release_notes.txt
index 554ec87f4..554ec87f4 100644
--- a/coregen/fifo_generator_release_notes.txt
+++ b/usrp2/coregen/fifo_generator_release_notes.txt
diff --git a/coregen/fifo_generator_ug175.pdf b/usrp2/coregen/fifo_generator_ug175.pdf
index 2c3e3c200..2c3e3c200 100644
--- a/coregen/fifo_generator_ug175.pdf
+++ b/usrp2/coregen/fifo_generator_ug175.pdf
Binary files differ
diff --git a/coregen/fifo_xlnx_16x19_2clk.ngc b/usrp2/coregen/fifo_xlnx_16x19_2clk.ngc
index b12d34d7c..b12d34d7c 100644
--- a/coregen/fifo_xlnx_16x19_2clk.ngc
+++ b/usrp2/coregen/fifo_xlnx_16x19_2clk.ngc
diff --git a/coregen/fifo_xlnx_16x19_2clk.v b/usrp2/coregen/fifo_xlnx_16x19_2clk.v
index 1d633384b..1d633384b 100644
--- a/coregen/fifo_xlnx_16x19_2clk.v
+++ b/usrp2/coregen/fifo_xlnx_16x19_2clk.v
diff --git a/coregen/fifo_xlnx_16x19_2clk.veo b/usrp2/coregen/fifo_xlnx_16x19_2clk.veo
index 2e9af1efa..2e9af1efa 100644
--- a/coregen/fifo_xlnx_16x19_2clk.veo
+++ b/usrp2/coregen/fifo_xlnx_16x19_2clk.veo
diff --git a/coregen/fifo_xlnx_16x19_2clk.xco b/usrp2/coregen/fifo_xlnx_16x19_2clk.xco
index d0f638026..d0f638026 100644
--- a/coregen/fifo_xlnx_16x19_2clk.xco
+++ b/usrp2/coregen/fifo_xlnx_16x19_2clk.xco
diff --git a/coregen/fifo_xlnx_16x19_2clk_fifo_generator_v4_3_xst_1.lso b/usrp2/coregen/fifo_xlnx_16x19_2clk_fifo_generator_v4_3_xst_1.lso
index f1a6f7899..f1a6f7899 100644
--- a/coregen/fifo_xlnx_16x19_2clk_fifo_generator_v4_3_xst_1.lso
+++ b/usrp2/coregen/fifo_xlnx_16x19_2clk_fifo_generator_v4_3_xst_1.lso
diff --git a/coregen/fifo_xlnx_16x19_2clk_fifo_generator_v4_3_xst_1.ngc_xst.xrpt b/usrp2/coregen/fifo_xlnx_16x19_2clk_fifo_generator_v4_3_xst_1.ngc_xst.xrpt
index ef33fff67..ef33fff67 100644
--- a/coregen/fifo_xlnx_16x19_2clk_fifo_generator_v4_3_xst_1.ngc_xst.xrpt
+++ b/usrp2/coregen/fifo_xlnx_16x19_2clk_fifo_generator_v4_3_xst_1.ngc_xst.xrpt
diff --git a/coregen/fifo_xlnx_16x19_2clk_flist.txt b/usrp2/coregen/fifo_xlnx_16x19_2clk_flist.txt
index 5e1a6ed35..5e1a6ed35 100644
--- a/coregen/fifo_xlnx_16x19_2clk_flist.txt
+++ b/usrp2/coregen/fifo_xlnx_16x19_2clk_flist.txt
diff --git a/coregen/fifo_xlnx_16x19_2clk_readme.txt b/usrp2/coregen/fifo_xlnx_16x19_2clk_readme.txt
index 1b5976555..1b5976555 100644
--- a/coregen/fifo_xlnx_16x19_2clk_readme.txt
+++ b/usrp2/coregen/fifo_xlnx_16x19_2clk_readme.txt
diff --git a/coregen/fifo_xlnx_16x19_2clk_xmdf.tcl b/usrp2/coregen/fifo_xlnx_16x19_2clk_xmdf.tcl
index 8d633e9c2..8d633e9c2 100644
--- a/coregen/fifo_xlnx_16x19_2clk_xmdf.tcl
+++ b/usrp2/coregen/fifo_xlnx_16x19_2clk_xmdf.tcl
diff --git a/coregen/fifo_xlnx_2Kx36_2clk.asy b/usrp2/coregen/fifo_xlnx_2Kx36_2clk.asy
index a87aa2f84..a87aa2f84 100644
--- a/coregen/fifo_xlnx_2Kx36_2clk.asy
+++ b/usrp2/coregen/fifo_xlnx_2Kx36_2clk.asy
diff --git a/coregen/fifo_xlnx_2Kx36_2clk.ngc b/usrp2/coregen/fifo_xlnx_2Kx36_2clk.ngc
index 684eb74f4..684eb74f4 100644
--- a/coregen/fifo_xlnx_2Kx36_2clk.ngc
+++ b/usrp2/coregen/fifo_xlnx_2Kx36_2clk.ngc
diff --git a/coregen/fifo_xlnx_2Kx36_2clk.sym b/usrp2/coregen/fifo_xlnx_2Kx36_2clk.sym
index 5d56b5c98..5d56b5c98 100644
--- a/coregen/fifo_xlnx_2Kx36_2clk.sym
+++ b/usrp2/coregen/fifo_xlnx_2Kx36_2clk.sym
diff --git a/coregen/fifo_xlnx_2Kx36_2clk.v b/usrp2/coregen/fifo_xlnx_2Kx36_2clk.v
index 0762b3ae9..0762b3ae9 100644
--- a/coregen/fifo_xlnx_2Kx36_2clk.v
+++ b/usrp2/coregen/fifo_xlnx_2Kx36_2clk.v
diff --git a/coregen/fifo_xlnx_2Kx36_2clk.veo b/usrp2/coregen/fifo_xlnx_2Kx36_2clk.veo
index af9191555..af9191555 100644
--- a/coregen/fifo_xlnx_2Kx36_2clk.veo
+++ b/usrp2/coregen/fifo_xlnx_2Kx36_2clk.veo
diff --git a/coregen/fifo_xlnx_2Kx36_2clk.vhd b/usrp2/coregen/fifo_xlnx_2Kx36_2clk.vhd
index 53033dc97..53033dc97 100644
--- a/coregen/fifo_xlnx_2Kx36_2clk.vhd
+++ b/usrp2/coregen/fifo_xlnx_2Kx36_2clk.vhd
diff --git a/coregen/fifo_xlnx_2Kx36_2clk.vho b/usrp2/coregen/fifo_xlnx_2Kx36_2clk.vho
index 5165b0bc4..5165b0bc4 100644
--- a/coregen/fifo_xlnx_2Kx36_2clk.vho
+++ b/usrp2/coregen/fifo_xlnx_2Kx36_2clk.vho
diff --git a/coregen/fifo_xlnx_2Kx36_2clk.xco b/usrp2/coregen/fifo_xlnx_2Kx36_2clk.xco
index e25ad38da..e25ad38da 100644
--- a/coregen/fifo_xlnx_2Kx36_2clk.xco
+++ b/usrp2/coregen/fifo_xlnx_2Kx36_2clk.xco
diff --git a/coregen/fifo_xlnx_2Kx36_2clk_fifo_generator_v4_3_xst_1.lso b/usrp2/coregen/fifo_xlnx_2Kx36_2clk_fifo_generator_v4_3_xst_1.lso
index f1a6f7899..f1a6f7899 100644
--- a/coregen/fifo_xlnx_2Kx36_2clk_fifo_generator_v4_3_xst_1.lso
+++ b/usrp2/coregen/fifo_xlnx_2Kx36_2clk_fifo_generator_v4_3_xst_1.lso
diff --git a/coregen/fifo_xlnx_2Kx36_2clk_fifo_generator_v4_3_xst_1.ngc_xst.xrpt b/usrp2/coregen/fifo_xlnx_2Kx36_2clk_fifo_generator_v4_3_xst_1.ngc_xst.xrpt
index 5108be2c5..5108be2c5 100644
--- a/coregen/fifo_xlnx_2Kx36_2clk_fifo_generator_v4_3_xst_1.ngc_xst.xrpt
+++ b/usrp2/coregen/fifo_xlnx_2Kx36_2clk_fifo_generator_v4_3_xst_1.ngc_xst.xrpt
diff --git a/coregen/fifo_xlnx_2Kx36_2clk_flist.txt b/usrp2/coregen/fifo_xlnx_2Kx36_2clk_flist.txt
index 670d84713..670d84713 100644
--- a/coregen/fifo_xlnx_2Kx36_2clk_flist.txt
+++ b/usrp2/coregen/fifo_xlnx_2Kx36_2clk_flist.txt
diff --git a/coregen/fifo_xlnx_2Kx36_2clk_readme.txt b/usrp2/coregen/fifo_xlnx_2Kx36_2clk_readme.txt
index 1879503a9..1879503a9 100644
--- a/coregen/fifo_xlnx_2Kx36_2clk_readme.txt
+++ b/usrp2/coregen/fifo_xlnx_2Kx36_2clk_readme.txt
diff --git a/coregen/fifo_xlnx_2Kx36_2clk_xmdf.tcl b/usrp2/coregen/fifo_xlnx_2Kx36_2clk_xmdf.tcl
index cac25efd2..cac25efd2 100644
--- a/coregen/fifo_xlnx_2Kx36_2clk_xmdf.tcl
+++ b/usrp2/coregen/fifo_xlnx_2Kx36_2clk_xmdf.tcl
diff --git a/coregen/fifo_xlnx_512x36_2clk.asy b/usrp2/coregen/fifo_xlnx_512x36_2clk.asy
index ecc80b648..ecc80b648 100644
--- a/coregen/fifo_xlnx_512x36_2clk.asy
+++ b/usrp2/coregen/fifo_xlnx_512x36_2clk.asy
diff --git a/coregen/fifo_xlnx_512x36_2clk.ngc b/usrp2/coregen/fifo_xlnx_512x36_2clk.ngc
index 55486485a..55486485a 100644
--- a/coregen/fifo_xlnx_512x36_2clk.ngc
+++ b/usrp2/coregen/fifo_xlnx_512x36_2clk.ngc
diff --git a/coregen/fifo_xlnx_512x36_2clk.sym b/usrp2/coregen/fifo_xlnx_512x36_2clk.sym
index 13e8af33d..13e8af33d 100644
--- a/coregen/fifo_xlnx_512x36_2clk.sym
+++ b/usrp2/coregen/fifo_xlnx_512x36_2clk.sym
diff --git a/coregen/fifo_xlnx_512x36_2clk.v b/usrp2/coregen/fifo_xlnx_512x36_2clk.v
index 905069743..905069743 100644
--- a/coregen/fifo_xlnx_512x36_2clk.v
+++ b/usrp2/coregen/fifo_xlnx_512x36_2clk.v
diff --git a/coregen/fifo_xlnx_512x36_2clk.veo b/usrp2/coregen/fifo_xlnx_512x36_2clk.veo
index 6699ee73b..6699ee73b 100644
--- a/coregen/fifo_xlnx_512x36_2clk.veo
+++ b/usrp2/coregen/fifo_xlnx_512x36_2clk.veo
diff --git a/coregen/fifo_xlnx_512x36_2clk.vhd b/usrp2/coregen/fifo_xlnx_512x36_2clk.vhd
index d9c2dd307..d9c2dd307 100644
--- a/coregen/fifo_xlnx_512x36_2clk.vhd
+++ b/usrp2/coregen/fifo_xlnx_512x36_2clk.vhd
diff --git a/coregen/fifo_xlnx_512x36_2clk.vho b/usrp2/coregen/fifo_xlnx_512x36_2clk.vho
index 70eac27a5..70eac27a5 100644
--- a/coregen/fifo_xlnx_512x36_2clk.vho
+++ b/usrp2/coregen/fifo_xlnx_512x36_2clk.vho
diff --git a/coregen/fifo_xlnx_512x36_2clk.xco b/usrp2/coregen/fifo_xlnx_512x36_2clk.xco
index 5934ef285..5934ef285 100644
--- a/coregen/fifo_xlnx_512x36_2clk.xco
+++ b/usrp2/coregen/fifo_xlnx_512x36_2clk.xco
diff --git a/coregen/fifo_xlnx_512x36_2clk_fifo_generator_v4_3_xst_1.lso b/usrp2/coregen/fifo_xlnx_512x36_2clk_fifo_generator_v4_3_xst_1.lso
index f1a6f7899..f1a6f7899 100644
--- a/coregen/fifo_xlnx_512x36_2clk_fifo_generator_v4_3_xst_1.lso
+++ b/usrp2/coregen/fifo_xlnx_512x36_2clk_fifo_generator_v4_3_xst_1.lso
diff --git a/coregen/fifo_xlnx_512x36_2clk_fifo_generator_v4_3_xst_1.ngc_xst.xrpt b/usrp2/coregen/fifo_xlnx_512x36_2clk_fifo_generator_v4_3_xst_1.ngc_xst.xrpt
index d110a0158..d110a0158 100644
--- a/coregen/fifo_xlnx_512x36_2clk_fifo_generator_v4_3_xst_1.ngc_xst.xrpt
+++ b/usrp2/coregen/fifo_xlnx_512x36_2clk_fifo_generator_v4_3_xst_1.ngc_xst.xrpt
diff --git a/coregen/fifo_xlnx_512x36_2clk_flist.txt b/usrp2/coregen/fifo_xlnx_512x36_2clk_flist.txt
index b0975be2d..b0975be2d 100644
--- a/coregen/fifo_xlnx_512x36_2clk_flist.txt
+++ b/usrp2/coregen/fifo_xlnx_512x36_2clk_flist.txt
diff --git a/coregen/fifo_xlnx_512x36_2clk_readme.txt b/usrp2/coregen/fifo_xlnx_512x36_2clk_readme.txt
index a250a74f5..a250a74f5 100644
--- a/coregen/fifo_xlnx_512x36_2clk_readme.txt
+++ b/usrp2/coregen/fifo_xlnx_512x36_2clk_readme.txt
diff --git a/coregen/fifo_xlnx_512x36_2clk_xmdf.tcl b/usrp2/coregen/fifo_xlnx_512x36_2clk_xmdf.tcl
index 8a0c0e3ff..8a0c0e3ff 100644
--- a/coregen/fifo_xlnx_512x36_2clk_xmdf.tcl
+++ b/usrp2/coregen/fifo_xlnx_512x36_2clk_xmdf.tcl
diff --git a/coregen/fifo_xlnx_64x36_2clk.ngc b/usrp2/coregen/fifo_xlnx_64x36_2clk.ngc
index e8c55a1af..e8c55a1af 100644
--- a/coregen/fifo_xlnx_64x36_2clk.ngc
+++ b/usrp2/coregen/fifo_xlnx_64x36_2clk.ngc
diff --git a/coregen/fifo_xlnx_64x36_2clk.v b/usrp2/coregen/fifo_xlnx_64x36_2clk.v
index e84237689..e84237689 100644
--- a/coregen/fifo_xlnx_64x36_2clk.v
+++ b/usrp2/coregen/fifo_xlnx_64x36_2clk.v
diff --git a/coregen/fifo_xlnx_64x36_2clk.veo b/usrp2/coregen/fifo_xlnx_64x36_2clk.veo
index 9c761370c..9c761370c 100644
--- a/coregen/fifo_xlnx_64x36_2clk.veo
+++ b/usrp2/coregen/fifo_xlnx_64x36_2clk.veo
diff --git a/coregen/fifo_xlnx_64x36_2clk.xco b/usrp2/coregen/fifo_xlnx_64x36_2clk.xco
index c6e9aae27..c6e9aae27 100644
--- a/coregen/fifo_xlnx_64x36_2clk.xco
+++ b/usrp2/coregen/fifo_xlnx_64x36_2clk.xco
diff --git a/coregen/fifo_xlnx_64x36_2clk_fifo_generator_v4_3_xst_1.lso b/usrp2/coregen/fifo_xlnx_64x36_2clk_fifo_generator_v4_3_xst_1.lso
index f1a6f7899..f1a6f7899 100644
--- a/coregen/fifo_xlnx_64x36_2clk_fifo_generator_v4_3_xst_1.lso
+++ b/usrp2/coregen/fifo_xlnx_64x36_2clk_fifo_generator_v4_3_xst_1.lso
diff --git a/coregen/fifo_xlnx_64x36_2clk_fifo_generator_v4_3_xst_1.ngc_xst.xrpt b/usrp2/coregen/fifo_xlnx_64x36_2clk_fifo_generator_v4_3_xst_1.ngc_xst.xrpt
index a23402f56..a23402f56 100644
--- a/coregen/fifo_xlnx_64x36_2clk_fifo_generator_v4_3_xst_1.ngc_xst.xrpt
+++ b/usrp2/coregen/fifo_xlnx_64x36_2clk_fifo_generator_v4_3_xst_1.ngc_xst.xrpt
diff --git a/coregen/fifo_xlnx_64x36_2clk_flist.txt b/usrp2/coregen/fifo_xlnx_64x36_2clk_flist.txt
index 44e31eb6c..44e31eb6c 100644
--- a/coregen/fifo_xlnx_64x36_2clk_flist.txt
+++ b/usrp2/coregen/fifo_xlnx_64x36_2clk_flist.txt
diff --git a/coregen/fifo_xlnx_64x36_2clk_readme.txt b/usrp2/coregen/fifo_xlnx_64x36_2clk_readme.txt
index 7734c0087..7734c0087 100644
--- a/coregen/fifo_xlnx_64x36_2clk_readme.txt
+++ b/usrp2/coregen/fifo_xlnx_64x36_2clk_readme.txt
diff --git a/coregen/fifo_xlnx_64x36_2clk_xmdf.tcl b/usrp2/coregen/fifo_xlnx_64x36_2clk_xmdf.tcl
index ff5dfd3c2..ff5dfd3c2 100644
--- a/coregen/fifo_xlnx_64x36_2clk_xmdf.tcl
+++ b/usrp2/coregen/fifo_xlnx_64x36_2clk_xmdf.tcl
diff --git a/extram/.gitignore b/usrp2/extram/.gitignore
index 7fc71ccb6..7fc71ccb6 100644
--- a/extram/.gitignore
+++ b/usrp2/extram/.gitignore
diff --git a/extram/extram_interface.v b/usrp2/extram/extram_interface.v
index 7554592ba..7554592ba 100644
--- a/extram/extram_interface.v
+++ b/usrp2/extram/extram_interface.v
diff --git a/extram/extram_wb.v b/usrp2/extram/extram_wb.v
index c8428783a..c8428783a 100644
--- a/extram/extram_wb.v
+++ b/usrp2/extram/extram_wb.v
diff --git a/extram/wb_zbt16_b.v b/usrp2/extram/wb_zbt16_b.v
index d93e21c99..d93e21c99 100644
--- a/extram/wb_zbt16_b.v
+++ b/usrp2/extram/wb_zbt16_b.v
diff --git a/models/BUFG.v b/usrp2/models/BUFG.v
index a935c6285..a935c6285 100644
--- a/models/BUFG.v
+++ b/usrp2/models/BUFG.v
diff --git a/models/CY7C1356C/cy1356.inp b/usrp2/models/CY7C1356C/cy1356.inp
index a55ffac39..a55ffac39 100644
--- a/models/CY7C1356C/cy1356.inp
+++ b/usrp2/models/CY7C1356C/cy1356.inp
diff --git a/models/CY7C1356C/cy1356.v b/usrp2/models/CY7C1356C/cy1356.v
index 9197eea6d..9197eea6d 100644
--- a/models/CY7C1356C/cy1356.v
+++ b/usrp2/models/CY7C1356C/cy1356.v
diff --git a/models/CY7C1356C/readme.txt b/usrp2/models/CY7C1356C/readme.txt
index 3578c80dc..3578c80dc 100644
--- a/models/CY7C1356C/readme.txt
+++ b/usrp2/models/CY7C1356C/readme.txt
diff --git a/models/CY7C1356C/testbench.v b/usrp2/models/CY7C1356C/testbench.v
index 5dde89e6c..5dde89e6c 100644
--- a/models/CY7C1356C/testbench.v
+++ b/usrp2/models/CY7C1356C/testbench.v
diff --git a/models/FIFO_GENERATOR_V4_3.v b/usrp2/models/FIFO_GENERATOR_V4_3.v
index bcb9af8a7..bcb9af8a7 100644
--- a/models/FIFO_GENERATOR_V4_3.v
+++ b/usrp2/models/FIFO_GENERATOR_V4_3.v
diff --git a/models/M24LC024B.v b/usrp2/models/M24LC024B.v
index 45e04b450..45e04b450 100644
--- a/models/M24LC024B.v
+++ b/usrp2/models/M24LC024B.v
diff --git a/models/M24LC02B.v b/usrp2/models/M24LC02B.v
index 4d9e2c6e2..4d9e2c6e2 100644
--- a/models/M24LC02B.v
+++ b/usrp2/models/M24LC02B.v
diff --git a/models/MULT18X18S.v b/usrp2/models/MULT18X18S.v
index 5d39eeaa6..5d39eeaa6 100644
--- a/models/MULT18X18S.v
+++ b/usrp2/models/MULT18X18S.v
diff --git a/models/RAMB16_S36_S36.v b/usrp2/models/RAMB16_S36_S36.v
index f1a92c7ce..f1a92c7ce 100644
--- a/models/RAMB16_S36_S36.v
+++ b/usrp2/models/RAMB16_S36_S36.v
diff --git a/models/SRL16E.v b/usrp2/models/SRL16E.v
index e71a419ac..e71a419ac 100644
--- a/models/SRL16E.v
+++ b/usrp2/models/SRL16E.v
diff --git a/models/SRLC16E.v b/usrp2/models/SRLC16E.v
index a68bbe9e9..a68bbe9e9 100644
--- a/models/SRLC16E.v
+++ b/usrp2/models/SRLC16E.v
diff --git a/models/adc_model.v b/usrp2/models/adc_model.v
index e5a3ee0d8..e5a3ee0d8 100644
--- a/models/adc_model.v
+++ b/usrp2/models/adc_model.v
diff --git a/models/cpld_model.v b/usrp2/models/cpld_model.v
index c886433ae..c886433ae 100644
--- a/models/cpld_model.v
+++ b/usrp2/models/cpld_model.v
diff --git a/models/math_real.v b/usrp2/models/math_real.v
index e30f68ee7..e30f68ee7 100644
--- a/models/math_real.v
+++ b/usrp2/models/math_real.v
diff --git a/models/miim_model.v b/usrp2/models/miim_model.v
index 936d99a80..936d99a80 100644
--- a/models/miim_model.v
+++ b/usrp2/models/miim_model.v
diff --git a/models/phy_sim.v b/usrp2/models/phy_sim.v
index b3de19b04..b3de19b04 100644
--- a/models/phy_sim.v
+++ b/usrp2/models/phy_sim.v
diff --git a/models/serdes_model.v b/usrp2/models/serdes_model.v
index f10e55554..f10e55554 100644
--- a/models/serdes_model.v
+++ b/usrp2/models/serdes_model.v
diff --git a/models/uart_rx.v b/usrp2/models/uart_rx.v
index f698a50fe..f698a50fe 100644
--- a/models/uart_rx.v
+++ b/usrp2/models/uart_rx.v
diff --git a/models/xlnx_glbl.v b/usrp2/models/xlnx_glbl.v
index 662a60e35..662a60e35 100644
--- a/models/xlnx_glbl.v
+++ b/usrp2/models/xlnx_glbl.v
diff --git a/opencores/8b10b/.gitignore b/usrp2/opencores/8b10b/.gitignore
index 548539d61..548539d61 100644
--- a/opencores/8b10b/.gitignore
+++ b/usrp2/opencores/8b10b/.gitignore
diff --git a/opencores/8b10b/8b10b_a.mem b/usrp2/opencores/8b10b/8b10b_a.mem
index 1761d74f6..1761d74f6 100644
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index e69de29bb..e69de29bb 100644
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diff --git a/opencores/i2c/software/include/oc_i2c_master.h b/usrp2/opencores/i2c/software/include/oc_i2c_master.h
index 7f7cfc417..7f7cfc417 100644
--- a/opencores/i2c/software/include/oc_i2c_master.h
+++ b/usrp2/opencores/i2c/software/include/oc_i2c_master.h
diff --git a/opencores/i2c/verilog/CVS/Entries b/usrp2/opencores/i2c/verilog/CVS/Entries
index 178481050..178481050 100644
--- a/opencores/i2c/verilog/CVS/Entries
+++ b/usrp2/opencores/i2c/verilog/CVS/Entries
diff --git a/opencores/i2c/verilog/CVS/Repository b/usrp2/opencores/i2c/verilog/CVS/Repository
index acc23265f..acc23265f 100644
--- a/opencores/i2c/verilog/CVS/Repository
+++ b/usrp2/opencores/i2c/verilog/CVS/Repository
diff --git a/opencores/i2c/verilog/CVS/Root b/usrp2/opencores/i2c/verilog/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/i2c/verilog/CVS/Root
+++ b/usrp2/opencores/i2c/verilog/CVS/Root
diff --git a/opencores/i2c/verilog/CVS/Template b/usrp2/opencores/i2c/verilog/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/i2c/verilog/CVS/Template
+++ b/usrp2/opencores/i2c/verilog/CVS/Template
diff --git a/opencores/i2c/vhdl/CVS/Entries b/usrp2/opencores/i2c/vhdl/CVS/Entries
index 178481050..178481050 100644
--- a/opencores/i2c/vhdl/CVS/Entries
+++ b/usrp2/opencores/i2c/vhdl/CVS/Entries
diff --git a/opencores/i2c/vhdl/CVS/Repository b/usrp2/opencores/i2c/vhdl/CVS/Repository
index 8ee00a788..8ee00a788 100644
--- a/opencores/i2c/vhdl/CVS/Repository
+++ b/usrp2/opencores/i2c/vhdl/CVS/Repository
diff --git a/opencores/i2c/vhdl/CVS/Root b/usrp2/opencores/i2c/vhdl/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/i2c/vhdl/CVS/Root
+++ b/usrp2/opencores/i2c/vhdl/CVS/Root
diff --git a/opencores/i2c/vhdl/CVS/Template b/usrp2/opencores/i2c/vhdl/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/i2c/vhdl/CVS/Template
+++ b/usrp2/opencores/i2c/vhdl/CVS/Template
diff --git a/opencores/simple_gpio/CVS/Entries b/usrp2/opencores/simple_gpio/CVS/Entries
index df1462bb9..df1462bb9 100644
--- a/opencores/simple_gpio/CVS/Entries
+++ b/usrp2/opencores/simple_gpio/CVS/Entries
diff --git a/opencores/simple_gpio/CVS/Repository b/usrp2/opencores/simple_gpio/CVS/Repository
index b869a0de8..b869a0de8 100644
--- a/opencores/simple_gpio/CVS/Repository
+++ b/usrp2/opencores/simple_gpio/CVS/Repository
diff --git a/opencores/simple_gpio/CVS/Root b/usrp2/opencores/simple_gpio/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/simple_gpio/CVS/Root
+++ b/usrp2/opencores/simple_gpio/CVS/Root
diff --git a/opencores/simple_gpio/CVS/Template b/usrp2/opencores/simple_gpio/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/simple_gpio/CVS/Template
+++ b/usrp2/opencores/simple_gpio/CVS/Template
diff --git a/opencores/simple_gpio/rtl/CVS/Entries b/usrp2/opencores/simple_gpio/rtl/CVS/Entries
index 8c6258130..8c6258130 100644
--- a/opencores/simple_gpio/rtl/CVS/Entries
+++ b/usrp2/opencores/simple_gpio/rtl/CVS/Entries
diff --git a/opencores/simple_gpio/rtl/CVS/Repository b/usrp2/opencores/simple_gpio/rtl/CVS/Repository
index 955303d8a..955303d8a 100644
--- a/opencores/simple_gpio/rtl/CVS/Repository
+++ b/usrp2/opencores/simple_gpio/rtl/CVS/Repository
diff --git a/opencores/simple_gpio/rtl/CVS/Root b/usrp2/opencores/simple_gpio/rtl/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/simple_gpio/rtl/CVS/Root
+++ b/usrp2/opencores/simple_gpio/rtl/CVS/Root
diff --git a/opencores/simple_gpio/rtl/CVS/Template b/usrp2/opencores/simple_gpio/rtl/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/simple_gpio/rtl/CVS/Template
+++ b/usrp2/opencores/simple_gpio/rtl/CVS/Template
diff --git a/opencores/simple_gpio/rtl/simple_gpio.v b/usrp2/opencores/simple_gpio/rtl/simple_gpio.v
index 0b78f9921..0b78f9921 100644
--- a/opencores/simple_gpio/rtl/simple_gpio.v
+++ b/usrp2/opencores/simple_gpio/rtl/simple_gpio.v
diff --git a/opencores/simple_pic/CVS/Entries b/usrp2/opencores/simple_pic/CVS/Entries
index df1462bb9..df1462bb9 100644
--- a/opencores/simple_pic/CVS/Entries
+++ b/usrp2/opencores/simple_pic/CVS/Entries
diff --git a/opencores/simple_pic/CVS/Repository b/usrp2/opencores/simple_pic/CVS/Repository
index 73de5bf2b..73de5bf2b 100644
--- a/opencores/simple_pic/CVS/Repository
+++ b/usrp2/opencores/simple_pic/CVS/Repository
diff --git a/opencores/simple_pic/CVS/Root b/usrp2/opencores/simple_pic/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/simple_pic/CVS/Root
+++ b/usrp2/opencores/simple_pic/CVS/Root
diff --git a/opencores/simple_pic/CVS/Template b/usrp2/opencores/simple_pic/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/simple_pic/CVS/Template
+++ b/usrp2/opencores/simple_pic/CVS/Template
diff --git a/opencores/simple_pic/rtl/CVS/Entries b/usrp2/opencores/simple_pic/rtl/CVS/Entries
index e5e641097..e5e641097 100644
--- a/opencores/simple_pic/rtl/CVS/Entries
+++ b/usrp2/opencores/simple_pic/rtl/CVS/Entries
diff --git a/opencores/simple_pic/rtl/CVS/Repository b/usrp2/opencores/simple_pic/rtl/CVS/Repository
index 2639a29e2..2639a29e2 100644
--- a/opencores/simple_pic/rtl/CVS/Repository
+++ b/usrp2/opencores/simple_pic/rtl/CVS/Repository
diff --git a/opencores/simple_pic/rtl/CVS/Root b/usrp2/opencores/simple_pic/rtl/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/simple_pic/rtl/CVS/Root
+++ b/usrp2/opencores/simple_pic/rtl/CVS/Root
diff --git a/opencores/simple_pic/rtl/CVS/Template b/usrp2/opencores/simple_pic/rtl/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/simple_pic/rtl/CVS/Template
+++ b/usrp2/opencores/simple_pic/rtl/CVS/Template
diff --git a/opencores/simple_pic/rtl/simple_pic.v b/usrp2/opencores/simple_pic/rtl/simple_pic.v
index 28184cbe2..28184cbe2 100644
--- a/opencores/simple_pic/rtl/simple_pic.v
+++ b/usrp2/opencores/simple_pic/rtl/simple_pic.v
diff --git a/opencores/spi/CVS/Entries b/usrp2/opencores/spi/CVS/Entries
index 62011c465..62011c465 100644
--- a/opencores/spi/CVS/Entries
+++ b/usrp2/opencores/spi/CVS/Entries
diff --git a/opencores/spi/CVS/Repository b/usrp2/opencores/spi/CVS/Repository
index c928c4b77..c928c4b77 100644
--- a/opencores/spi/CVS/Repository
+++ b/usrp2/opencores/spi/CVS/Repository
diff --git a/opencores/spi/CVS/Root b/usrp2/opencores/spi/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi/CVS/Root
+++ b/usrp2/opencores/spi/CVS/Root
diff --git a/opencores/spi/CVS/Template b/usrp2/opencores/spi/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi/CVS/Template
+++ b/usrp2/opencores/spi/CVS/Template
diff --git a/opencores/spi/bench/CVS/Entries b/usrp2/opencores/spi/bench/CVS/Entries
index 428c5622d..428c5622d 100644
--- a/opencores/spi/bench/CVS/Entries
+++ b/usrp2/opencores/spi/bench/CVS/Entries
diff --git a/opencores/spi/bench/CVS/Repository b/usrp2/opencores/spi/bench/CVS/Repository
index f45728d0f..f45728d0f 100644
--- a/opencores/spi/bench/CVS/Repository
+++ b/usrp2/opencores/spi/bench/CVS/Repository
diff --git a/opencores/spi/bench/CVS/Root b/usrp2/opencores/spi/bench/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi/bench/CVS/Root
+++ b/usrp2/opencores/spi/bench/CVS/Root
diff --git a/opencores/spi/bench/CVS/Template b/usrp2/opencores/spi/bench/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi/bench/CVS/Template
+++ b/usrp2/opencores/spi/bench/CVS/Template
diff --git a/opencores/spi/bench/verilog/CVS/Entries b/usrp2/opencores/spi/bench/verilog/CVS/Entries
index 68404f871..68404f871 100644
--- a/opencores/spi/bench/verilog/CVS/Entries
+++ b/usrp2/opencores/spi/bench/verilog/CVS/Entries
diff --git a/opencores/spi/bench/verilog/CVS/Repository b/usrp2/opencores/spi/bench/verilog/CVS/Repository
index 78a3c4a9f..78a3c4a9f 100644
--- a/opencores/spi/bench/verilog/CVS/Repository
+++ b/usrp2/opencores/spi/bench/verilog/CVS/Repository
diff --git a/opencores/spi/bench/verilog/CVS/Root b/usrp2/opencores/spi/bench/verilog/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi/bench/verilog/CVS/Root
+++ b/usrp2/opencores/spi/bench/verilog/CVS/Root
diff --git a/opencores/spi/bench/verilog/CVS/Template b/usrp2/opencores/spi/bench/verilog/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi/bench/verilog/CVS/Template
+++ b/usrp2/opencores/spi/bench/verilog/CVS/Template
diff --git a/opencores/spi/bench/verilog/spi_slave_model.v b/usrp2/opencores/spi/bench/verilog/spi_slave_model.v
index dfdaed929..dfdaed929 100644
--- a/opencores/spi/bench/verilog/spi_slave_model.v
+++ b/usrp2/opencores/spi/bench/verilog/spi_slave_model.v
diff --git a/opencores/spi/bench/verilog/tb_spi_top.v b/usrp2/opencores/spi/bench/verilog/tb_spi_top.v
index 529c0aca1..529c0aca1 100644
--- a/opencores/spi/bench/verilog/tb_spi_top.v
+++ b/usrp2/opencores/spi/bench/verilog/tb_spi_top.v
diff --git a/opencores/spi/bench/verilog/wb_master_model.v b/usrp2/opencores/spi/bench/verilog/wb_master_model.v
index 3f8b7ee6a..3f8b7ee6a 100644
--- a/opencores/spi/bench/verilog/wb_master_model.v
+++ b/usrp2/opencores/spi/bench/verilog/wb_master_model.v
diff --git a/opencores/spi/doc/CVS/Entries b/usrp2/opencores/spi/doc/CVS/Entries
index ff33fa590..ff33fa590 100644
--- a/opencores/spi/doc/CVS/Entries
+++ b/usrp2/opencores/spi/doc/CVS/Entries
diff --git a/opencores/spi/doc/CVS/Repository b/usrp2/opencores/spi/doc/CVS/Repository
index 772adcef5..772adcef5 100644
--- a/opencores/spi/doc/CVS/Repository
+++ b/usrp2/opencores/spi/doc/CVS/Repository
diff --git a/opencores/spi/doc/CVS/Root b/usrp2/opencores/spi/doc/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi/doc/CVS/Root
+++ b/usrp2/opencores/spi/doc/CVS/Root
diff --git a/opencores/spi/doc/CVS/Template b/usrp2/opencores/spi/doc/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi/doc/CVS/Template
+++ b/usrp2/opencores/spi/doc/CVS/Template
diff --git a/opencores/spi/doc/spi.pdf b/usrp2/opencores/spi/doc/spi.pdf
index d88ee2807..d88ee2807 100644
--- a/opencores/spi/doc/spi.pdf
+++ b/usrp2/opencores/spi/doc/spi.pdf
Binary files differ
diff --git a/opencores/spi/doc/src/CVS/Entries b/usrp2/opencores/spi/doc/src/CVS/Entries
index adcbf083d..adcbf083d 100644
--- a/opencores/spi/doc/src/CVS/Entries
+++ b/usrp2/opencores/spi/doc/src/CVS/Entries
diff --git a/opencores/spi/doc/src/CVS/Repository b/usrp2/opencores/spi/doc/src/CVS/Repository
index 09b1f4a98..09b1f4a98 100644
--- a/opencores/spi/doc/src/CVS/Repository
+++ b/usrp2/opencores/spi/doc/src/CVS/Repository
diff --git a/opencores/spi/doc/src/CVS/Root b/usrp2/opencores/spi/doc/src/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi/doc/src/CVS/Root
+++ b/usrp2/opencores/spi/doc/src/CVS/Root
diff --git a/opencores/spi/doc/src/CVS/Template b/usrp2/opencores/spi/doc/src/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi/doc/src/CVS/Template
+++ b/usrp2/opencores/spi/doc/src/CVS/Template
diff --git a/opencores/spi/doc/src/spi.doc b/usrp2/opencores/spi/doc/src/spi.doc
index b04700177..b04700177 100755
--- a/opencores/spi/doc/src/spi.doc
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Binary files differ
diff --git a/opencores/spi/rtl/CVS/Entries b/usrp2/opencores/spi/rtl/CVS/Entries
index 428c5622d..428c5622d 100644
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+++ b/usrp2/opencores/spi/rtl/CVS/Entries
diff --git a/opencores/spi/rtl/CVS/Repository b/usrp2/opencores/spi/rtl/CVS/Repository
index 5fd79b19b..5fd79b19b 100644
--- a/opencores/spi/rtl/CVS/Repository
+++ b/usrp2/opencores/spi/rtl/CVS/Repository
diff --git a/opencores/spi/rtl/CVS/Root b/usrp2/opencores/spi/rtl/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi/rtl/CVS/Root
+++ b/usrp2/opencores/spi/rtl/CVS/Root
diff --git a/opencores/spi/rtl/CVS/Template b/usrp2/opencores/spi/rtl/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi/rtl/CVS/Template
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diff --git a/opencores/spi/rtl/verilog/CVS/Entries b/usrp2/opencores/spi/rtl/verilog/CVS/Entries
index d125a1657..d125a1657 100644
--- a/opencores/spi/rtl/verilog/CVS/Entries
+++ b/usrp2/opencores/spi/rtl/verilog/CVS/Entries
diff --git a/opencores/spi/rtl/verilog/CVS/Repository b/usrp2/opencores/spi/rtl/verilog/CVS/Repository
index 361b93bf8..361b93bf8 100644
--- a/opencores/spi/rtl/verilog/CVS/Repository
+++ b/usrp2/opencores/spi/rtl/verilog/CVS/Repository
diff --git a/opencores/spi/rtl/verilog/CVS/Root b/usrp2/opencores/spi/rtl/verilog/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi/rtl/verilog/CVS/Root
+++ b/usrp2/opencores/spi/rtl/verilog/CVS/Root
diff --git a/opencores/spi/rtl/verilog/CVS/Template b/usrp2/opencores/spi/rtl/verilog/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi/rtl/verilog/CVS/Template
+++ b/usrp2/opencores/spi/rtl/verilog/CVS/Template
diff --git a/opencores/spi/rtl/verilog/spi_clgen.v b/usrp2/opencores/spi/rtl/verilog/spi_clgen.v
index 7bc4f6e5e..7bc4f6e5e 100644
--- a/opencores/spi/rtl/verilog/spi_clgen.v
+++ b/usrp2/opencores/spi/rtl/verilog/spi_clgen.v
diff --git a/opencores/spi/rtl/verilog/spi_defines.v b/usrp2/opencores/spi/rtl/verilog/spi_defines.v
index a6925918e..a6925918e 100644
--- a/opencores/spi/rtl/verilog/spi_defines.v
+++ b/usrp2/opencores/spi/rtl/verilog/spi_defines.v
diff --git a/opencores/spi/rtl/verilog/spi_shift.v b/usrp2/opencores/spi/rtl/verilog/spi_shift.v
index b17ac8b1f..b17ac8b1f 100644
--- a/opencores/spi/rtl/verilog/spi_shift.v
+++ b/usrp2/opencores/spi/rtl/verilog/spi_shift.v
diff --git a/opencores/spi/rtl/verilog/spi_top.v b/usrp2/opencores/spi/rtl/verilog/spi_top.v
index 09b2e50e1..09b2e50e1 100644
--- a/opencores/spi/rtl/verilog/spi_top.v
+++ b/usrp2/opencores/spi/rtl/verilog/spi_top.v
diff --git a/opencores/spi/rtl/verilog/timescale.v b/usrp2/opencores/spi/rtl/verilog/timescale.v
index 60d4ecbd1..60d4ecbd1 100644
--- a/opencores/spi/rtl/verilog/timescale.v
+++ b/usrp2/opencores/spi/rtl/verilog/timescale.v
diff --git a/opencores/spi/sim/CVS/Entries b/usrp2/opencores/spi/sim/CVS/Entries
index 545533337..545533337 100644
--- a/opencores/spi/sim/CVS/Entries
+++ b/usrp2/opencores/spi/sim/CVS/Entries
diff --git a/opencores/spi/sim/CVS/Repository b/usrp2/opencores/spi/sim/CVS/Repository
index 9ec769309..9ec769309 100644
--- a/opencores/spi/sim/CVS/Repository
+++ b/usrp2/opencores/spi/sim/CVS/Repository
diff --git a/opencores/spi/sim/CVS/Root b/usrp2/opencores/spi/sim/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi/sim/CVS/Root
+++ b/usrp2/opencores/spi/sim/CVS/Root
diff --git a/opencores/spi/sim/CVS/Template b/usrp2/opencores/spi/sim/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi/sim/CVS/Template
+++ b/usrp2/opencores/spi/sim/CVS/Template
diff --git a/opencores/spi/sim/rtl_sim/CVS/Entries b/usrp2/opencores/spi/sim/rtl_sim/CVS/Entries
index 8ab9f73a7..8ab9f73a7 100644
--- a/opencores/spi/sim/rtl_sim/CVS/Entries
+++ b/usrp2/opencores/spi/sim/rtl_sim/CVS/Entries
diff --git a/opencores/spi/sim/rtl_sim/CVS/Repository b/usrp2/opencores/spi/sim/rtl_sim/CVS/Repository
index c8c6a94c6..c8c6a94c6 100644
--- a/opencores/spi/sim/rtl_sim/CVS/Repository
+++ b/usrp2/opencores/spi/sim/rtl_sim/CVS/Repository
diff --git a/opencores/spi/sim/rtl_sim/CVS/Root b/usrp2/opencores/spi/sim/rtl_sim/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi/sim/rtl_sim/CVS/Root
+++ b/usrp2/opencores/spi/sim/rtl_sim/CVS/Root
diff --git a/opencores/spi/sim/rtl_sim/CVS/Template b/usrp2/opencores/spi/sim/rtl_sim/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi/sim/rtl_sim/CVS/Template
+++ b/usrp2/opencores/spi/sim/rtl_sim/CVS/Template
diff --git a/opencores/spi/sim/rtl_sim/run/CVS/Entries b/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Entries
index 8947f64a0..8947f64a0 100644
--- a/opencores/spi/sim/rtl_sim/run/CVS/Entries
+++ b/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Entries
diff --git a/opencores/spi/sim/rtl_sim/run/CVS/Repository b/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Repository
index 5200bb196..5200bb196 100644
--- a/opencores/spi/sim/rtl_sim/run/CVS/Repository
+++ b/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Repository
diff --git a/opencores/spi/sim/rtl_sim/run/CVS/Root b/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi/sim/rtl_sim/run/CVS/Root
+++ b/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Root
diff --git a/opencores/spi/sim/rtl_sim/run/CVS/Template b/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi/sim/rtl_sim/run/CVS/Template
+++ b/usrp2/opencores/spi/sim/rtl_sim/run/CVS/Template
diff --git a/opencores/spi/sim/rtl_sim/run/rtl.fl b/usrp2/opencores/spi/sim/rtl_sim/run/rtl.fl
index d84a0840d..d84a0840d 100644
--- a/opencores/spi/sim/rtl_sim/run/rtl.fl
+++ b/usrp2/opencores/spi/sim/rtl_sim/run/rtl.fl
diff --git a/opencores/spi/sim/rtl_sim/run/run_sim b/usrp2/opencores/spi/sim/rtl_sim/run/run_sim
index 1b13a35b9..1b13a35b9 100755
--- a/opencores/spi/sim/rtl_sim/run/run_sim
+++ b/usrp2/opencores/spi/sim/rtl_sim/run/run_sim
diff --git a/opencores/spi/sim/rtl_sim/run/sim.fl b/usrp2/opencores/spi/sim/rtl_sim/run/sim.fl
index 283aad1f8..283aad1f8 100644
--- a/opencores/spi/sim/rtl_sim/run/sim.fl
+++ b/usrp2/opencores/spi/sim/rtl_sim/run/sim.fl
diff --git a/opencores/spi/sim/run/CVS/Entries b/usrp2/opencores/spi/sim/run/CVS/Entries
index 178481050..178481050 100644
--- a/opencores/spi/sim/run/CVS/Entries
+++ b/usrp2/opencores/spi/sim/run/CVS/Entries
diff --git a/opencores/spi/sim/run/CVS/Repository b/usrp2/opencores/spi/sim/run/CVS/Repository
index e8646e70d..e8646e70d 100644
--- a/opencores/spi/sim/run/CVS/Repository
+++ b/usrp2/opencores/spi/sim/run/CVS/Repository
diff --git a/opencores/spi/sim/run/CVS/Root b/usrp2/opencores/spi/sim/run/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi/sim/run/CVS/Root
+++ b/usrp2/opencores/spi/sim/run/CVS/Root
diff --git a/opencores/spi/sim/run/CVS/Template b/usrp2/opencores/spi/sim/run/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi/sim/run/CVS/Template
+++ b/usrp2/opencores/spi/sim/run/CVS/Template
diff --git a/opencores/spi_boot/COMPILE_LIST b/usrp2/opencores/spi_boot/COMPILE_LIST
index fc8f7d418..fc8f7d418 100644
--- a/opencores/spi_boot/COMPILE_LIST
+++ b/usrp2/opencores/spi_boot/COMPILE_LIST
diff --git a/opencores/spi_boot/COPYING b/usrp2/opencores/spi_boot/COPYING
index 60549be51..60549be51 100644
--- a/opencores/spi_boot/COPYING
+++ b/usrp2/opencores/spi_boot/COPYING
diff --git a/opencores/spi_boot/CVS/Entries b/usrp2/opencores/spi_boot/CVS/Entries
index d339433f3..d339433f3 100644
--- a/opencores/spi_boot/CVS/Entries
+++ b/usrp2/opencores/spi_boot/CVS/Entries
diff --git a/opencores/spi_boot/CVS/Repository b/usrp2/opencores/spi_boot/CVS/Repository
index 6aa579d49..6aa579d49 100644
--- a/opencores/spi_boot/CVS/Repository
+++ b/usrp2/opencores/spi_boot/CVS/Repository
diff --git a/opencores/spi_boot/CVS/Root b/usrp2/opencores/spi_boot/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi_boot/CVS/Root
+++ b/usrp2/opencores/spi_boot/CVS/Root
diff --git a/opencores/spi_boot/CVS/Template b/usrp2/opencores/spi_boot/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi_boot/CVS/Template
+++ b/usrp2/opencores/spi_boot/CVS/Template
diff --git a/opencores/spi_boot/KNOWN_BUGS b/usrp2/opencores/spi_boot/KNOWN_BUGS
index 298e4ba2e..298e4ba2e 100644
--- a/opencores/spi_boot/KNOWN_BUGS
+++ b/usrp2/opencores/spi_boot/KNOWN_BUGS
diff --git a/opencores/spi_boot/README b/usrp2/opencores/spi_boot/README
index 926b35bff..926b35bff 100644
--- a/opencores/spi_boot/README
+++ b/usrp2/opencores/spi_boot/README
diff --git a/opencores/spi_boot/bench/CVS/Entries b/usrp2/opencores/spi_boot/bench/CVS/Entries
index a4756ee6f..a4756ee6f 100644
--- a/opencores/spi_boot/bench/CVS/Entries
+++ b/usrp2/opencores/spi_boot/bench/CVS/Entries
diff --git a/opencores/spi_boot/bench/CVS/Repository b/usrp2/opencores/spi_boot/bench/CVS/Repository
index ac45542a6..ac45542a6 100644
--- a/opencores/spi_boot/bench/CVS/Repository
+++ b/usrp2/opencores/spi_boot/bench/CVS/Repository
diff --git a/opencores/spi_boot/bench/CVS/Root b/usrp2/opencores/spi_boot/bench/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi_boot/bench/CVS/Root
+++ b/usrp2/opencores/spi_boot/bench/CVS/Root
diff --git a/opencores/spi_boot/bench/CVS/Template b/usrp2/opencores/spi_boot/bench/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi_boot/bench/CVS/Template
+++ b/usrp2/opencores/spi_boot/bench/CVS/Template
diff --git a/opencores/spi_boot/bench/vhdl/CVS/Entries b/usrp2/opencores/spi_boot/bench/vhdl/CVS/Entries
index 8649c9f90..8649c9f90 100644
--- a/opencores/spi_boot/bench/vhdl/CVS/Entries
+++ b/usrp2/opencores/spi_boot/bench/vhdl/CVS/Entries
diff --git a/opencores/spi_boot/bench/vhdl/CVS/Repository b/usrp2/opencores/spi_boot/bench/vhdl/CVS/Repository
index ce62c2b8e..ce62c2b8e 100644
--- a/opencores/spi_boot/bench/vhdl/CVS/Repository
+++ b/usrp2/opencores/spi_boot/bench/vhdl/CVS/Repository
diff --git a/opencores/spi_boot/bench/vhdl/CVS/Root b/usrp2/opencores/spi_boot/bench/vhdl/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi_boot/bench/vhdl/CVS/Root
+++ b/usrp2/opencores/spi_boot/bench/vhdl/CVS/Root
diff --git a/opencores/spi_boot/bench/vhdl/CVS/Template b/usrp2/opencores/spi_boot/bench/vhdl/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi_boot/bench/vhdl/CVS/Template
+++ b/usrp2/opencores/spi_boot/bench/vhdl/CVS/Template
diff --git a/opencores/spi_boot/bench/vhdl/card-c.vhd b/usrp2/opencores/spi_boot/bench/vhdl/card-c.vhd
index 797eb1c90..797eb1c90 100644
--- a/opencores/spi_boot/bench/vhdl/card-c.vhd
+++ b/usrp2/opencores/spi_boot/bench/vhdl/card-c.vhd
diff --git a/opencores/spi_boot/bench/vhdl/card.vhd b/usrp2/opencores/spi_boot/bench/vhdl/card.vhd
index dcd676095..dcd676095 100644
--- a/opencores/spi_boot/bench/vhdl/card.vhd
+++ b/usrp2/opencores/spi_boot/bench/vhdl/card.vhd
diff --git a/opencores/spi_boot/bench/vhdl/tb-c.vhd b/usrp2/opencores/spi_boot/bench/vhdl/tb-c.vhd
index caa171362..caa171362 100644
--- a/opencores/spi_boot/bench/vhdl/tb-c.vhd
+++ b/usrp2/opencores/spi_boot/bench/vhdl/tb-c.vhd
diff --git a/opencores/spi_boot/bench/vhdl/tb.vhd b/usrp2/opencores/spi_boot/bench/vhdl/tb.vhd
index b359fa7c5..b359fa7c5 100644
--- a/opencores/spi_boot/bench/vhdl/tb.vhd
+++ b/usrp2/opencores/spi_boot/bench/vhdl/tb.vhd
diff --git a/opencores/spi_boot/bench/vhdl/tb_elem-full-c.vhd b/usrp2/opencores/spi_boot/bench/vhdl/tb_elem-full-c.vhd
index 3c0fb902f..3c0fb902f 100644
--- a/opencores/spi_boot/bench/vhdl/tb_elem-full-c.vhd
+++ b/usrp2/opencores/spi_boot/bench/vhdl/tb_elem-full-c.vhd
diff --git a/opencores/spi_boot/bench/vhdl/tb_elem-minimal-c.vhd b/usrp2/opencores/spi_boot/bench/vhdl/tb_elem-minimal-c.vhd
index 1c33ac3d0..1c33ac3d0 100644
--- a/opencores/spi_boot/bench/vhdl/tb_elem-minimal-c.vhd
+++ b/usrp2/opencores/spi_boot/bench/vhdl/tb_elem-minimal-c.vhd
diff --git a/opencores/spi_boot/bench/vhdl/tb_elem-mmc-c.vhd b/usrp2/opencores/spi_boot/bench/vhdl/tb_elem-mmc-c.vhd
index b5baf604e..b5baf604e 100644
--- a/opencores/spi_boot/bench/vhdl/tb_elem-mmc-c.vhd
+++ b/usrp2/opencores/spi_boot/bench/vhdl/tb_elem-mmc-c.vhd
diff --git a/opencores/spi_boot/bench/vhdl/tb_elem-sd-c.vhd b/usrp2/opencores/spi_boot/bench/vhdl/tb_elem-sd-c.vhd
index 9cdf3eaa1..9cdf3eaa1 100644
--- a/opencores/spi_boot/bench/vhdl/tb_elem-sd-c.vhd
+++ b/usrp2/opencores/spi_boot/bench/vhdl/tb_elem-sd-c.vhd
diff --git a/opencores/spi_boot/bench/vhdl/tb_elem.vhd b/usrp2/opencores/spi_boot/bench/vhdl/tb_elem.vhd
index 689cec037..689cec037 100644
--- a/opencores/spi_boot/bench/vhdl/tb_elem.vhd
+++ b/usrp2/opencores/spi_boot/bench/vhdl/tb_elem.vhd
diff --git a/opencores/spi_boot/bench/vhdl/tb_pack-p.vhd b/usrp2/opencores/spi_boot/bench/vhdl/tb_pack-p.vhd
index 7534aafdc..7534aafdc 100644
--- a/opencores/spi_boot/bench/vhdl/tb_pack-p.vhd
+++ b/usrp2/opencores/spi_boot/bench/vhdl/tb_pack-p.vhd
diff --git a/opencores/spi_boot/bench/vhdl/tb_rl-c.vhd b/usrp2/opencores/spi_boot/bench/vhdl/tb_rl-c.vhd
index 84273abc5..84273abc5 100644
--- a/opencores/spi_boot/bench/vhdl/tb_rl-c.vhd
+++ b/usrp2/opencores/spi_boot/bench/vhdl/tb_rl-c.vhd
diff --git a/opencores/spi_boot/bench/vhdl/tb_rl.vhd b/usrp2/opencores/spi_boot/bench/vhdl/tb_rl.vhd
index 9f28e62b4..9f28e62b4 100644
--- a/opencores/spi_boot/bench/vhdl/tb_rl.vhd
+++ b/usrp2/opencores/spi_boot/bench/vhdl/tb_rl.vhd
diff --git a/opencores/spi_boot/doc/CVS/Entries b/usrp2/opencores/spi_boot/doc/CVS/Entries
index 630615f41..630615f41 100644
--- a/opencores/spi_boot/doc/CVS/Entries
+++ b/usrp2/opencores/spi_boot/doc/CVS/Entries
diff --git a/opencores/spi_boot/doc/CVS/Repository b/usrp2/opencores/spi_boot/doc/CVS/Repository
index 07fb78846..07fb78846 100644
--- a/opencores/spi_boot/doc/CVS/Repository
+++ b/usrp2/opencores/spi_boot/doc/CVS/Repository
diff --git a/opencores/spi_boot/doc/CVS/Root b/usrp2/opencores/spi_boot/doc/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi_boot/doc/CVS/Root
+++ b/usrp2/opencores/spi_boot/doc/CVS/Root
diff --git a/opencores/spi_boot/doc/CVS/Template b/usrp2/opencores/spi_boot/doc/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi_boot/doc/CVS/Template
+++ b/usrp2/opencores/spi_boot/doc/CVS/Template
diff --git a/opencores/spi_boot/doc/spi_boot.pdf b/usrp2/opencores/spi_boot/doc/spi_boot.pdf
index a889c3f22..a889c3f22 100644
--- a/opencores/spi_boot/doc/spi_boot.pdf
+++ b/usrp2/opencores/spi_boot/doc/spi_boot.pdf
Binary files differ
diff --git a/opencores/spi_boot/doc/spi_boot_schematic.pdf b/usrp2/opencores/spi_boot/doc/spi_boot_schematic.pdf
index 92755d5f3..92755d5f3 100644
--- a/opencores/spi_boot/doc/spi_boot_schematic.pdf
+++ b/usrp2/opencores/spi_boot/doc/spi_boot_schematic.pdf
Binary files differ
diff --git a/opencores/spi_boot/doc/src/CVS/Entries b/usrp2/opencores/spi_boot/doc/src/CVS/Entries
index b2d32af23..b2d32af23 100644
--- a/opencores/spi_boot/doc/src/CVS/Entries
+++ b/usrp2/opencores/spi_boot/doc/src/CVS/Entries
diff --git a/opencores/spi_boot/doc/src/CVS/Repository b/usrp2/opencores/spi_boot/doc/src/CVS/Repository
index 5f8aafef8..5f8aafef8 100644
--- a/opencores/spi_boot/doc/src/CVS/Repository
+++ b/usrp2/opencores/spi_boot/doc/src/CVS/Repository
diff --git a/opencores/spi_boot/doc/src/CVS/Root b/usrp2/opencores/spi_boot/doc/src/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi_boot/doc/src/CVS/Root
+++ b/usrp2/opencores/spi_boot/doc/src/CVS/Root
diff --git a/opencores/spi_boot/doc/src/CVS/Template b/usrp2/opencores/spi_boot/doc/src/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi_boot/doc/src/CVS/Template
+++ b/usrp2/opencores/spi_boot/doc/src/CVS/Template
diff --git a/opencores/spi_boot/doc/src/architecture.eps b/usrp2/opencores/spi_boot/doc/src/architecture.eps
index 3e70efdb1..3e70efdb1 100644
--- a/opencores/spi_boot/doc/src/architecture.eps
+++ b/usrp2/opencores/spi_boot/doc/src/architecture.eps
diff --git a/opencores/spi_boot/doc/src/architecture.fig b/usrp2/opencores/spi_boot/doc/src/architecture.fig
index 708e166a8..708e166a8 100644
--- a/opencores/spi_boot/doc/src/architecture.fig
+++ b/usrp2/opencores/spi_boot/doc/src/architecture.fig
diff --git a/opencores/spi_boot/doc/src/initialization.eps b/usrp2/opencores/spi_boot/doc/src/initialization.eps
index ff4ec89e9..ff4ec89e9 100644
--- a/opencores/spi_boot/doc/src/initialization.eps
+++ b/usrp2/opencores/spi_boot/doc/src/initialization.eps
diff --git a/opencores/spi_boot/doc/src/initialization.fig b/usrp2/opencores/spi_boot/doc/src/initialization.fig
index 96ec5f506..96ec5f506 100644
--- a/opencores/spi_boot/doc/src/initialization.fig
+++ b/usrp2/opencores/spi_boot/doc/src/initialization.fig
diff --git a/opencores/spi_boot/doc/src/memory_organization.eps b/usrp2/opencores/spi_boot/doc/src/memory_organization.eps
index 7f48f591d..7f48f591d 100644
--- a/opencores/spi_boot/doc/src/memory_organization.eps
+++ b/usrp2/opencores/spi_boot/doc/src/memory_organization.eps
diff --git a/opencores/spi_boot/doc/src/memory_organization.fig b/usrp2/opencores/spi_boot/doc/src/memory_organization.fig
index e9413110e..e9413110e 100644
--- a/opencores/spi_boot/doc/src/memory_organization.fig
+++ b/usrp2/opencores/spi_boot/doc/src/memory_organization.fig
diff --git a/opencores/spi_boot/doc/src/spi_boot.sxw b/usrp2/opencores/spi_boot/doc/src/spi_boot.sxw
index 634cda5c8..634cda5c8 100644
--- a/opencores/spi_boot/doc/src/spi_boot.sxw
+++ b/usrp2/opencores/spi_boot/doc/src/spi_boot.sxw
Binary files differ
diff --git a/opencores/spi_boot/doc/src/transfer.eps b/usrp2/opencores/spi_boot/doc/src/transfer.eps
index b28abc024..b28abc024 100644
--- a/opencores/spi_boot/doc/src/transfer.eps
+++ b/usrp2/opencores/spi_boot/doc/src/transfer.eps
diff --git a/opencores/spi_boot/doc/src/transfer.fig b/usrp2/opencores/spi_boot/doc/src/transfer.fig
index 3d1724050..3d1724050 100644
--- a/opencores/spi_boot/doc/src/transfer.fig
+++ b/usrp2/opencores/spi_boot/doc/src/transfer.fig
diff --git a/opencores/spi_boot/rtl/CVS/Entries b/usrp2/opencores/spi_boot/rtl/CVS/Entries
index a4756ee6f..a4756ee6f 100644
--- a/opencores/spi_boot/rtl/CVS/Entries
+++ b/usrp2/opencores/spi_boot/rtl/CVS/Entries
diff --git a/opencores/spi_boot/rtl/CVS/Repository b/usrp2/opencores/spi_boot/rtl/CVS/Repository
index dcb0a69bc..dcb0a69bc 100644
--- a/opencores/spi_boot/rtl/CVS/Repository
+++ b/usrp2/opencores/spi_boot/rtl/CVS/Repository
diff --git a/opencores/spi_boot/rtl/CVS/Root b/usrp2/opencores/spi_boot/rtl/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi_boot/rtl/CVS/Root
+++ b/usrp2/opencores/spi_boot/rtl/CVS/Root
diff --git a/opencores/spi_boot/rtl/CVS/Template b/usrp2/opencores/spi_boot/rtl/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi_boot/rtl/CVS/Template
+++ b/usrp2/opencores/spi_boot/rtl/CVS/Template
diff --git a/opencores/spi_boot/rtl/vhdl/CVS/Entries b/usrp2/opencores/spi_boot/rtl/vhdl/CVS/Entries
index 880f353ca..880f353ca 100644
--- a/opencores/spi_boot/rtl/vhdl/CVS/Entries
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/CVS/Entries
diff --git a/opencores/spi_boot/rtl/vhdl/CVS/Repository b/usrp2/opencores/spi_boot/rtl/vhdl/CVS/Repository
index a09f391ea..a09f391ea 100644
--- a/opencores/spi_boot/rtl/vhdl/CVS/Repository
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/CVS/Repository
diff --git a/opencores/spi_boot/rtl/vhdl/CVS/Root b/usrp2/opencores/spi_boot/rtl/vhdl/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi_boot/rtl/vhdl/CVS/Root
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/CVS/Root
diff --git a/opencores/spi_boot/rtl/vhdl/CVS/Template b/usrp2/opencores/spi_boot/rtl/vhdl/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi_boot/rtl/vhdl/CVS/Template
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/CVS/Template
diff --git a/opencores/spi_boot/rtl/vhdl/chip-e.vhd b/usrp2/opencores/spi_boot/rtl/vhdl/chip-e.vhd
index 0bdd05aff..0bdd05aff 100644
--- a/opencores/spi_boot/rtl/vhdl/chip-e.vhd
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/chip-e.vhd
diff --git a/opencores/spi_boot/rtl/vhdl/chip-full-a.vhd b/usrp2/opencores/spi_boot/rtl/vhdl/chip-full-a.vhd
index e43ecb3c4..e43ecb3c4 100644
--- a/opencores/spi_boot/rtl/vhdl/chip-full-a.vhd
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/chip-full-a.vhd
diff --git a/opencores/spi_boot/rtl/vhdl/chip-full-c.vhd b/usrp2/opencores/spi_boot/rtl/vhdl/chip-full-c.vhd
index da88552c4..da88552c4 100644
--- a/opencores/spi_boot/rtl/vhdl/chip-full-c.vhd
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/chip-full-c.vhd
diff --git a/opencores/spi_boot/rtl/vhdl/chip-minimal-a.vhd b/usrp2/opencores/spi_boot/rtl/vhdl/chip-minimal-a.vhd
index 090d0b79c..090d0b79c 100644
--- a/opencores/spi_boot/rtl/vhdl/chip-minimal-a.vhd
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/chip-minimal-a.vhd
diff --git a/opencores/spi_boot/rtl/vhdl/chip-minimal-c.vhd b/usrp2/opencores/spi_boot/rtl/vhdl/chip-minimal-c.vhd
index 5547747b2..5547747b2 100644
--- a/opencores/spi_boot/rtl/vhdl/chip-minimal-c.vhd
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/chip-minimal-c.vhd
diff --git a/opencores/spi_boot/rtl/vhdl/chip-mmc-a.vhd b/usrp2/opencores/spi_boot/rtl/vhdl/chip-mmc-a.vhd
index cef42d268..cef42d268 100644
--- a/opencores/spi_boot/rtl/vhdl/chip-mmc-a.vhd
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/chip-mmc-a.vhd
diff --git a/opencores/spi_boot/rtl/vhdl/chip-mmc-c.vhd b/usrp2/opencores/spi_boot/rtl/vhdl/chip-mmc-c.vhd
index 6131013e4..6131013e4 100644
--- a/opencores/spi_boot/rtl/vhdl/chip-mmc-c.vhd
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/chip-mmc-c.vhd
diff --git a/opencores/spi_boot/rtl/vhdl/chip-sd-a.vhd b/usrp2/opencores/spi_boot/rtl/vhdl/chip-sd-a.vhd
index c955a5f3a..c955a5f3a 100644
--- a/opencores/spi_boot/rtl/vhdl/chip-sd-a.vhd
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/chip-sd-a.vhd
diff --git a/opencores/spi_boot/rtl/vhdl/chip-sd-c.vhd b/usrp2/opencores/spi_boot/rtl/vhdl/chip-sd-c.vhd
index 91e41ddfb..91e41ddfb 100644
--- a/opencores/spi_boot/rtl/vhdl/chip-sd-c.vhd
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/chip-sd-c.vhd
diff --git a/opencores/spi_boot/rtl/vhdl/sample/CVS/Entries b/usrp2/opencores/spi_boot/rtl/vhdl/sample/CVS/Entries
index 552a7baad..552a7baad 100644
--- a/opencores/spi_boot/rtl/vhdl/sample/CVS/Entries
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/sample/CVS/Entries
diff --git a/opencores/spi_boot/rtl/vhdl/sample/CVS/Repository b/usrp2/opencores/spi_boot/rtl/vhdl/sample/CVS/Repository
index 026a73983..026a73983 100644
--- a/opencores/spi_boot/rtl/vhdl/sample/CVS/Repository
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/sample/CVS/Repository
diff --git a/opencores/spi_boot/rtl/vhdl/sample/CVS/Root b/usrp2/opencores/spi_boot/rtl/vhdl/sample/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi_boot/rtl/vhdl/sample/CVS/Root
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/sample/CVS/Root
diff --git a/opencores/spi_boot/rtl/vhdl/sample/CVS/Template b/usrp2/opencores/spi_boot/rtl/vhdl/sample/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi_boot/rtl/vhdl/sample/CVS/Template
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/sample/CVS/Template
diff --git a/opencores/spi_boot/rtl/vhdl/sample/ram_loader-c.vhd b/usrp2/opencores/spi_boot/rtl/vhdl/sample/ram_loader-c.vhd
index 8b26c4d57..8b26c4d57 100644
--- a/opencores/spi_boot/rtl/vhdl/sample/ram_loader-c.vhd
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/sample/ram_loader-c.vhd
diff --git a/opencores/spi_boot/rtl/vhdl/sample/ram_loader.vhd b/usrp2/opencores/spi_boot/rtl/vhdl/sample/ram_loader.vhd
index c604876d7..c604876d7 100644
--- a/opencores/spi_boot/rtl/vhdl/sample/ram_loader.vhd
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/sample/ram_loader.vhd
diff --git a/opencores/spi_boot/rtl/vhdl/spi_boot-c.vhd b/usrp2/opencores/spi_boot/rtl/vhdl/spi_boot-c.vhd
index 6f11ed34b..6f11ed34b 100644
--- a/opencores/spi_boot/rtl/vhdl/spi_boot-c.vhd
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/spi_boot-c.vhd
diff --git a/opencores/spi_boot/rtl/vhdl/spi_boot.vhd b/usrp2/opencores/spi_boot/rtl/vhdl/spi_boot.vhd
index 3d2b81da7..3d2b81da7 100644
--- a/opencores/spi_boot/rtl/vhdl/spi_boot.vhd
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/spi_boot.vhd
diff --git a/opencores/spi_boot/rtl/vhdl/spi_boot_pack-p.vhd b/usrp2/opencores/spi_boot/rtl/vhdl/spi_boot_pack-p.vhd
index ac8b544f9..ac8b544f9 100644
--- a/opencores/spi_boot/rtl/vhdl/spi_boot_pack-p.vhd
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/spi_boot_pack-p.vhd
diff --git a/opencores/spi_boot/rtl/vhdl/spi_counter-c.vhd b/usrp2/opencores/spi_boot/rtl/vhdl/spi_counter-c.vhd
index d81e20db6..d81e20db6 100644
--- a/opencores/spi_boot/rtl/vhdl/spi_counter-c.vhd
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/spi_counter-c.vhd
diff --git a/opencores/spi_boot/rtl/vhdl/spi_counter.vhd b/usrp2/opencores/spi_boot/rtl/vhdl/spi_counter.vhd
index 8ec7357ea..8ec7357ea 100644
--- a/opencores/spi_boot/rtl/vhdl/spi_counter.vhd
+++ b/usrp2/opencores/spi_boot/rtl/vhdl/spi_counter.vhd
diff --git a/opencores/spi_boot/sim/CVS/Entries b/usrp2/opencores/spi_boot/sim/CVS/Entries
index 9487498ad..9487498ad 100644
--- a/opencores/spi_boot/sim/CVS/Entries
+++ b/usrp2/opencores/spi_boot/sim/CVS/Entries
diff --git a/opencores/spi_boot/sim/CVS/Repository b/usrp2/opencores/spi_boot/sim/CVS/Repository
index 4e2e09740..4e2e09740 100644
--- a/opencores/spi_boot/sim/CVS/Repository
+++ b/usrp2/opencores/spi_boot/sim/CVS/Repository
diff --git a/opencores/spi_boot/sim/CVS/Root b/usrp2/opencores/spi_boot/sim/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi_boot/sim/CVS/Root
+++ b/usrp2/opencores/spi_boot/sim/CVS/Root
diff --git a/opencores/spi_boot/sim/CVS/Template b/usrp2/opencores/spi_boot/sim/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi_boot/sim/CVS/Template
+++ b/usrp2/opencores/spi_boot/sim/CVS/Template
diff --git a/opencores/spi_boot/sim/rtl_sim/CVS/Entries b/usrp2/opencores/spi_boot/sim/rtl_sim/CVS/Entries
index e3d0dc145..e3d0dc145 100644
--- a/opencores/spi_boot/sim/rtl_sim/CVS/Entries
+++ b/usrp2/opencores/spi_boot/sim/rtl_sim/CVS/Entries
diff --git a/opencores/spi_boot/sim/rtl_sim/CVS/Repository b/usrp2/opencores/spi_boot/sim/rtl_sim/CVS/Repository
index 114ab862f..114ab862f 100644
--- a/opencores/spi_boot/sim/rtl_sim/CVS/Repository
+++ b/usrp2/opencores/spi_boot/sim/rtl_sim/CVS/Repository
diff --git a/opencores/spi_boot/sim/rtl_sim/CVS/Root b/usrp2/opencores/spi_boot/sim/rtl_sim/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi_boot/sim/rtl_sim/CVS/Root
+++ b/usrp2/opencores/spi_boot/sim/rtl_sim/CVS/Root
diff --git a/opencores/spi_boot/sim/rtl_sim/CVS/Template b/usrp2/opencores/spi_boot/sim/rtl_sim/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi_boot/sim/rtl_sim/CVS/Template
+++ b/usrp2/opencores/spi_boot/sim/rtl_sim/CVS/Template
diff --git a/opencores/spi_boot/sim/rtl_sim/Makefile b/usrp2/opencores/spi_boot/sim/rtl_sim/Makefile
index 46fb3c635..46fb3c635 100644
--- a/opencores/spi_boot/sim/rtl_sim/Makefile
+++ b/usrp2/opencores/spi_boot/sim/rtl_sim/Makefile
diff --git a/opencores/spi_boot/sw/CVS/Entries b/usrp2/opencores/spi_boot/sw/CVS/Entries
index 0f2bd88d4..0f2bd88d4 100644
--- a/opencores/spi_boot/sw/CVS/Entries
+++ b/usrp2/opencores/spi_boot/sw/CVS/Entries
diff --git a/opencores/spi_boot/sw/CVS/Repository b/usrp2/opencores/spi_boot/sw/CVS/Repository
index 98d181ecb..98d181ecb 100644
--- a/opencores/spi_boot/sw/CVS/Repository
+++ b/usrp2/opencores/spi_boot/sw/CVS/Repository
diff --git a/opencores/spi_boot/sw/CVS/Root b/usrp2/opencores/spi_boot/sw/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi_boot/sw/CVS/Root
+++ b/usrp2/opencores/spi_boot/sw/CVS/Root
diff --git a/opencores/spi_boot/sw/CVS/Template b/usrp2/opencores/spi_boot/sw/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi_boot/sw/CVS/Template
+++ b/usrp2/opencores/spi_boot/sw/CVS/Template
diff --git a/opencores/spi_boot/sw/misc/CVS/Entries b/usrp2/opencores/spi_boot/sw/misc/CVS/Entries
index e46425fde..e46425fde 100644
--- a/opencores/spi_boot/sw/misc/CVS/Entries
+++ b/usrp2/opencores/spi_boot/sw/misc/CVS/Entries
diff --git a/opencores/spi_boot/sw/misc/CVS/Repository b/usrp2/opencores/spi_boot/sw/misc/CVS/Repository
index 0519f4b59..0519f4b59 100644
--- a/opencores/spi_boot/sw/misc/CVS/Repository
+++ b/usrp2/opencores/spi_boot/sw/misc/CVS/Repository
diff --git a/opencores/spi_boot/sw/misc/CVS/Root b/usrp2/opencores/spi_boot/sw/misc/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/spi_boot/sw/misc/CVS/Root
+++ b/usrp2/opencores/spi_boot/sw/misc/CVS/Root
diff --git a/opencores/spi_boot/sw/misc/CVS/Template b/usrp2/opencores/spi_boot/sw/misc/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/spi_boot/sw/misc/CVS/Template
+++ b/usrp2/opencores/spi_boot/sw/misc/CVS/Template
diff --git a/opencores/spi_boot/sw/misc/bit_reverse.c b/usrp2/opencores/spi_boot/sw/misc/bit_reverse.c
index 9defb106a..9defb106a 100644
--- a/opencores/spi_boot/sw/misc/bit_reverse.c
+++ b/usrp2/opencores/spi_boot/sw/misc/bit_reverse.c
diff --git a/opencores/wb_zbt/CVS/Entries b/usrp2/opencores/wb_zbt/CVS/Entries
index ef78b4f27..ef78b4f27 100644
--- a/opencores/wb_zbt/CVS/Entries
+++ b/usrp2/opencores/wb_zbt/CVS/Entries
diff --git a/opencores/wb_zbt/CVS/Repository b/usrp2/opencores/wb_zbt/CVS/Repository
index ca9c641d0..ca9c641d0 100644
--- a/opencores/wb_zbt/CVS/Repository
+++ b/usrp2/opencores/wb_zbt/CVS/Repository
diff --git a/opencores/wb_zbt/CVS/Root b/usrp2/opencores/wb_zbt/CVS/Root
index 44b2aa23b..44b2aa23b 100644
--- a/opencores/wb_zbt/CVS/Root
+++ b/usrp2/opencores/wb_zbt/CVS/Root
diff --git a/opencores/wb_zbt/CVS/Template b/usrp2/opencores/wb_zbt/CVS/Template
index e69de29bb..e69de29bb 100644
--- a/opencores/wb_zbt/CVS/Template
+++ b/usrp2/opencores/wb_zbt/CVS/Template
diff --git a/opencores/wb_zbt/wb_zbt.v b/usrp2/opencores/wb_zbt/wb_zbt.v
index 8f9232752..8f9232752 100644
--- a/opencores/wb_zbt/wb_zbt.v
+++ b/usrp2/opencores/wb_zbt/wb_zbt.v
diff --git a/sdr_lib/.gitignore b/usrp2/sdr_lib/.gitignore
index 3c782d589..3c782d589 100644
--- a/sdr_lib/.gitignore
+++ b/usrp2/sdr_lib/.gitignore
diff --git a/sdr_lib/HB.sav b/usrp2/sdr_lib/HB.sav
index c5087e8a6..c5087e8a6 100644
--- a/sdr_lib/HB.sav
+++ b/usrp2/sdr_lib/HB.sav
diff --git a/sdr_lib/SMALL_HB.sav b/usrp2/sdr_lib/SMALL_HB.sav
index 96ba00636..96ba00636 100644
--- a/sdr_lib/SMALL_HB.sav
+++ b/usrp2/sdr_lib/SMALL_HB.sav
diff --git a/sdr_lib/acc.v b/usrp2/sdr_lib/acc.v
index a2da9c86d..a2da9c86d 100644
--- a/sdr_lib/acc.v
+++ b/usrp2/sdr_lib/acc.v
diff --git a/sdr_lib/add2.v b/usrp2/sdr_lib/add2.v
index 13fff803e..13fff803e 100644
--- a/sdr_lib/add2.v
+++ b/usrp2/sdr_lib/add2.v
diff --git a/sdr_lib/add2_and_round.v b/usrp2/sdr_lib/add2_and_round.v
index 146af28da..146af28da 100644
--- a/sdr_lib/add2_and_round.v
+++ b/usrp2/sdr_lib/add2_and_round.v
diff --git a/sdr_lib/add2_and_round_reg.v b/usrp2/sdr_lib/add2_and_round_reg.v
index e7fcbf1a1..e7fcbf1a1 100644
--- a/sdr_lib/add2_and_round_reg.v
+++ b/usrp2/sdr_lib/add2_and_round_reg.v
diff --git a/sdr_lib/add2_reg.v b/usrp2/sdr_lib/add2_reg.v
index 456cf315b..456cf315b 100644
--- a/sdr_lib/add2_reg.v
+++ b/usrp2/sdr_lib/add2_reg.v
diff --git a/sdr_lib/cic_dec_shifter.v b/usrp2/sdr_lib/cic_dec_shifter.v
index aa5ac895b..aa5ac895b 100644
--- a/sdr_lib/cic_dec_shifter.v
+++ b/usrp2/sdr_lib/cic_dec_shifter.v
diff --git a/sdr_lib/cic_decim.v b/usrp2/sdr_lib/cic_decim.v
index 9a03081b0..9a03081b0 100755
--- a/sdr_lib/cic_decim.v
+++ b/usrp2/sdr_lib/cic_decim.v
diff --git a/sdr_lib/cic_int_shifter.v b/usrp2/sdr_lib/cic_int_shifter.v
index 18587fa8b..18587fa8b 100644
--- a/sdr_lib/cic_int_shifter.v
+++ b/usrp2/sdr_lib/cic_int_shifter.v
diff --git a/sdr_lib/cic_interp.v b/usrp2/sdr_lib/cic_interp.v
index 9b6928aa1..9b6928aa1 100755
--- a/sdr_lib/cic_interp.v
+++ b/usrp2/sdr_lib/cic_interp.v
diff --git a/sdr_lib/cic_strober.v b/usrp2/sdr_lib/cic_strober.v
index 40d76bdd9..40d76bdd9 100644
--- a/sdr_lib/cic_strober.v
+++ b/usrp2/sdr_lib/cic_strober.v
diff --git a/sdr_lib/clip.v b/usrp2/sdr_lib/clip.v
index 3e6b3a2e2..3e6b3a2e2 100644
--- a/sdr_lib/clip.v
+++ b/usrp2/sdr_lib/clip.v
diff --git a/sdr_lib/clip_and_round.v b/usrp2/sdr_lib/clip_and_round.v
index 4546283a3..4546283a3 100644
--- a/sdr_lib/clip_and_round.v
+++ b/usrp2/sdr_lib/clip_and_round.v
diff --git a/sdr_lib/clip_and_round_reg.v b/usrp2/sdr_lib/clip_and_round_reg.v
index 66fb155fb..66fb155fb 100644
--- a/sdr_lib/clip_and_round_reg.v
+++ b/usrp2/sdr_lib/clip_and_round_reg.v
diff --git a/sdr_lib/clip_reg.v b/usrp2/sdr_lib/clip_reg.v
index d5e98d982..d5e98d982 100644
--- a/sdr_lib/clip_reg.v
+++ b/usrp2/sdr_lib/clip_reg.v
diff --git a/sdr_lib/cordic.v b/usrp2/sdr_lib/cordic.v
index b73e7acf1..b73e7acf1 100755
--- a/sdr_lib/cordic.v
+++ b/usrp2/sdr_lib/cordic.v
diff --git a/sdr_lib/cordic_stage.v b/usrp2/sdr_lib/cordic_stage.v
index 641ff9108..641ff9108 100755
--- a/sdr_lib/cordic_stage.v
+++ b/usrp2/sdr_lib/cordic_stage.v
diff --git a/sdr_lib/cordic_z24.v b/usrp2/sdr_lib/cordic_z24.v
index cf668d5ec..cf668d5ec 100644
--- a/sdr_lib/cordic_z24.v
+++ b/usrp2/sdr_lib/cordic_z24.v
diff --git a/sdr_lib/ddc.v b/usrp2/sdr_lib/ddc.v
index 0d4da9bbc..0d4da9bbc 100755
--- a/sdr_lib/ddc.v
+++ b/usrp2/sdr_lib/ddc.v
diff --git a/sdr_lib/dsp_core_rx.v b/usrp2/sdr_lib/dsp_core_rx.v
index 2ac429630..2ac429630 100644
--- a/sdr_lib/dsp_core_rx.v
+++ b/usrp2/sdr_lib/dsp_core_rx.v
diff --git a/sdr_lib/dsp_core_tx.v b/usrp2/sdr_lib/dsp_core_tx.v
index 22d3d44a3..22d3d44a3 100644
--- a/sdr_lib/dsp_core_tx.v
+++ b/usrp2/sdr_lib/dsp_core_tx.v
diff --git a/sdr_lib/duc.v b/usrp2/sdr_lib/duc.v
index 6dac95b49..6dac95b49 100755
--- a/sdr_lib/duc.v
+++ b/usrp2/sdr_lib/duc.v
diff --git a/sdr_lib/dummy_rx.v b/usrp2/sdr_lib/dummy_rx.v
index 99290ecec..99290ecec 100644
--- a/sdr_lib/dummy_rx.v
+++ b/usrp2/sdr_lib/dummy_rx.v
diff --git a/sdr_lib/gen_cordic_consts.py b/usrp2/sdr_lib/gen_cordic_consts.py
index 261e8c223..261e8c223 100755
--- a/sdr_lib/gen_cordic_consts.py
+++ b/usrp2/sdr_lib/gen_cordic_consts.py
diff --git a/sdr_lib/halfband_ideal.v b/usrp2/sdr_lib/halfband_ideal.v
index 484cfff2a..484cfff2a 100644
--- a/sdr_lib/halfband_ideal.v
+++ b/usrp2/sdr_lib/halfband_ideal.v
diff --git a/sdr_lib/halfband_tb.v b/usrp2/sdr_lib/halfband_tb.v
index 231dd00d7..231dd00d7 100644
--- a/sdr_lib/halfband_tb.v
+++ b/usrp2/sdr_lib/halfband_tb.v
diff --git a/sdr_lib/hb/acc.v b/usrp2/sdr_lib/hb/acc.v
index 195d5ea94..195d5ea94 100644
--- a/sdr_lib/hb/acc.v
+++ b/usrp2/sdr_lib/hb/acc.v
diff --git a/sdr_lib/hb/coeff_ram.v b/usrp2/sdr_lib/hb/coeff_ram.v
index 65460822f..65460822f 100644
--- a/sdr_lib/hb/coeff_ram.v
+++ b/usrp2/sdr_lib/hb/coeff_ram.v
diff --git a/sdr_lib/hb/coeff_rom.v b/usrp2/sdr_lib/hb/coeff_rom.v
index 7f8886b4e..7f8886b4e 100644
--- a/sdr_lib/hb/coeff_rom.v
+++ b/usrp2/sdr_lib/hb/coeff_rom.v
diff --git a/sdr_lib/hb/halfband_decim.v b/usrp2/sdr_lib/hb/halfband_decim.v
index dff4d902c..dff4d902c 100644
--- a/sdr_lib/hb/halfband_decim.v
+++ b/usrp2/sdr_lib/hb/halfband_decim.v
diff --git a/sdr_lib/hb/halfband_interp.v b/usrp2/sdr_lib/hb/halfband_interp.v
index cdb11c1f6..cdb11c1f6 100644
--- a/sdr_lib/hb/halfband_interp.v
+++ b/usrp2/sdr_lib/hb/halfband_interp.v
diff --git a/sdr_lib/hb/hbd_tb/HBD b/usrp2/sdr_lib/hb/hbd_tb/HBD
index 574fbba91..574fbba91 100644
--- a/sdr_lib/hb/hbd_tb/HBD
+++ b/usrp2/sdr_lib/hb/hbd_tb/HBD
diff --git a/sdr_lib/hb/hbd_tb/really_golden b/usrp2/sdr_lib/hb/hbd_tb/really_golden
index 2d24a9e14..2d24a9e14 100644
--- a/sdr_lib/hb/hbd_tb/really_golden
+++ b/usrp2/sdr_lib/hb/hbd_tb/really_golden
diff --git a/sdr_lib/hb/hbd_tb/regression b/usrp2/sdr_lib/hb/hbd_tb/regression
index fc279c2f2..fc279c2f2 100644
--- a/sdr_lib/hb/hbd_tb/regression
+++ b/usrp2/sdr_lib/hb/hbd_tb/regression
diff --git a/sdr_lib/hb/hbd_tb/run_hbd b/usrp2/sdr_lib/hb/hbd_tb/run_hbd
index b8aec7574..b8aec7574 100755
--- a/sdr_lib/hb/hbd_tb/run_hbd
+++ b/usrp2/sdr_lib/hb/hbd_tb/run_hbd
diff --git a/sdr_lib/hb/hbd_tb/test_hbd.v b/usrp2/sdr_lib/hb/hbd_tb/test_hbd.v
index 01ab5e7e0..01ab5e7e0 100644
--- a/sdr_lib/hb/hbd_tb/test_hbd.v
+++ b/usrp2/sdr_lib/hb/hbd_tb/test_hbd.v
diff --git a/sdr_lib/hb/mac.v b/usrp2/sdr_lib/hb/mac.v
index 5a270bc73..5a270bc73 100644
--- a/sdr_lib/hb/mac.v
+++ b/usrp2/sdr_lib/hb/mac.v
diff --git a/sdr_lib/hb/mult.v b/usrp2/sdr_lib/hb/mult.v
index a8d4cb1b7..a8d4cb1b7 100644
--- a/sdr_lib/hb/mult.v
+++ b/usrp2/sdr_lib/hb/mult.v
diff --git a/sdr_lib/hb/ram16_2port.v b/usrp2/sdr_lib/hb/ram16_2port.v
index e1761a926..e1761a926 100644
--- a/sdr_lib/hb/ram16_2port.v
+++ b/usrp2/sdr_lib/hb/ram16_2port.v
diff --git a/sdr_lib/hb/ram16_2sum.v b/usrp2/sdr_lib/hb/ram16_2sum.v
index 559b06fd5..559b06fd5 100644
--- a/sdr_lib/hb/ram16_2sum.v
+++ b/usrp2/sdr_lib/hb/ram16_2sum.v
diff --git a/sdr_lib/hb/ram32_2sum.v b/usrp2/sdr_lib/hb/ram32_2sum.v
index d1f55b7d0..d1f55b7d0 100644
--- a/sdr_lib/hb/ram32_2sum.v
+++ b/usrp2/sdr_lib/hb/ram32_2sum.v
diff --git a/sdr_lib/hb_dec.v b/usrp2/sdr_lib/hb_dec.v
index 8fb5ba222..8fb5ba222 100644
--- a/sdr_lib/hb_dec.v
+++ b/usrp2/sdr_lib/hb_dec.v
diff --git a/sdr_lib/hb_dec_tb.v b/usrp2/sdr_lib/hb_dec_tb.v
index 3e5faa80a..3e5faa80a 100644
--- a/sdr_lib/hb_dec_tb.v
+++ b/usrp2/sdr_lib/hb_dec_tb.v
diff --git a/sdr_lib/hb_interp.v b/usrp2/sdr_lib/hb_interp.v
index d16807e15..d16807e15 100644
--- a/sdr_lib/hb_interp.v
+++ b/usrp2/sdr_lib/hb_interp.v
diff --git a/sdr_lib/hb_interp_tb.v b/usrp2/sdr_lib/hb_interp_tb.v
index 52f137f28..52f137f28 100644
--- a/sdr_lib/hb_interp_tb.v
+++ b/usrp2/sdr_lib/hb_interp_tb.v
diff --git a/sdr_lib/hb_tb.v b/usrp2/sdr_lib/hb_tb.v
index 7e960fd13..7e960fd13 100644
--- a/sdr_lib/hb_tb.v
+++ b/usrp2/sdr_lib/hb_tb.v
diff --git a/sdr_lib/input.dat b/usrp2/sdr_lib/input.dat
index 1e649ac2e..1e649ac2e 100644
--- a/sdr_lib/input.dat
+++ b/usrp2/sdr_lib/input.dat
diff --git a/sdr_lib/integrate.v b/usrp2/sdr_lib/integrate.v
index db33de979..db33de979 100644
--- a/sdr_lib/integrate.v
+++ b/usrp2/sdr_lib/integrate.v
diff --git a/sdr_lib/med_hb_int.v b/usrp2/sdr_lib/med_hb_int.v
index bc8066509..bc8066509 100644
--- a/sdr_lib/med_hb_int.v
+++ b/usrp2/sdr_lib/med_hb_int.v
diff --git a/sdr_lib/output.dat b/usrp2/sdr_lib/output.dat
index 15db3ced4..15db3ced4 100644
--- a/sdr_lib/output.dat
+++ b/usrp2/sdr_lib/output.dat
diff --git a/sdr_lib/round.v b/usrp2/sdr_lib/round.v
index c4f9ec9cd..c4f9ec9cd 100644
--- a/sdr_lib/round.v
+++ b/usrp2/sdr_lib/round.v
diff --git a/sdr_lib/round_reg.v b/usrp2/sdr_lib/round_reg.v
index aa0972dab..aa0972dab 100644
--- a/sdr_lib/round_reg.v
+++ b/usrp2/sdr_lib/round_reg.v
diff --git a/sdr_lib/rssi.v b/usrp2/sdr_lib/rssi.v
index e45e2148c..e45e2148c 100644
--- a/sdr_lib/rssi.v
+++ b/usrp2/sdr_lib/rssi.v
diff --git a/sdr_lib/rx_control.v b/usrp2/sdr_lib/rx_control.v
index 0adeb0794..0adeb0794 100644
--- a/sdr_lib/rx_control.v
+++ b/usrp2/sdr_lib/rx_control.v
diff --git a/sdr_lib/rx_dcoffset.v b/usrp2/sdr_lib/rx_dcoffset.v
index bedbd40e6..bedbd40e6 100644
--- a/sdr_lib/rx_dcoffset.v
+++ b/usrp2/sdr_lib/rx_dcoffset.v
diff --git a/sdr_lib/rx_dcoffset_tb.v b/usrp2/sdr_lib/rx_dcoffset_tb.v
index a8b4ec20f..a8b4ec20f 100644
--- a/sdr_lib/rx_dcoffset_tb.v
+++ b/usrp2/sdr_lib/rx_dcoffset_tb.v
diff --git a/sdr_lib/sign_extend.v b/usrp2/sdr_lib/sign_extend.v
index eae67faf2..eae67faf2 100644
--- a/sdr_lib/sign_extend.v
+++ b/usrp2/sdr_lib/sign_extend.v
diff --git a/sdr_lib/small_hb_dec.v b/usrp2/sdr_lib/small_hb_dec.v
index 8519b628a..8519b628a 100644
--- a/sdr_lib/small_hb_dec.v
+++ b/usrp2/sdr_lib/small_hb_dec.v
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--- a/top/u2_rev3_iad/dsp_core_tb.sav
+++ b/usrp2/top/u2_rev3_iad/dsp_core_tb.sav
diff --git a/top/u2_rev3_iad/dsp_core_tb.v b/usrp2/top/u2_rev3_iad/dsp_core_tb.v
index 4d5a5b537..4d5a5b537 100644
--- a/top/u2_rev3_iad/dsp_core_tb.v
+++ b/usrp2/top/u2_rev3_iad/dsp_core_tb.v
diff --git a/top/u2_rev3_iad/impulse.v b/usrp2/top/u2_rev3_iad/impulse.v
index 7f0cdc9be..7f0cdc9be 100644
--- a/top/u2_rev3_iad/impulse.v
+++ b/usrp2/top/u2_rev3_iad/impulse.v
diff --git a/top/u2_rev3_iad/wave.sh b/usrp2/top/u2_rev3_iad/wave.sh
index 626f224e5..626f224e5 100755
--- a/top/u2_rev3_iad/wave.sh
+++ b/usrp2/top/u2_rev3_iad/wave.sh
diff --git a/top/u2plus/u2plus.ucf b/usrp2/top/u2plus/u2plus.ucf
index 091eb2005..091eb2005 100755
--- a/top/u2plus/u2plus.ucf
+++ b/usrp2/top/u2plus/u2plus.ucf
diff --git a/top/u2plus/u2plus.v b/usrp2/top/u2plus/u2plus.v
index e95445867..e95445867 100644
--- a/top/u2plus/u2plus.v
+++ b/usrp2/top/u2plus/u2plus.v
diff --git a/udp/add_onescomp.v b/usrp2/udp/add_onescomp.v
index 048842a86..048842a86 100644
--- a/udp/add_onescomp.v
+++ b/usrp2/udp/add_onescomp.v
diff --git a/udp/fifo19_rxrealign.v b/usrp2/udp/fifo19_rxrealign.v
index 35ad90951..35ad90951 100644
--- a/udp/fifo19_rxrealign.v
+++ b/usrp2/udp/fifo19_rxrealign.v
diff --git a/udp/prot_eng_rx.v b/usrp2/udp/prot_eng_rx.v
index 5df158b2b..5df158b2b 100644
--- a/udp/prot_eng_rx.v
+++ b/usrp2/udp/prot_eng_rx.v
diff --git a/udp/prot_eng_tx.v b/usrp2/udp/prot_eng_tx.v
index 9031011f7..9031011f7 100644
--- a/udp/prot_eng_tx.v
+++ b/usrp2/udp/prot_eng_tx.v
diff --git a/udp/prot_eng_tx_tb.v b/usrp2/udp/prot_eng_tx_tb.v
index e7ffeb5e1..e7ffeb5e1 100644
--- a/udp/prot_eng_tx_tb.v
+++ b/usrp2/udp/prot_eng_tx_tb.v
diff --git a/udp/udp_wrapper.v b/usrp2/udp/udp_wrapper.v
index 6e8d19dfd..6e8d19dfd 100644
--- a/udp/udp_wrapper.v
+++ b/usrp2/udp/udp_wrapper.v
diff --git a/vrt/.gitignore b/usrp2/vrt/.gitignore
index 446b2daae..446b2daae 100644
--- a/vrt/.gitignore
+++ b/usrp2/vrt/.gitignore
diff --git a/vrt/vita_rx.build b/usrp2/vrt/vita_rx.build
index f6d2d75a3..f6d2d75a3 100755
--- a/vrt/vita_rx.build
+++ b/usrp2/vrt/vita_rx.build
diff --git a/vrt/vita_rx_control.v b/usrp2/vrt/vita_rx_control.v
index 2e96e6d42..2e96e6d42 100644
--- a/vrt/vita_rx_control.v
+++ b/usrp2/vrt/vita_rx_control.v
diff --git a/vrt/vita_rx_framer.v b/usrp2/vrt/vita_rx_framer.v
index d3ff98df7..d3ff98df7 100644
--- a/vrt/vita_rx_framer.v
+++ b/usrp2/vrt/vita_rx_framer.v
diff --git a/vrt/vita_rx_tb.v b/usrp2/vrt/vita_rx_tb.v
index b4fda9622..b4fda9622 100644
--- a/vrt/vita_rx_tb.v
+++ b/usrp2/vrt/vita_rx_tb.v
diff --git a/vrt/vita_tx.build b/usrp2/vrt/vita_tx.build
index 902929c08..902929c08 100755
--- a/vrt/vita_tx.build
+++ b/usrp2/vrt/vita_tx.build
diff --git a/vrt/vita_tx_control.v b/usrp2/vrt/vita_tx_control.v
index 6776e26e5..6776e26e5 100644
--- a/vrt/vita_tx_control.v
+++ b/usrp2/vrt/vita_tx_control.v
diff --git a/vrt/vita_tx_deframer.v b/usrp2/vrt/vita_tx_deframer.v
index 49428ead5..49428ead5 100644
--- a/vrt/vita_tx_deframer.v
+++ b/usrp2/vrt/vita_tx_deframer.v
diff --git a/vrt/vita_tx_tb.v b/usrp2/vrt/vita_tx_tb.v
index 90986a35f..90986a35f 100644
--- a/vrt/vita_tx_tb.v
+++ b/usrp2/vrt/vita_tx_tb.v