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-rw-r--r--usrp2/coregen/Makefile.srcs2
-rw-r--r--usrp2/coregen/coregen.cgp6
-rw-r--r--usrp2/coregen/fifo_xlnx_32x36_2clk.gise30
-rw-r--r--usrp2/coregen/fifo_xlnx_32x36_2clk.ncf0
-rw-r--r--usrp2/coregen/fifo_xlnx_32x36_2clk.ngc3
-rw-r--r--usrp2/coregen/fifo_xlnx_32x36_2clk.v3839
-rw-r--r--usrp2/coregen/fifo_xlnx_32x36_2clk.veo47
-rw-r--r--usrp2/coregen/fifo_xlnx_32x36_2clk.xco84
-rw-r--r--usrp2/coregen/fifo_xlnx_32x36_2clk.xise72
-rw-r--r--usrp2/coregen/fifo_xlnx_32x36_2clk_flist.txt12
-rw-r--r--usrp2/coregen/fifo_xlnx_32x36_2clk_readme.txt46
-rw-r--r--usrp2/coregen/fifo_xlnx_32x36_2clk_xmdf.tcl68
-rw-r--r--usrp2/extramfifo/ext_fifo.v115
-rwxr-xr-x[-rw-r--r--]usrp2/extramfifo/ext_fifo_tb.sh0
-rw-r--r--usrp2/extramfifo/ext_fifo_tb.v103
-rw-r--r--usrp2/extramfifo/nobl_fifo.v41
-rw-r--r--usrp2/top/u2plus/Makefile2
-rwxr-xr-xusrp2/top/u2plus/u2plus.ucf8
-rw-r--r--usrp2/top/u2plus/u2plus.v83
-rw-r--r--usrp2/top/u2plus/u2plus_core.v37
20 files changed, 4498 insertions, 100 deletions
diff --git a/usrp2/coregen/Makefile.srcs b/usrp2/coregen/Makefile.srcs
index a59696d15..f163877a9 100644
--- a/usrp2/coregen/Makefile.srcs
+++ b/usrp2/coregen/Makefile.srcs
@@ -16,6 +16,8 @@ fifo_xlnx_16x19_2clk.v \
fifo_xlnx_16x19_2clk.xco \
fifo_xlnx_16x40_2clk.v \
fifo_xlnx_16x40_2clk.xco \
+fifo_xlnx_32x36_2clk.v \
+fifo_xlnx_32x36_2clk.xco \
fifo_xlnx_512x36_2clk_36to18.v \
fifo_xlnx_512x36_2clk_36to18.xco \
fifo_xlnx_512x36_2clk_18to36.v \
diff --git a/usrp2/coregen/coregen.cgp b/usrp2/coregen/coregen.cgp
index 4c9201aff..dd85a7f50 100644
--- a/usrp2/coregen/coregen.cgp
+++ b/usrp2/coregen/coregen.cgp
@@ -1,4 +1,4 @@
-# Date: Mon Jul 26 21:55:33 2010
+# Date: Fri Oct 15 07:50:19 2010
SET addpads = false
SET asysymbol = false
@@ -13,10 +13,10 @@ SET foundationsym = false
SET implementationfiletype = Ngc
SET package = fg456
SET removerpms = false
-SET simulationfiles = Behavioral
+SET simulationfiles = Structural
SET speedgrade = -5
SET verilogsim = true
SET vhdlsim = false
SET workingdirectory = /tmp/
-# CRC: 394da717
+# CRC: 983b9b45
diff --git a/usrp2/coregen/fifo_xlnx_32x36_2clk.gise b/usrp2/coregen/fifo_xlnx_32x36_2clk.gise
new file mode 100644
index 000000000..70ee54054
--- /dev/null
+++ b/usrp2/coregen/fifo_xlnx_32x36_2clk.gise
@@ -0,0 +1,30 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<generated_project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">
+
+ <!-- -->
+
+ <!-- For tool use only. Do not edit. -->
+
+ <!-- -->
+
+ <!-- ProjectNavigator created generated project file. -->
+
+ <!-- For use in tracking generated file and other information -->
+
+ <!-- allowing preservation of process status. -->
+
+ <!-- -->
+
+ <!-- Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved. -->
+
+ <version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>
+
+ <sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="fifo_xlnx_32x36_2clk.xise"/>
+
+ <files xmlns="http://www.xilinx.com/XMLSchema">
+ <file xil_pn:fileType="FILE_VEO" xil_pn:name="fifo_xlnx_32x36_2clk.veo" xil_pn:origination="imported"/>
+ </files>
+
+ <transforms xmlns="http://www.xilinx.com/XMLSchema"/>
+
+</generated_project>
diff --git a/usrp2/coregen/fifo_xlnx_32x36_2clk.ncf b/usrp2/coregen/fifo_xlnx_32x36_2clk.ncf
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/usrp2/coregen/fifo_xlnx_32x36_2clk.ncf
diff --git a/usrp2/coregen/fifo_xlnx_32x36_2clk.ngc b/usrp2/coregen/fifo_xlnx_32x36_2clk.ngc
new file mode 100644
index 000000000..d1ed419a7
--- /dev/null
+++ b/usrp2/coregen/fifo_xlnx_32x36_2clk.ngc
@@ -0,0 +1,3 @@
+XILINX-XDB 0.1 STUB 0.1 ASCII
+XILINX-XDM V1.6e
+$56140<,[o}e~g`n;"2*726&;$9,)<>;.vnt*Ydo&lbjbQwloz\77~4>V8h`f agn3847=7081:?6?!039244=5<288?>?=;249MKVR\3nbb1=::1<20>512F__\XZ5dnww863=87n0?~<?01dd000*=81?86:?FG6811379l1>6D@_UU8svjaXmdzuRzgrdqk81<76;?097GAPTV9twi`Wlg{xtQ{hsgplZgt{lx094?>3781?OIX\^1|ah_dosp|Ys`{oxdR`jg`vf81<768n097GAPTV9twi`Wog`Rzgrdqk81<76;>097GAPTV9twi`Wog`Rzgrdqk[dutm{~787>12596>LHW]]0{~biPftno[qnumzbTbhintd>7>58602?1CXZ_UU8geqgXkfex1:50?3a?0<H]]Z^X7|k_ecweZeh}g~787>11c96>JSSX\^1{Qkauc\gjsi|5>1<3?46595=<053?K?7;ONA394B1=?:=;?75:=159;A=G630805=:491230>?780805;<4A108E44<I;80M><4A7;8EV_IKVXNK>5MU3:8FPUXAGLD=6M=;BG26>EOMJAT@DMJNRG\P\VB:2IB?6MCR89@KHKN\]OO=95LOSG\C@HBZH^BCCQFNGM4?FTBI]OO=6J=;EK0?AVH=2N[^L>:;ERQE43<LYXJ>85KPSC06>C3<2OHM=<4F308BA5<NMI?7KJLE29E@U2<NMZN=6I<;FLG5>O53@:97D?=;H01?L5>3@DBX^ZNTD18MKP53EC97AA9;MMB@@B03EELENOC4:NVP70<D\^9SA:4LTV02>JR\:UG86BZT548HPR3WE?0A^I@N49NQ]E^k2Gjfb|Yesqjkke<E`dd~[k}shmm6>H6<2D:<=:4N0220>H68;>0B<><4:L2412<F8:>86@>0768J460<2D:<5:4N02:7>H69=1E=<>;;O3251=I988?7C?>359M54233G;:995A1047?K76?=1E=<6;;O32=6=I9;>0B<<=3:L276=I9=>0B<:>3:L216=I9?90B<9<;O3;7>H61:1E>==4N330?K45;2D9?>5A2518J7343G8=?6@=729M6=5<F;387C=?3:L056=I;;90B>=<;O177>H4=:1E?;=4N250?K5?;2D85>5A4118J1743G>9?6@;329M015<F=?87C:93:L736=I<180B8<4N618J=443G28?6@7429M<05<F1<87C683:L;<6=I0080B4=4N820?K?6;2D2>>5A9218J<243G3>?6@6629M=25<F0287C76f:LA[GSTX@DT\_A_S69MAQQHZB;0C?5@K09S0>VFZ]k0\D@PBTQJ@]d<X@DTNX]AALG0?UTB92[37_OB17Z2@4=T>2YDY_MJ3:QSK1=SQYO8>6[?/fpe*w`(ojr%oaew/LzlvZtcWyd~Ril_ymq4567W[oxyaz>339V4*aun'xm#jmw.bnh|*Kg{UyhR~ats]dgZ~hz9:;=R\jstnw564<]9%l~k }f.e`|+ekcq%Ftb|Pre]sjqtXojUsc>?03]Qavsk|8997X> gsd-vc)`kq$h`fv Mymq[wbXxg~ySjmPxnp3455XZly~`y?<2:W3+bta&{l$knv!cmi{+H~hzV}yS}`{r^e`[}iu89:;S_k|umv277=R8&myj#|i/fa{*fjlp&GscQxr^rmpwY`kVrd~=>?1^Pfwpjs9:80Y=!hrg,qb*adp'iggu!Bxnp\swYwf}xTknQwos2347YUmzgx<==;T2,cw`)zo%lou lljz,I}iuW~xT|cz}_fa\|jt7899T^h}zlu315>S7'nxm"h gbz-gim'{nT|cz}_ckm858592_;#j|i.sd,cf~)keas#jPpovq[goi4849=6[?/fpe*w`(ojr%oaew/sf\tkruWkce0?0=1:W3+bta&{l$knv!cmi{+wbXxg~ySoga<2<15>S7'nxm"h gbz-gim'{nT|cz}_ckm818582_;#j|i.sd,cf~)keas#jPpovq[goiW98;7X> gsd-vc)`kq$h`fv re]sjqtXj`dT=?>4U1-dvc(un&mht#mcky-q`Zvi|{UiecQ=219V4*aun'xm#jmw.bnh|*tcWyd~Rlfn^114>S7'nxm"h gbz-gim'{nT|cz}_ckm[1413\:$kh!rg-dg}(ddbr$~iQnup\flhXpfx;<=>=7:W3+bta&{l$knv!cmi{+wbXxg~ySoga_ymq45679;<0Y=!hrg,qb*adp'iggu!}d^rmpwYeagUsc>?0004?P6(o{l%~k!hcy,`hn~(zmU{by|Pbhl\|jt789;:>;5Z0.eqb+ta'nis"nbdx.pg[uhszVhbbRv`r123671<]9%l~k }f.e`|+ekcq%yhR~ats]amkYg{:;<??=6:W3+bta&{l$knv!cmi{+wbXxg~ySoga_ymq4564:h1^<"i}f/pe+be&jf`t"|k_qlwvZdnfVrd~=>?3^QT476<]9%l~k }f.e`|+ekcq%yhR~ats]dg969:91^<"i}f/pe+be&jf`t"|k_qlwvZad4849<6[?/fpe*w`(ojr%oaew/sf\tkruWni7>3<?;T2,cw`)zo%lou lljz,vaYwf}xTkn2<>328Q5)`zo$yj"ilx/aoo})ulVzexQhc=6=5c=R8&myj#|i/fa{*fjlp&xoS}`{r^e`[57a3\:$kh!rg-dg}(ddbr$~iQnup\cfY69o1^<"i}f/pe+be&jf`t"|k_qlwvZadW;;m7X> gsd-vc)`kq$h`fv re]sjqtXojU8=k5Z0.eqb+ta'nis"nbdx.pg[uhszVmhS9<9;T2,cw`)zo%lou lljz,vaYwf}xTknQnssgd8585>2_;#j|i.sd,cf~)keas#jPpovq[beXizxnk1?1279V4*aun'xm#jmw.bnh|*tcWyd~Ril_`qqab:56;<0Y=!hrg,qb*adp'iggu!}d^rmpwY`kVkx~hi33?05?P6(o{l%~k!hcy,`hn~(zmU{by|Pgb]bwwc`4=4996[?/fpe*w`(ojr%oaew/sf\tkruWniTm~|jg^211>S7'nxm"h gbz-gim'{nT|cz}_fa\evtboV;996[?/fpe*w`(ojr%oaew/sf\tkruWniTm~|jg^011>S7'nxm"h gbz-gim'{nT|cz}_fa\evtboV9996[?/fpe*w`(ojr%oaew/sf\tkruWniTm~|jg^61=>S7'nxm"h gbz-gim'{nT|cz}_fa\evtboVn:0=0=9:W3+bta&{l$knv!cmi{+wbXxg~ySjmParpfcZb6484956[?/fpe*w`(ojr%oaew/sf\tkruWniTm~|jg^f2878512_;#j|i.sd,cf~)keas#jPpovq[beXizxnkRj><2<1=>S7'nxm"h gbz-gim'{nT|cz}_fa\evtboVn:090=8:W3+bta&{l$knv!cmi{+wbXxg~ySjmParpfcZb6W9837X> gsd-vc)`kq$h`fv re]sjqtXojUjkh_e3\57><]9%l~k }f.e`|+ekcq%yhR~ats]dgZgtzlmTh<Q=299V4*aun'xm#jmw.bnh|*tcWyd~Ril_`qqabYc9V9946[?/fpe*w`(ojr%oaew/sf\tkruWniTm~|jg^f2[1423\:$kh!rg-dg}(ddbr$~iQnup\cfYg{:;<=<:;T2,cw`)zo%lou lljz,vaYwf}xTknQwos2344423\:$kh!rg-dg}(ddbr$~iQnup\cfYg{:;<?<:;T2,cw`)zo%lou lljz,vaYwf}xTknQwos2346463\:$kh!rg-dg}(ddbr${Qnup\flh;878:7X> gsd-vc)`kq$h`fv ws]sjqtXj`d7=3<>;T2,cw`)zo%lou lljz,swYwf}xTnd`32?02?P6(o{l%~k!hcy,`hn~({U{by|Pbhl?7;463\:$kh!rg-dg}(ddbr${Qnup\flh;<78;7X> gsd-vc)`kq$h`fv ws]sjqtXj`dT<?>4U1-dvc(un&mht#mcky-tvZvi|{UiecQ>219V4*aun'xm#jmw.bnh|*quWyd~Rlfn^014>S7'nxm"h gbz-gim'~xT|cz}_ckm[6473\:$kh!rg-dg}(ddbr${Qnup\flhX<;<0Y=!hrg,qb*adp'iggu!xr^rmpwYeagUsc>?0104?P6(o{l%~k!hcy,`hn~({U{by|Pbhl\|jt789::>;5Z0.eqb+ta'nis"nbdx.uq[uhszVhbbRv`r123571<]9%l~k }f.e`|+ekcq%|~R~ats]amkYg{:;<<?=6:W3+bta&{l$knv!cmi{+rtXxg~ySoga_ymq4565:>1^<"i}f/pe+be&jf`t"y}_qlwvZdnfVrd~=>?2005?P6(o{l%~k!hcy,`hn~({U{by|Pbhl\|jt78999m6[?/fpe*w`(ojr%oaew/vp\tkruWkceSua}0120[VQ7:91^<"i}f/pe+be&jf`t"y}_qlwvZad4949<6[?/fpe*w`(ojr%oaew/vp\tkruWni7=3<?;T2,cw`)zo%lou lljz,swYwf}xTkn2=>328Q5)`zo$yj"ilx/aoo})pzVzexQhc=1=65=R8&myj#|i/fa{*fjlp&}yS}`{r^e`8186n2_;#j|i.sd,cf~)keas#z|Ppovq[beX88l0Y=!hrg,qb*adp'iggu!xr^rmpwY`kV;:j6[?/fpe*w`(ojr%oaew/vp\tkruWniT><h4U1-dvc(un&mht#mcky-tvZvi|{UloR=>f:W3+bta&{l$knv!cmi{+rtXxg~ySjmP4348Q5)`zo$yj"ilx/aoo})pzVzexQhc^cpv`a;878=7X> gsd-vc)`kq$h`fv ws]sjqtXojUjkh<0<12>S7'nxm"h gbz-gim'~xT|cz}_fa\evtbo585>;5Z0.eqb+ta'nis"nbdx.uq[uhszVmhSl}}ef>0:70<]9%l~k }f.e`|+ekcq%|~R~ats]dgZgtzlm783<:;T2,cw`)zo%lou lljz,swYwf}xTknQnssgd[5423\:$kh!rg-dg}(ddbr${Qnup\cfYf{{olS<<:;T2,cw`)zo%lou lljz,swYwf}xTknQnssgd[7423\:$kh!rg-dg}(ddbr${Qnup\cfYf{{olS><:;T2,cw`)zo%lou lljz,swYwf}xTknQnssgd[14>3\:$kh!rg-dg}(ddbr${Qnup\cfYf{{olSi?30?0:?P6(o{l%~k!hcy,`hn~({U{by|Pgb]bwwc`Wm;7=3<6;T2,cw`)zo%lou lljz,swYwf}xTknQnssgd[a7;:7827X> gsd-vc)`kq$h`fv ws]sjqtXojUjkh_e3?7;4>3\:$kh!rg-dg}(ddbr${Qnup\cfYf{{olSi?34?0;?P6(o{l%~k!hcy,`hn~({U{by|Pgb]bwwc`Wm;T<?64U1-dvc(un&mht#mcky-tvZvi|{UloRo|rde\`4Y6:11^<"i}f/pe+be&jf`t"y}_qlwvZadWhyyijQk1^01<>S7'nxm"h gbz-gim'~xT|cz}_fa\evtboVn:S><7;T2,cw`)zo%lou lljz,swYwf}xTknQnssgd[a7X<;?0Y=!hrg,qb*adp'iggu!xr^rmpwY`kVrd~=>?0378Q5)`zo$yj"ilx/aoo})pzVzexQhc^zlv5679;?0Y=!hrg,qb*adp'iggu!xr^rmpwY`kVrd~=>?2378Q5)`zo$yj"ilx/aoo})pzVzexQhc^zlv567;::0Y=!hrg,qb*ak8'xo#j|>.sdtbq)Je|rT^LCPRE]FJZ@PN]8:??5Z0.eqb+ta'nf;"j gs3-vcqa|&GfyuQ]AL]Q@ZCIWO]MX??P13d8Q5)`zo$yj"ic0/pg+bt6&{l|jy!Bmtz\VDKXZLMDYYQJN031`>S7'nxm"h gm2-va)`z8$yjzh{/bwqvZ`pn}Uxxlzj<1<1`>S7'nxm"h gm2-va)`z8$yjzh{/bwqvZ`pn}Uxxlzj<0<1g>S7'nxm"h gm2-va)`z8$yjzh{/bwqvZ`pn}Uxxlzj_10`?P6(o{l%~k!hl1,q`*au9'xm{kz ctpq[cqa|VymykP1278Q5)`zo$yj"ic0/pg+bt6&{l|jy!lusp\br`sWz~jxhQbuy2344:76:<0Y=!hrg,qb*ak8'xo#j|>.sdtbq)d}{xTjzh{_rvbp`Yj}q:;<<2?>016?P6(o{l%~k!hl1,q`*au9'xm{kz ctpq[cqa|VymykPmtz3457;979=7X> gsd-vc)`d9$yh"i}1/pescr(k|xySkyit^qweqcXe|r;<=?31?31<>S7'nxm"h gm2-va)`z8$yjzh{/dosp|Yao~Tjo<8;T2,cw`)zo%l`= }d.eq5+tao~$i`~{y^dtbqYn:o1^<"i}f/pe+bj7&{n$k?!rguep*cjx}sTjzh{_h]nq}67899;7X> gsd-vc)`d9$yh"i}1/pescr(mdzuRhxfu]j[hs89:;=?74U1-dvc(un&mg<#|k/fpbw+tt|z%ym`Qjmqvz[cdXa::0Y=!hrg,qb*ak8'xo#j|ns/pppv)uidUna}zv_g`\mZiu89:;?>5Z0.eqb+ta'nf;"j gscp*wus{&xjaRkbpu{\bgYnWfx;<=>>1410?P6(o{l%~k!hl1,q`*auiz$yy} r`o\ahvsqVliSdQ`r1234431;:1^<"i}f/pe+bj7&{n$ko|.sqww*tfeVof|ywPfc]j[jt789::95=<;T2,cw`)zo%l`= }d.eqev(u{}y$~lcPelrw}Z`eW`Ud~=>?00:077=R8&myj#|i/fn3*wb(o{kx"}{s.pbiZcjx}sTjoQf_np34565>:80Y=!hrg,qb*ak8'xo#j|ns/pppv)uidUna}zv_g`\mZiu89:;:?==;T2,cw`)zo%l`= }d.eqev(u{}y$~lcPelrw}Z`eW`Ud~=>?07117>S7'nxm"h gm2-va)uxg~y#@m`uov\gjsi|;>0Y=!hrg,qb*ak8'xo#~ats-Ngjsi|Vidycz>259V4*aun'xm#jb?.sf,vuhsz&Ghcx`{_bmvjq45<2_;#j|i.sd,ci6)zm%y|cz}/LalqkrXkfex><;;T2,cw`)zo%l`= }d.psjqt(Eje~byQlotlw064<]9%l~k }f.eo4+tc'{zex!BcnwmpZeh}g~Ttb|30?32[LHQW98h7X> gsd-vc)`d9$yh"|nup,Ifirf}Uhcx`{_ymq84869;i0Y=!hrg,qb*ak8'xo#~ats-Ngjsi|VidyczPxnp?6;76:m1^<"i}f/pe+bj7&{n$~}`{r.O`kphsWje~byQwos>0:476:j1^<"i}f/pe+bj7&{n$~}`{r.O`kphsWje~byQwos>0:445k2_;#j|i.sd,ci6)zm%y|cz}/LalqkrXkfexRv`r=6=547f3\:$kh!rg-dh5(ul&x{by| N032b>S7'nxm"h gm2-va)uxg~y#naznu>3:4`<]9%l~k }f.eo4+tc'{zex!lotlw8486n2_;#j|i.sd,ci6)zm%y|cz}/bmvjq:568l0Y=!hrg,qb*ak8'xo#~ats-`kphs4:4:j6[?/fpe*w`(oe:%~i!}povq+firf}6?2<k4U1-dvc(un&mg<#|k/srmpw)dg|dS=?j;T2,cw`)zo%l`= }d.psjqt(kfexR?>e:W3+bta&{l$ka>!re-qtkru'je~byQ=1d9V4*aun'xm#jb?.sf,vuhsz&idyczP30g8Q5)`zo$yj"ic0/pg+wvi|{%hcx`{_501?P6(o{l%~k!hl1,q`*twf}x$ob{at^f28585:2_;#j|i.sd,ci6)zm%y|cz}/bmvjqYc95;5>?5Z0.eqb+ta'nf;"j rqlwv*eh}g~Th<2=>308Q5)`zo$yj"ic0/pg+wvi|{%hcx`{_e3?7;453\:$kh!rg-dh5(ul&x{by| cnwmpZb64=49=6[?/fpe*w`(oe:%~i!}povq+firf}Uo=R>=1:W3+bta&{l$ka>!re-qtkru'je~byQk1^315>S7'nxm"h gm2-va)uxg~y#naznu]g5Z4592_;#j|i.sd,ci6)zm%y|cz}/bmvjqYc9V99=6[?/fpe*w`(oe:%~i!}povq+firf}Uo=R:=4:W3+bta&{l$ka>!re-qtkru'je~byQaou23445a3\:$kh!rg-dh5(pz&m|m~ hpg,tvu`(EhnoSigif^rmpwYwimUjhi>?01]`}969;o1^<"i}f/pe+bj7&~x$kzo|.fre*rtwn&GjhiQkigd\tkruWykoSljk0123[f;979m7X> gsd-vc)`d9$|~"ixar,dtc(pzyl$Aljk_ekebZvi|{U{miQnde2345Ydq585?k5Z0.eqb+ta'nf;"z| gvcp*bva&~x{j"Cnde]gmc`Xxg~yS}ok_`fg4567Wjs7?3=i;T2,cw`)zo%l`= xr.etev(`xo$|~}h M`fg[aoanVzexQae]b`a6789Uhu1:1419V4*aun'xm#jb?.vp,crgt&nzm"z|f.Ob`aYcaolT|cz}_qcg[dbc89:;Sa{{<0<74>S7'nxm"h gm2-sw)`hy%k}h!wsre+HgclVnbjkQnup\tdbXimn;<=>Pltv?6;273\:$kh!rg-dh5(pz&m|m~ hpg,tvu`(EhnoSigif^rmpwYwimUjhi>?01]oqq:46=:0Y=!hrg,qb*ak8'}y#jyns/esb+quxo%FmijPdhde[uhszVzjhRokd1234Zjr|5>58=5Z0.eqb+ta'nf;"z| gvcp*bva&~x{j"Cnde]gmc`Xxg~yS}ok_`fg4567We080;0:W3+bta&{l$ka>!ws-dsdu)oyl%{~i/Lcg`ZbnnoU{by|Pp`f\eab789:Ttb|34?63?P6(o{l%~k!hl1,tv*apiz$l|k xrqd,IdbcWmcmjR~ats]seaYflm:;<=Qwos>6:7`<]9%l~k }f.eo4+qu'n}j#if/uqtc)caolT|cz}_qcg8185n2_;#j|i.sd,ci6){%l{l}!gqd-swva'mcmjR~ats]sea:26;o0Y=!hrg,qb*ak8'}y#jyns/esb+quxo%oekhPpovq[ugcW=8n7X> gsd-vc)`d9$|~"ixar,dtc(pzyl$hdhi_qlwvZvflV?8;6[?/fpe*w`(oe:%{!hw`q-cu`){zm#igif^rmpwYwimUjhi>?01>7:61<]9%l~k }f.eo4+qu'n}j#if/uqtc)caolT|cz}_qcg[dbc89:;080=a:W3+bta&{l$ka>!ws-dsdu)oyl%{~i/qplcZ`rdeUb??5Z0.eqb+ta'nf;"z| gvcp*bva&~x{j"~}of]eqijXaVg~t=>?3218Q5)`zo$yj"ic0/uq+bqf{'m{j#y}pg-svjaXn|fgSdQbuy234674:2_;#j|i.sd,ci6){%l{l}!gqd-swva'yxdkRhzlm]j[kis89::>;5Z0.eqb+ta'nf;"z| gvcp*rus{&i9#iazt^k1270<]9%l~k }f.eo4+qu'n}j#y|tr-`6*bh}}Ub:?<9;T2,cw`)zo%l`= xr.etev(p{}y$o?!kotv\m2>582_;#j|i.sd,ci6){%l{l}!wrvp+fijx;8h7X> gsd-vc)`d9$|~"ixar,twqu(zhgTmac`su]eqijXa:>0Y=!hrg,qb*ak8'}y#jyns/uppv)uidUj``a|t^dvhiYnWds<=>?369V4*aun'xm#jb?.vp,crgt&~y"|nm^coijusWog`RgPmtz345668>9=7X> gsd-vc)`d9$|~"ixar,twqu(zhgTmac`su]eqijXaVg~t=>?03402>S7'nxm"h gm2-sw)`hy%{~z|/scn[djjgz~Tjxbc_h]nq}6789<<?;5Z0.eqb+ta'nf;"z| gvcp*rus{&xjaRocmnqw[cskdVcTaxv?0125=63<]9%l~k }f.eo4+qu'n}j#y|tr-qehYfddexxRhzlm]j[kis89::=?64U1-dvc(un&mg<#y}/fubw+qt|z%ym`Qiumn\bgYn:<1^<"i}f/pe+bj7&~x$kzo|.vqww*tfeVl~`aQf2e9V4*aun'xm#jb?.vp,crgt&~y"|nm^dvhiYnWds<=>?319V4*aun'xm#jb?.vp,crgt&~y"|nm^dvhiYnWds<=>?1171b>S7'nxm"h gm2-sw)`hy%{~z|/scn[cskdVcTaxv?012137`<]9%l~k }f.eo4+qu'n}j#y|tr-qehYa}efTeRczx1234355n2_;#j|i.sd,ci6){%l{l}!wrvp+wgjWog`RgPmtz3456018n0Y=!hrg,qb*ak8'}y#ob_vp\akYn98l0Y=!hrg,qb*ak8'}y#ob_vp\akYn9V;9?6[?/fpe*w`(oe:%{!xpovq+Heh}g~Tob{at368Q5)`zo$yj"ic0/uq+rvi|{%Fob{at^alqkr6:=1^<"i}f/pe+bj7&~x${}`{r.O`kphsWje~by<=4:W3+bta&{l$ka>!ws-ttkru'DidyczPcnwmp6433\:$kh!rg-dh5(pz&}{by| MbmvjqYdg|d8><4U1-dvc(un&mg<#y}/vrmpw)JkfexRm`uov\|jt;87;:SD@Y_10`?P6(o{l%~k!hl1,tv*qwf}x$Anaznu]`kphsWqey0<0>13a8Q5)`zo$yj"ic0/uq+rvi|{%Fob{at^alqkrXpfx7>3?>2e9V4*aun'xm#jb?.vp,suhsz&Ghcx`{_bmvjqYg{682<?>2b9V4*aun'xm#jb?.vp,suhsz&Ghcx`{_bmvjqYg{682<<=c:W3+bta&{l$ka>!ws-ttkru'DidyczPcnwmpZ~hz5>5=<?n;T2,cw`)zo%l`= xr.usjqt(F8;:j6[?/fpe*w`(oe:%{!xpovq+firf}6;2<h4U1-dvc(un&mg<#y}/vrmpw)dg|d0<0>f:W3+bta&{l$ka>!ws-ttkru'je~by2=>0d8Q5)`zo$yj"ic0/uq+rvi|{%hcx`{<2<2b>S7'nxm"h gm2-sw)pxg~y#naznu>7:4c<]9%l~k }f.eo4+qu'~zex!lotlw[57b3\:$kh!rg-dh5(pz&}{by| cnwmpZ76m2_;#j|i.sd,ci6){%||cz}/bmvjqY59l1^<"i}f/pe+bj7&~x${}`{r.alqkrX;8o0Y=!hrg,qb*ak8'}y#z~ats-`kphsW=897X> gsd-vc)`d9$|~"ynup,gjsi|Vn:0=0=2:W3+bta&{l$ka>!ws-ttkru'je~byQk1=3=67=R8&myj#|i/fn3*rt(yd~"m`uov\`4:56;80Y=!hrg,qb*ak8'}y#z~ats-`kphsWm;7?3<=;T2,cw`)zo%l`= xr.usjqt(kfexRj><5<15>S7'nxm"h gm2-sw)pxg~y#naznu]g5Z6592_;#j|i.sd,ci6){%||cz}/bmvjqYc9V;9=6[?/fpe*w`(oe:%{!xpovq+firf}Uo=R<=1:W3+bta&{l$ka>!ws-ttkru'je~byQk1^115>S7'nxm"h gm2-sw)pxg~y#naznu]g5Z25:2_;#j|i.sd,ci6){%||cz}/bmvjqYc:5:5>?5Z0.eqb+ta'nf;"z| wqlwv*eh}g~Th?2>>308Q5)`zo$yj"ic0/uq+rvi|{%hcx`{_e0?6;453\:$kh!rg-dh5(pz&}{by| cnwmpZb54:49>6[?/fpe*w`(oe:%{!xpovq+firf}Uo>1:1209V4*aun'xm#jb?.vp,suhsz&idyczPd3]364=R8&myj#|i/fn3*rt(yd~"m`uov\`7Y6:81^<"i}f/pe+bj7&~x${}`{r.alqkrXl;U9><5Z0.eqb+ta'nf;"z| wqlwv*eh}g~Th?Q<209V4*aun'xm#jb?.vp,suhsz&idyczPd3]767=R8&myj#|i/fn3*rt(yd~"m`uov\`6:76;80Y=!hrg,qb*ak8'}y#z~ats-`kphsWm97=3<=;T2,cw`)zo%l`= xr.usjqt(kfexRj<<3<16>S7'nxm"h gm2-sw)pxg~y#naznu]g7959:;1^<"i}f/pe+bj7&~x${}`{r.alqkrXl:6?2??4U1-dvc(un&mg<#y}/vrmpw)dg|dSi=P0338Q5)`zo$yj"ic0/uq+rvi|{%hcx`{_e1\577<]9%l~k }f.eo4+qu'~zex!lotlw[a5X:;;0Y=!hrg,qb*ak8'}y#z~ats-`kphsWm9T???4U1-dvc(un&mg<#y}/vrmpw)dg|dSi=P4368Q5)`zo$yj"ic0/uq+rvi|{%hcx`{_omw45669>1^<"i}f/pe+hcj'me~xRg30?3;?P6(o{l%~k!bel-gkprXa5;;2<64U1-dvc(un&gna"j`uu]j8479911^<"i}f/pe+hcj'me~xRg313<2<>S7'nxm"h mdo,`jssW`6:?3?7;T2,cw`)zo%fi`!kotv\m9736820Y=!hrg,qb*kbe&ndyyQf<07=5==R8&myj#|i/lgn+air|Vc7=;0>8:W3+bta&{l$ahc dnww[l:6?7;37X> gsd-vc)jmd%ocxzPi=3;:4><]9%l~k }f.ofi*bh}}Ub0<71169V4*aun'xm#`kb/emvpZo;97;37X> gsd-vc)jmd%ocxzPi=03:4><]9%l~k }f.ofi*bh}}Ub0??1199V4*aun'xm#`kb/emvpZo;:;4:46[?/fpe*w`(elg$hb{{_h>17;7?3\:$kh!rg-nah)cg|~Te1<;>0:8Q5)`zo$yj"cjm.flqqYn4;?5=55Z0.eqb+ta'dof#iazt^k?638602_;#j|i.sd,i`k(lfSd2=7?3;?P6(o{l%~k!bel-gkprXa5832<64U1-dvc(un&gna"j`uu]j87?99>1^<"i}f/pe+hcj'me~xRg32?3;?P6(o{l%~k!bel-gkprXa59;2<64U1-dvc(un&gna"j`uu]j8679911^<"i}f/pe+hcj'me~xRg333<2<>S7'nxm"h mdo,`jssW`68?3?7;T2,cw`)zo%fi`!kotv\m9536820Y=!hrg,qb*kbe&ndyyQf<27=52=R8&myj#|i/lgn+air|Vc7?3?8;T2,cw`)zo%fi`!kotv\m9299>1^<"i}f/pe+hcj'me~xRg35?34?P6(o{l%~k!bel-gkprXa5<5=:5Z0.eqb+ta'dof#iazt^k?3;703\:$kh!rg-nah)cg|~Te161169V4*aun'xm#`kb/emvpZo;17;=7X> gsd-vc)jmd%ocxzPi^222>S7'nxm"h mdo,`jssW`U:=:5Z0.eqb+ta'dof#iazt^k\55703\:$kh!rg-nah)cg|~TeR?>169V4*aun'xm#`kb/emvpZoX9;;<7X> gsd-vc)jmd%ocxzPi^3052=R8&myj#|i/lgn+air|VcT=9?8;T2,cw`)zo%fi`!kotv\mZ729>1^<"i}f/pe+hcj'me~xRgP1734?P6(o{l%~k!bel-gkprXaV;<=:5Z0.eqb+ta'dof#iazt^k\5=703\:$kh!rg-nah)cg|~TeR?6179V4*aun'xm#`kb/emvpZoX:8=0Y=!hrg,qb*kbe&ndyyQf_3223>S7'nxm"h mdo,`jssW`U9=<94U1-dvc(un&gna"j`uu]j[746?2_;#j|i.sd,i`k(lfSdQ=3058Q5)`zo$yj"cjm.flqqYnW;>:;6[?/fpe*w`(elg$hb{{_h]1141<]9%l~k }f.ofi*bh}}UbS?8>7:W3+bta&{l$ahc dnww[lY5?8=0Y=!hrg,qb*kbe&ndyyQf_3:23>S7'nxm"h mdo,`jssW`U95<84U1-dvc(un&gna"j`uu]j[6703\:$kh!rg-nah)cg|~TeR=?169V4*aun'xm#`kb/emvpZoX;8;<7X> gsd-vc)jmd%ocxzPi^1152=R8&myj#|i/lgn+air|VcT?>?8;T2,cw`)zo%fi`!kotv\mZ539>1^<"i}f/pe+hcj'me~xRgP3435?P6(o{l%~k!bel-gkprXaV>::6[?/fpe*w`(elg$hb{{_h]653=R8&myj#|i/lgn+air|VcT:<84U1-dvc(un&gna"j`uu]j[2713\:$kh!rg-nah)cg|~TeR6>6:W3+bta&{l$ahc dnww[lY>9j1^<"i}f/pe+hcj'me~xRgPnnv34576m2_;#j|i.sd,i`k(omg%h`!Br`o\VDK69o1^<"i}f/pe+hcj'nnf"ic Mscn[WGJ99;m7X> gsd-vc)jmd%lh` km.OqehYUID;:=k5Z0.eqb+ta'dof#jjb.eo,IwgjW[KF=??i;T2,cw`)zo%fi`!hdl,gi*KuidUYM@?<1g9V4*aun'xm#`kb/ffn*ak(E{kfS_OB153e?P6(o{l%~k!bel-d`h(ce&Gym`Q]AL365c=R8&myj#|i/lgn+bbj&mg$Aob_SCN537a3\:$kh!rg-nah)`ld$oa"C}al]QEH709o1^<"i}f/pe+hcj'nnf"ic Mscn[WGJ91;m7X> gsd-vc)jmd%lh` km.OqehYUID;2=h5Z0.eqb+ta'dof#jjb.eo,IwgjW[KF><h4U1-dvc(un&gna"ikm/fn+HtfeVXJA?>>f:W3+bta&{l$ahc geo-`h)JzhgT^LC=10d8Q5)`zo$yj"cjm.egi+bj'DxjaR\NM302b>S7'nxm"h mdo,cak)ld%F~lcPR@O174`<]9%l~k }f.ofi*ace'nf#@|nm^PBI726n2_;#j|i.sd,i`k(omg%h`!Br`o\VDK5=8l0Y=!hrg,qb*kbe&moa#jb/LpbiZTFE;<:j6[?/fpe*w`(elg$kic!dl-NvdkXZHG9;<h4U1-dvc(un&gna"ikm/fn+HtfeVXJA?6>f:W3+bta&{l$ahc geo-`h)JzhgT^LC=90g8Q5)`zo$yj"cjm.egi+bj'DxjaR\NM23e?P6(o{l%~k!bel-d`h(ce&Gym`Q]AL135c=R8&myj#|i/lgn+bbj&mg$Aob_SCN747a3\:$kh!rg-nah)`ld$oa"C}al]QEH559o1^<"i}f/pe+hcj'nnf"ic Mscn[WGJ;:;m7X> gsd-vc)jmd%lh` km.OqehYUID9?=k5Z0.eqb+ta'dof#jjb.eo,IwgjW[KF?8?i;T2,cw`)zo%fi`!hdl,gi*KuidUYM@=91g9V4*aun'xm#`kb/ffn*ak(E{kfS_OB363e?P6(o{l%~k!bel-d`h(ce&Gym`Q]AL1;5c=R8&myj#|i/lgn+bbj&mg$Aob_SCN7<7b3\:$kh!rg-nah)`ld$oa"C}al]QEH26n2_;#j|i.sd,i`k(omg%h`!Br`o\VDK388l0Y=!hrg,qb*kbe&moa#jb/LpbiZTFE=;:j6[?/fpe*w`(elg$kic!dl-NvdkXZHG?><h4U1-dvc(un&gna"ikm/fn+HtfeVXJA9=>f:W3+bta&{l$ahc geo-`h)JzhgT^LC;40d8Q5)`zo$yj"cjm.egi+bj'DxjaR\NM572b>S7'nxm"h mdo,cak)ld%F~lcPR@O724`<]9%l~k }f.ofi*ace'nf#@|nm^PBI116n2_;#j|i.sd,i`k(omg%h`!Br`o\VDK308l0Y=!hrg,qb*kbe&moa#jb/LpbiZTFE=3:i6[?/fpe*w`(elg$kic!dl-NvdkXZHG>=k5Z0.eqb+ta'dof#jjb.eo,IwgjW[KF9=?i;T2,cw`)zo%fi`!hdl,gi*KuidUYM@;>1g9V4*aun'xm#`kb/ffn*ak(E{kfS_OB533e?P6(o{l%~k!bel-d`h(ce&Gym`Q]AL705c=R8&myj#|i/lgn+bbj&mg$Aob_SCN117a3\:$kh!rg-nah)`ld$oa"C}al]QEH329o1^<"i}f/pe+hcj'nnf"ic Mscn[WGJ=?;m7X> gsd-vc)jmd%lh` km.OqehYUID?<=k5Z0.eqb+ta'dof#jjb.eo,IwgjW[KF95?i;T2,cw`)zo%fi`!hdl,gi*KuidUYM@;61d9V4*aun'xm#`kb/ffn*ak(E{kfS_OB60d8Q5)`zo$yj"cjm.egi+bj'DxjaR\NM722b>S7'nxm"h mdo,cak)ld%F~lcPR@O554`<]9%l~k }f.ofi*ace'nf#@|nm^PBI346n2_;#j|i.sd,i`k(omg%h`!Br`o\VDK1;8l0Y=!hrg,qb*kbe&moa#jb/LpbiZTFE?>:j6[?/fpe*w`(elg$kic!dl-NvdkXZHG=9<h4U1-dvc(un&gna"ikm/fn+HtfeVXJA;8>f:W3+bta&{l$ahc geo-`h)JzhgT^LC970d8Q5)`zo$yj"cjm.egi+bj'DxjaR\NM7:2b>S7'nxm"h mdo,cak)ld%F~lcPR@O5=4c<]9%l~k }f.ofi*ace'nf#@|nm^PBI27a3\:$kh!rg-nah)`ld$oa"C}al]QEH179o1^<"i}f/pe+hcj'nnf"ic Mscn[WGJ?8;m7X> gsd-vc)jmd%lh` km.OqehYUID=9=h5Z0.eqb+ta'dof#jjb.eo,IwgjW[KF4<k4U1-dvc(un&gna"ikm/fn+HtfeVXJA4?6;T2,cw`)zo%fi`!hdl,gi*H688;27X> gsd-vc)jmd%lh` km.L2467>3\:$kh!rg-nah)`ld$oa"@>043:?P6(o{l%~k!bel-d`h(ce&D:<:?6;T2,cw`)zo%fi`!hdl,gi*H680;37X> gsd-vc)jmd%lh` km.L254?<]9%l~k }f.ofi*ace'nf#C?>10;8Q5)`zo$yj"cjm.egi+bj'G;:?<74U1-dvc(un&gna"ikm/fn+K76=830Y=!hrg,qb*kbe&moa#jb/O3234?<]9%l~k }f.ofi*ace'nf#C?>90;8Q5)`zo$yj"cjm.egi+bj'G;9=<74U1-dvc(un&gna"ikm/fn+K75;830Y=!hrg,qb*kbe&moa#jb/O3114?<]9%l~k }f.ofi*ace'nf#C?=70;8Q5)`zo$yj"cjm.egi+bj'G;95<64U1-dvc(un&gna"ikm/fn+K74901^<"i}f/pe+hcj'nnf"ic N0125<=R8&myj#|i/lgn+bbj&mg$B<=<189V4*aun'xm#`kb/ffn*ak(F89>=45Z0.eqb+ta'dof#jjb.eo,J450901^<"i}f/pe+hcj'nnf"ic N01:5<=R8&myj#|i/lgn+bbj&mg$B<:>189V4*aun'xm#`kb/ffn*ak(F8>8=45Z0.eqb+ta'dof#jjb.eo,J422901^<"i}f/pe+hcj'nnf"ic N0645==R8&myj#|i/lgn+bbj&mg$B<;>8:W3+bta&{l$ahc geo-`h)I9>;37X> gsd-vc)jmd%lh` km.L2=4><]9%l~k }f.ofi*ace'nf#C<>199V4*aun'xm#`kb/ffn*ak(F;9:46[?/fpe*w`(elg$kic!dl-M607?3\:$kh!rg-nah)`ld$oa"@=70:8Q5)`zo$yj"cjm.egi+bj'G82=55Z0.eqb+ta'dof#jjb.eo,J67602_;#j|i.sd,i`k(omg%h`!A323;?P6(o{l%~k!bel-d`h(ce&D89<64U1-dvc(un&gna"ikm/fn+K50911^<"i}f/pe+hcj'nnf"ic N2;2<>S7'nxm"h mdo,cak)ld%E8<?7;T2,cw`)zo%fi`!hdl,gi*H3;820Y=!hrg,qb*kbe&moa#jb/O665==R8&myj#|i/lgn+bbj&mg$B99>8:W3+bta&{l$ahc geo-`h)I<0;<7X> gsd-vc)jmd%lh` km.L65==R8&myj#|i/lgn+bbj&mg$B8?>8:W3+bta&{l$ahc geo-`h)I=:;37X> gsd-vc)jmd%lh` km.L614><]9%l~k }f.ofi*ace'nf#C;8199V4*aun'xm#`kb/ffn*ak(F<3:46[?/fpe*w`(elg$kic!dl-M247?3\:$kh!rg-nah)`ld$oa"@930:8Q5)`zo$yj"cjm.egi+bj'G<>=55Z0.eqb+ta'dof#jjb.eo,J31602_;#j|i.sd,i`k(omg%h`!A6834?P6(o{l%~k!bel-d`h(ce&D<=55Z0.eqb+ta'dof#jjb.eo,J27602_;#j|i.sd,i`k(omg%h`!A723;?P6(o{l%~k!bel-d`h(ce&D<9<64U1-dvc(un&gna"ikm/fn+K10911^<"i}f/pe+hcj'nnf"ic N6;2<>S7'nxm"h mdo,cak)ld%E4<?7;T2,cw`)zo%fi`!hdl,gi*H?;820Y=!hrg,qb*kbe&moa#jb/O:65==R8&myj#|i/lgn+bbj&mg$B59>8:W3+bta&{l$ahc geo-`h)I00;<7X> gsd-vc)jmd%lh` km.L:5==R8&myj#|i/lgn+bbj&mg$B4?>8:W3+bta&{l$ahc geo-`h)I1:;37X> gsd-vc)jmd%lh` km.L:14><]9%l~k }f.ofi*ace'nf#C78199V4*aun'xm#`kb/ffn*ak(F03996[?/fpe*w`(elg$kic!dl-\rdtnfmos<=>?<1<12>S7'nxm"h mdo,cak)ld%Tzl|fneg{456748:5>;5Z0.eqb+ta'dof#jjb.eo,[sguagnnt=>?0=32:70<]9%l~k }f.ofi*ace'nf#Rxnrhlga}67896:>3<9;T2,cw`)zo%fi`!hdl,gi*Yqi{cehhv?012?5685>2_;#j|i.sd,i`k(omg%h`!Pv`pjjac89:;0<:1279V4*aun'xm#`kb/ffn*ak(Wkyecjjx12349726;<0Y=!hrg,qb*kbe&moa#jb/^tbvlhcmq:;<=2>6?05?P6(o{l%~k!bel-d`h(ce&U}mgaddz3456;9>49:6[?/fpe*w`(elg$kic!dl-\rdtnfmos<=>?<0:=63=R8&myj#|i/lgn+bbj&mg$S{o}ioff|56785;22?;4U1-dvc(un&gna"ikm/fn+Zpfz`doiu>?01>2:70<]9%l~k }f.ofi*ace'nf#Rxnrhlga}678969<3<9;T2,cw`)zo%fi`!hdl,gi*Yqi{cehhv?012?6485>2_;#j|i.sd,i`k(omg%h`!Pv`pjjac89:;0?<1279V4*aun'xm#`kb/ffn*ak(Wkyecjjx12349446;<0Y=!hrg,qb*kbe&moa#jb/^tbvlhcmq:;<=2=4?05?P6(o{l%~k!bel-d`h(ce&U}mgaddz3456;:<49:6[?/fpe*w`(elg$kic!dl-\rdtnfmos<=>?<34=63=R8&myj#|i/lgn+bbj&mg$S{o}ioff|567858<2?84U1-dvc(un&gna"ikm/fn+Zpfz`doiu>?01>1<;413\:$kh!rg-nah)`ld$oa"Qyaskm``~789:7>40=5:W3+bta&{l$ahc geo-`h)X~hxbbikw01238785>2_;#j|i.sd,i`k(omg%h`!Pv`pjjac89:;0>>1279V4*aun'xm#`kb/ffn*ak(Wkyecjjx12349566;<0Y=!hrg,qb*kbe&moa#jb/^tbvlhcmq:;<=2<2?05?P6(o{l%~k!bel-d`h(ce&U}mgaddz3456;;:49:6[?/fpe*w`(elg$kic!dl-\rdtnfmos<=>?<26=63=R8&myj#|i/lgn+bbj&mg$S{o}ioff|567859>2?;4U1-dvc(un&gna"ikm/fn+Zpfz`doiu>?01>0:73<]9%l~k }f.ofi*ace'nf#Rxnrhlga}67896?2?;4U1-dvc(un&gna"ikm/fn+Zpfz`doiu>?01>6:73<]9%l~k }f.ofi*ace'nf#Rxnrhlga}67896=2?;4U1-dvc(un&gna"ikm/fn+Zpfz`doiu>?01>4:73<]9%l~k }f.ofi*ace'nf#Rxnrhlga}6789632?;4U1-dvc(un&gna"ikm/fn+Zpfz`doiu>?01>::4c<]9%l~k }f.ofi*ace'nf#iazt^k?4;7a3\:$kh!rg-nah)`ld$oa"j`uu]j84699o1^<"i}f/pe+hcj'nnf"ic dnww[l:697;m7X> gsd-vc)jmd%lh` km.flqqYn4885=k5Z0.eqb+ta'dof#jjb.eo,`jssW`6:?3?i;T2,cw`)zo%fi`!hdl,gi*bh}}Ub0<:11g9V4*aun'xm#`kb/ffn*ak(lfSd2>5?3e?P6(o{l%~k!bel-d`h(ce&ndyyQf<04=5c=R8&myj#|i/lgn+bbj&mg$hb{{_h>23;7a3\:$kh!rg-nah)`ld$oa"j`uu]j84>99o1^<"i}f/pe+hcj'nnf"ic dnww[l:617;n7X> gsd-vc)jmd%lh` km.flqqYn484:j6[?/fpe*w`(elg$kic!dl-gkprXa58;2<h4U1-dvc(un&gna"ikm/fn+air|Vc7><0>f:W3+bta&{l$ahc geo-`h)cg|~Te1<=>0d8Q5)`zo$yj"cjm.egi+bj'me~xRg322<2b>S7'nxm"h mdo,cak)ld%ocxzPi=07:4`<]9%l~k }f.ofi*ace'nf#iazt^k?6086n2_;#j|i.sd,i`k(omg%h`!kotv\m94168l0Y=!hrg,qb*kbe&moa#jb/emvpZo;:>4:j6[?/fpe*w`(elg$kic!dl-gkprXa5832<h4U1-dvc(un&gna"ikm/fn+air|Vc7>40>e:W3+bta&{l$ahc geo-`h)cg|~Te1<11g9V4*aun'xm#`kb/ffn*ak(lfSd2<0?3e?P6(o{l%~k!bel-d`h(ce&ndyyQf<23=5c=R8&myj#|i/lgn+bbj&mg$hb{{_h>06;7a3\:$kh!rg-nah)`ld$oa"j`uu]j86599o1^<"i}f/pe+hcj'nnf"ic dnww[l:4<7;m7X> gsd-vc)jmd%lh` km.flqqYn4:?5=h5Z0.eqb+ta'dof#jjb.eo,`jssW`682<k4U1-dvc(un&gna"ikm/fn+air|Vc783?j;T2,cw`)zo%fi`!hdl,gi*bh}}Ub080>e:W3+bta&{l$ahc geo-`h)cg|~Te1811d9V4*aun'xm#`kb/ffn*ak(lfSd28>0g8Q5)`zo$yj"cjm.egi+bj'me~xRg38?3f?P6(o{l%~k!bel-d`h(ce&ndyyQf<8<2`>S7'nxm"h mdo,cak)ld%ocxzPi^22`>S7'nxm"h mdo,cak)ld%ocxzPi^32a>S7'nxm"h mdo,cak)ld%ocxzPi^335`=R8&myj#|i/lgn+bbj&mg$hb{{_h]254c<]9%l~k }f.ofi*ace'nf#iazt^k\577b3\:$kh!rg-nah)`ld$oa"j`uu]j[456m2_;#j|i.sd,i`k(omg%h`!kotv\mZ739l1^<"i}f/pe+hcj'nnf"ic dnww[lY6=8o0Y=!hrg,qb*kbe&moa#jb/emvpZoX9?;n7X> gsd-vc)jmd%lh` km.flqqYnW8=:i6[?/fpe*w`(elg$kic!dl-gkprXaV;3=h5Z0.eqb+ta'dof#jjb.eo,`jssW`U:5<j4U1-dvc(un&gna"ikm/fn+air|VcT><k4U1-dvc(un&gna"ikm/fn+air|VcT>=?j;T2,cw`)zo%fi`!hdl,gi*bh}}UbS??>e:W3+bta&{l$ahc geo-`h)cg|~TeR<=1d9V4*aun'xm#`kb/ffn*ak(lfSdQ=30g8Q5)`zo$yj"cjm.egi+bj'me~xRgP253f?P6(o{l%~k!bel-d`h(ce&ndyyQf_372a>S7'nxm"h mdo,cak)ld%ocxzPi^055`=R8&myj#|i/lgn+bbj&mg$hb{{_h]134c<]9%l~k }f.ofi*ace'nf#iazt^k\6=7b3\:$kh!rg-nah)`ld$oa"j`uu]j[7?6l2_;#j|i.sd,i`k(omg%h`!kotv\mZ56m2_;#j|i.sd,i`k(omg%h`!kotv\mZ579l1^<"i}f/pe+hcj'nnf"ic dnww[lY498o0Y=!hrg,qb*kbe&moa#jb/emvpZoX;;;n7X> gsd-vc)jmd%lh` km.flqqYnW:9:i6[?/fpe*w`(elg$kic!dl-gkprXaV9?=h5Z0.eqb+ta'dof#jjb.eo,`jssW`U89<j4U1-dvc(un&gna"ikm/fn+air|VcT8<j4U1-dvc(un&gna"ikm/fn+air|VcT9<j4U1-dvc(un&gna"ikm/fn+air|VcT:<j4U1-dvc(un&gna"ikm/fn+air|VcT;<j4U1-dvc(un&gna"ikm/fn+air|VcT4<j4U1-dvc(un&gna"ikm/fn+air|VcT5?;4U1-dvc(un&gna"ikm/fn+lht|VF[ARCZX022575<]9%l~k }f.ofi*ace'nf#d`|t^NSIZKRP8;996[?/fpe*w`(elg$kic!dl-jjvrXDYGTAXV>10312>S7'nxm"h mdo,cak)ld%bb~zPLQO\IP^698;:>85Z0.eqb+ta'dof#jjb.eo,mkusWEZFS@[W133260=R8&myj#|i/lgn+bbj&mg$ec}{_MRN[HS_9:;:>85Z0.eqb+ta'dof#jjb.eo,mkusWEZFS@[W153260=R8&myj#|i/lgn+bbj&mg$ec}{_MRN[HS_9<;:>85Z0.eqb+ta'dof#jjb.eo,mkusWEZFS@[W173260=R8&myj#|i/lgn+bbj&mg$ec}{_MRN[HS_9>;:>85Z0.eqb+ta'dof#jjb.eo,mkusWEZFS@[W193260=R8&myj#|i/lgn+bbj&mg$ec}{_MRN[HS_90;:>85Z0.eqb+ta'dof#jjb.eo,mkusWEZFS@[W213260=R8&myj#|i/lgn+bbj&mg$ec}{_MRN[HS_:8;:>;5Z0.eqb+ta'dof#jjb.eo,mkusWEZFS@[W2032573<]9%l~k }f.ofi*ace'nf#d`|t^NSIZKRP;8:=?;4U1-dvc(un&gna"ikm/fn+lht|VF[ARCZX312573<]9%l~k }f.ofi*ace'nf#d`|t^NSIZKRP;>:=?;4U1-dvc(un&gna"ikm/fn+lht|VF[ARCZX372573<]9%l~k }f.ofi*ace'nf#d`|t^NSIZKRP;<:=?;4U1-dvc(un&gna"ikm/fn+lht|VF[ARCZX352573<]9%l~k }f.ofi*ace'nf#d`|t^NSIZKRP;2:=?;4U1-dvc(un&gna"ikm/fn+lht|VF[ARCZX3;2573<]9%l~k }f.ofi*ace'nf#d`|t^NSIZKRP:::=?;4U1-dvc(un&gna"ikm/fn+lht|VF[ARCZX232570<]9%l~k }f.ofi*ace'nf#d`|t^NSIZKRP:;:=<<:;T2,cw`)zo%fi`!hdl,gi*oi{}UG\@QBUY1154423\:$kh!rg-nah)`ld$oa"gasu]OTHYJ]Q98=<<:;T2,cw`)zo%fi`!hdl,gi*oi{}UG\@QBUY1754423\:$kh!rg-nah)`ld$oa"gasu]OTHYJ]Q9>=<<;;T2,cw`)zo%fi`!hdl,gi*oi{}UG\@QBUY62572<]9%l~k }f.ofi*ace'nf#d`|t^NSIZKRP<;:>95Z0.eqb+ta'dof#jjb.eo,mkusWEZFS@[W60310>S7'nxm"h mdo,cak)ld%bb~zPLQO\IP^0988?7X> gsd-vc)jmd%lh` km.kmwqYKXDUFYU6>1368Q5)`zo$yj"cjm.egi+bj'`dxxRB_M^OV\<769o1^<"i}f/pe+hcj'nnf"ic wskwaZesze8;7X> gsd-vc)jmd%lh` km.uqmqcXk}xg=<j4U1-dvc(un&xxxobd/SQW[CSKDVMNB<j4U1-dvc(un&xxxobd/sf\vvrXizxnk?>4U1-dvc(un&xxxobd/sf\vvrXizxnkRj>219V4*aun'xm#}{bmi,vaYu{}Ujkh_e02g>S7'nxm"h rrvahn)ulVxxxRm`mc3g?P6(o{l%~k!}su`oo*tcW{ySnabb03f?P6(o{l%~k!}su`oo*tcW{ySkh<1<2a>S7'nxm"h rrvahn)ulVxxxR|jg=3=5`=R8&myj#|i/sqwfim(zmUyyQ}ef>1:4b<]9%l~k }f.pppgjl'{nT~~zPrde\44b<]9%l~k }f.pppgjl'{nT~~zPrde\54b<]9%l~k }f.pppgjl'{nT~~zPrde\641<]9%l~k }f.pppgjl'{ySi?>7:W3+bta&{l$~~zmlj-qwqYc:8=0Y=!hrg,qb*tt|kf`#}{_e12`>S7'nxm"h rrvahn)pzVxxxRo|rde14>S7'nxm"h rrvahn)pzVxxxRo|rde\`4473\:$kh!rg-qwqdkc&}yS}{_`qqabYc:8i0Y=!hrg,qb*tt|kf`#z|Prrv\gjke9m1^<"i}f/pe+wusjea${Q}su]`khd69l1^<"i}f/pe+wusjea${Q}su]qab:768o0Y=!hrg,qb*tt|kf`#z|Prrv\v`a;97;o7X> gsd-vc)u{}hgg"y}_sqw[wc`W9;o7X> gsd-vc)u{}hgg"y}_sqw[wc`W8k0Y^K]_@NJEVe<]ZOYS[G\ICNF7>PDK01]EHYPTXRF0>QDDB80[H?k;YKOMK^*PMH+<#?/SUWA$5(6(HYHED;4XNP@]3=_[]FBN:5WSU]DJA1<PZ^TZNMm;Y]@KWCXAGLD:6Vkb^Kgb>^c`VZye`Xjrrklj46<PmgTAld`rWgqwlii991Sh`QBiomqR`ttafdh7lbborv\ahvsqk1j``a|t^dvhi0<jhi`y}j4b`ahquYji{an~>5lljf8`drfWje~by&?)e9geqgXkfex%?&d:fbpdYdg|d$?'k;ecweZeh}g~#?$j4d`vb[firf}"?%k5kauc\gjsi|5>1<394dckwawt13mce$='9;ekm,4/03mce$<>&7:fjj-76!>1oec&>2(58`lh/9:#<7iga(06*3>bnf!;>%:5kio*22,1<l`d#=:'8;ekm,4>.?2nbb%?6)79gmk.5!>1oec&=0(58`lh/:8#<7iga(30*3>bnf!88%:5kio*10,1<l`d#>8'8;ekm,70.?2nbb%<8)69gmk.50 =0hd`'28+5?aoi :#<7iga(22*3>bnf!9:%:5kio*06,1<l`d#?>'8;ekm,62.?2nbb%=:)79gmk.3!?1oec&:)79gmk.1!?1oec&8)79gmk.?!?1oec&6)79gmk:76>1oec2>0?58`lh;984<7iga<00=3>bnf5;82:5kio>20;1<l`d7=808;ekm8409?2nbb1?8>69gmk:607=0hd`318<5?aoi484<7iga<32=3>bnf58:2:5kio>16;1<l`d7>>08;ekm8729?2nbb1<:>69gmk:5>7=0hd`326<4?aoi4;25;6jfn=0::3=cag692:5kio>04;1<l`d7?<08;ekm8649?2nbb1=<>69gmk:4<730hd`33483:2=cag689384dhl?7;0<l`d78384dhl?1;0<l`d7:384dhl?3;0<l`d74384dhl?=;1<lf$='8;emvp-7.02ndyy&>0(:8`jss 8;"46j`uu*26,><lf$<=&8:flqq.6< 20hb{{(07*<>bh}}"::$64dnww,41.02ndyy&>8(:8`jss 83";6j`uu*1-==cg|~#>='7;emvp-46!11ocxz'23+;?air|!88%55kotv+61/?3me~x%<:)99gkpr/:?#37iazt)04-==cg|~#>5'7;emvp-4>!>1ocxz'3(:8`jss ::"46j`uu*05,><lf$><&8:flqq.4; 20hb{{(26*<>bh}}"89$94dnww,1/03me~x%;&7:flqq.1!>1ocxz'7(58`jss 1#<7iazt);*3>bh}}6;255kotv?558?3me~x1?>>99gkpr;9;437iazt=30:==cg|~7=907;emvp972611ocxz317<;?air|5;<255kotv?5=8?3me~x1?6>69gkpr;9720hb{{<32=<>bh}}69=364dnww874902ndyy2=3?:8`jss4;>546j`uu>11;><lf0?818:flqq:5?720hb{{<3:=<>bh}}695394dnww878?3me~x1=?>99gkpr;;8437iazt=11:==cg|~7?>07;emvp9536h1ocxz33483:==cg|~7?808;emvp959?2ndyy2;>69gkpr;=7=0hb{{<7<4?air|5=5;6j`uu>;:2=cg|~75364eeke6kac=2of|yw=f:djbjY`mgoymya}_w4\5)&_aecet-M@RD"Dakcui}ey,<<!2068bl`hWqfetR==x24\6fjl;;1mekaPxml{[64;?U9oae#fhdl[bcim{kcQy6^3/JJHB$GEEI>kn;gkekZ~kfqU8>u=9_3aoo)`nnfUlick}aumq[s0X9%qhSeo|_hlw[fjl59&hSeo|_rppp86+kVxoSk|jq<3/gZciikfnS}{_r{mg87+kVbjR|k_ecweZeh}g~6<!mPdhl\slbs`49= nQgar]tvZbf|hUhcx`{=1.`[cskdVlgmj}Prrv\rdj:9%iTe`~celgmpdrnggUu}k22-a\qvcXmdhnhikk_sgd95*dW~xTjk~=0.`[pubWme~xR||t<3/gZsillxm`byPlnu>4)eX`hyTc{k}fmmt95*dWyxn`bok_mcwake~59&hSiazt^uj`qn:;?&hS`}hoo]uei;6$jUyhRjjpuj>77*dWlxycQfnkg`pliiW}s{i0>#c^jbwZsillxm`by20-a\lduXiegdyQiumn>5)eX`hyT~~z21-a\`drfWje~byQxievk90*dWakxSz|Pabi>4)eX}zoTinm20-a\gjkjggUh`bmd=1.`[rtXijaT`by20-a\vaYwf}xT{dj{h<7/gZstmVl|jyQkauc\gjsi|4:'oRfns^coijusWlg{xt3?,b]q`Zbf|hUhcx`{_vkgpm;2$jUdzh|ilnu\hjq:8%iT{Qnup\slbs`4?'oR~}of]fiur~W}s{i0>#c^uq[agsiVidyczPwhfwl83+kVzyiaand^pfcv;6$jUocxzPrrv\rdj:8%iTdl}Pd`vb[firf}7; nQrne\bpjkW}byi~fPndebp`Yqie79?!mPws]gauro5:8'oR~}of]fiur~W}byi~fPndebp`Yqie7> nQrne\ahvsqV~c~h}g_`qpawrX~hf68!mPh`q\rdjnl4:'oR~}of]eqijX|axneQnsrgqpZpfd48? nabpnlfjqYiido6jdh`_ynm|Z55p:<T>nbd,b]ueiocWee|1="l_qpjiZ`nnfUu}k2500{73*dWyxdkRhzlm]w}uc:9%iTahc`rx]w}uc::%w9i6hffn]{hk~X;;r8:R<llj]emciXoldn~lz`r^t5[4Y{}U:86hzlmf8mklbk}nieyk}re9jjocd|zhbxh|}7:kmpZekc11eknlzimf;?jpbzofd{l5rne\ahvsq8>0|ah_dosp|Ys`{oxd%>&159svjaXmdzuRzgrdqk,4/6<2zycjQjmqvz[qnumzb#>$?;;qplcZcjx}sTxe|jsi*0-42<x{elShctx]wlwct`!>"=;5rne\ahvsqV~c~h}g<583:4d<x{elShctx]wlwct`Vkxh|{(1+2f>vugnUna}zv_ujqavnXizyn~y&>)0`8twi`Wlg{xtQ{hsgplZgt{lx$?'>b:rqkbYbey~rSyf}erj\evubz}"8%<l4psmd[`kw|pUdk|h^cpw`ts =#:h6~}of]fiur~W}byi~fParqfvq:3294:n6~}of]fiur~W}byi~fPndebp`.7!8h0|ah_dosp|Ys`{oxdR`jg`vf,4/6j2zycjQjmqvz[qnumzbTbhintd*1-4d<x{elShctx]wlwct`Vdnklzj(2+2f>vugnUna}zv_ujqavnXflmjxh&;)0f8twi`Wlg{xtQ{hsgplZhboh~n094?>89svjaXn|fg=>5rne\bpjkW}byi~f'0(30?uthoVl~`aQ{hsgpl-7.9:1{~biPftno[qnumzb#>$?<;qplcZ`rdeUdk|h)1*56=wzfmTjxbc_ujqavn/< ;>7}|`g^dvhiYs`{oxd1:50?3b?uthoVl~`aQ{hsgplZgt{lx$='>a:rqkbYa}efTxe|jsi]bwvcu|!;"=l5rne\bpjkW}byi~fParqfvq.5!8k0|ah_gwohZrozlycSl}|esv+7,7f3yxdkRhzlm]wlwct`Vkxh|{(5+2g>vugnUmyabPtipfwmYf{zoyx1:50?3b?uthoVl~`aQ{hsgplZhboh~n$='>a:rqkbYa}efTxe|jsi]mabgsm!;"=l5rne\bpjkW}byi~fPndebp`.5!8k0|ah_gwohZrozlycSckhaug+7,7f3yxdkRhzlm]wlwct`Vdnklzj(5+2g>vugnUmyabPtipfwmYimnki1:50?48vaYddb;;7jPd`vb[firf}";%<>4re]geqgXkfex%?&119q`Zbf|hUhcx`{(3+24>tcWmkmRm`uov+7,773{nThlzn_bmvjq.3!8:0~iQkauc\gjsi|5:5=?5}d^fbpdYdg|d094?>49q`Zci>2xoS}{3:ppp2=tj`~n~:4ssqw0>ru}l30ycjjrgnls0=qieco:6y}_`ah2>quWjf`==5xr^fbpdYdg|d$='>0:uq[agsiVidycz'1(33?rtXlh~jSnaznu*1-46<{UomyoPcnwmp-5.991|~Rjnt`]`kphs =#:>6y}_ecweZeh}g~787>15:uq[`h13~xT~~zr@Arf5==GHq;1J7:51zQ00?5a=3?1=><m7859572alrd8984>;o162?0<,:?86>:k;|Q06?5a=3?1=><m7859572al2Y?j7:?0;29564e?0=1=?:ie:Q06?2783:1=><m7859572an2n8j54?:082V532:l>684>33`4=2<6:=lo7{Zm9;295?7=913p_>:53g791?74:k=2;7?=4gf8 62f2<:0Z>;;:3yv1<<63|?j6=5r$c09f>d4n10;68?53;72M5302P9o7<ta;;9y!de2:l37)=:2;1e3>o3;90;66a<5983>>i39<0;66g;4183>>i4nj0;66a<f783>>o3;00;66g;3383>>i4k00;6)l;:2g`?kd42910c>m7:18'f1<4mj1en>4>;:m0g2<72-h?6>kl;o`0>7=<g:i=6=4+b580af=ij:0876a<c483>!d32:oh7cl<:598k6e3290/n94<eb9mf6<232e8o?4?:%`7>6cd3gh86;54o2a2>5<#j=08in5ab284?>i4k90;6)l;:2g`?kd42110c>li:18'f1<4mj1en>46;:m0f`<72-h?6>kl;o`0>d=<g:ho6=4+b580af=ij:0i76a<bb83>!d32:oh7cl<:b98k6de290/n94<eb9mf6<c32e8nl4?:%`7>6cd3gh86h54o2`:>5<#j=08in5ab28e?>i4j>0;6)l;:2g`?kd428:07b=m6;29 g2=;li0bo=51098k6d2290/n94<eb9mf6<6:21d?o:50;&a0?5bk2di?7?<;:m0f6<72-h?6>kl;o`0>42<3f9i>7>5$c697`e<fk91=854o2`2>5<#j=08in5ab2822>=h;k:1<7*m4;1fg>he;3;<76a<ag83>!d32:oh7cl<:0:8?j5fm3:1(o:53da8jg5=9010c>mi:18'f1<4mj1en>4>a:9l7fc=83.i87=jc:la7?7e32e8oi4?:%`7>6cd3gh86<m4;n1`g?6=,k>1?hm4nc195a=<g:ii6=4+b580af=ij:0:i65`3bc94?"e<39no6`m3;3e?>i4k:0;6)l;:2g`?kd42;:07b=m8;29 g2=;li0bo=52098k6gc290/n94<eb9mf6<5:21d?lm50;&a0?5bk2di?7<<;:k0<5<72-h?6>o<;o`0>5=<a:=m6=4+b580e6=ij:0:76g<7d83>!d32:k87cl<:398m61c290/n94<a29mf6<432c8;n4?:%`7>6g43gh86954i25a>5<#j=08m>5ab286?>o4?00;6)l;:2c0?kd42?10e>97:18'f1<4i:1en>48;:k032<72-h?6>o<;o`0>==<a:==6=4+b580e6=ij:0276g<7483>!d32:k87cl<:`98m613290/n94<a29mf6<e32c8;>4?:%`7>6g43gh86n54i251>5<#j=08m>5ab28g?>o4?80;6)l;:2c0?kd42l10e>9?:18'f1<4i:1en>4i;:k02`<72-h?6>o<;o`0>46<3`9=h7>5$c697d5<fk91=<54i24`>5<#j=08m>5ab2826>=n;?h1<7*m4;1b7>he;3;876g<6`83>!d32:k87cl<:068?l5113:1(o:53`18jg5=9<10e>87:18'f1<4i:1en>4>6:9j731=83.i87=n3:la7?7032c8:;4?:%`7>6g43gh86<64;h151?6=,k>1?l=4nc195<=<a:2=6=4+b580e6=ij:0:m65f39794?"e<39j?6`m3;3a?>o40=0;6)l;:2c0?kd428i07d=73;29 g2=;h90bo=51e98m6>5290/n94<a29mf6<6m21b?5?50;&a0?5f;2di?7?i;:k03d<72-h?6>o<;o`0>76<3`9=j7>5$c697d5<fk91><54i247>5<#j=08m>5ab2816>=n;?91<7*m4;1b7>he;38876g;2983>>d4<00;6<4?:1yK71><,kh1?974oc394?=zj=?1<7?50;2xL62?3-hi69;4o5694?=zj;h1<76i:043>4>>sA9?46T=c;3546=n3;:6<;513827?732h026<8516821?702h0::7??:8820?742881=<4i:|&af?5aj2.9j7=i9:&07?5ai2.jh7l?;h63`?6=,k>18=k4nc194>=n<9i1<7*m4;63a>he;3;07d:?b;29 g2=<9o0bo=52:9j05g=83.i87:?e:la7?5<3`>;57>5$c6905c<fk91865f3gg94?=n<:;1<75f42694?=h<:=1<75f41594?"e<3>;46`m3;28?l27>3:1(o:541:8jg5=921b8=;50;&a0?2702di?7<4;h630?6=,k>18=64nc197>=n<991<7*m4;63<>he;3>07d:<0;29?j2793:17d:>3;29 g2=<8>0bo=50:9j044=83.i87:>4:la7?7<3`>:=7>5$c69042<fk91>65f40294?"e<3>:86`m3;18?l27n3:1(o:54068jg5=<21d?8650;9l736=83.i87=91:la7?6<3f9>j7>5$c69737<fk91=65`34g94?"e<39==6`m3;08?j52l3:1(o:53738jg5=;21d?8m50;&a0?5192di?7:4;n621?6=3`>?<7>5;h62e?6=,k>18<l4nc194>=n<831<7*m4;62f>he;3;07d:>8;29 g2=<8h0bo=52:9j041=83.i87:>b:la7?5<3`>::7>5$c6904d<fk91865`3ga94?=h;o<1<75f42;94?=n;<k1<75f43294?"e<3>9=6`m3;28?l26n3:1(o:54338jg5=921b8<k50;&a0?2592di?7<4;h62`?6=,k>18??4nc197>=n<8i1<7*m4;615>he;3>07d:=6;29 g2=<;=0bo=50:9j073=83.i87:=7:la7?7<3`>987>5$c69071<fk91>65f43194?"e<3>9;6`m3;18?l25:3:1(o:54358jg5=<21d?8950;9j7c`=831b?8l50;9j017=831d8>=50;9l06>=831b8><50;9l7f?=83.i87=jc:la7?6<3f9h47>5$c697`e<fk91=65`3b594?"e<39no6`m3;08?j5d>3:1(o:53da8jg5=;21d?n;50;&a0?5bk2di?7:4;n1`0?6=,k>1?hm4nc191>=h;j81<7*m4;1fg>he;3<07b=l1;29 g2=;li0bo=57:9l7f6=83.i87=jc:la7?><3f9ij7>5$c697`e<fk91565`3cg94?"e<39no6`m3;c8?j5el3:1(o:53da8jg5=j21d?om50;&a0?5bk2di?7m4;n1af?6=,k>1?hm4nc19`>=h;kk1<7*m4;1fg>he;3o07b=m9;29 g2=;li0bo=5f:9l7g1=83.i87=jc:la7?7732e8n;4?:%`7>6cd3gh86<?4;n1a1?6=,k>1?hm4nc1957=<g:h?6=4+b580af=ij:0:?65`3c194?"e<39no6`m3;37?>i4j;0;6)l;:2g`?kd428?07b=m1;29 g2=;li0bo=51798k6d7290/n94<eb9mf6<6?21d?lh50;&a0?5bk2di?7?7;:m0e`<72-h?6>kl;o`0>4?<3f9hj7>5$c697`e<fk91=l54o2af>5<#j=08in5ab282f>=h;jn1<7*m4;1fg>he;3;h76a<cb83>!d32:oh7cl<:0f8?j5dj3:1(o:53da8jg5=9l10c>mn:18'f1<4mj1en>4>f:9l7f5=83.i87=jc:la7?4732e8n54?:%`7>6cd3gh86??4;n1b`?6=,k>1?hm4nc1967=<g:kh6=4+b580af=ij:09?65f39294?"e<39j?6`m3;28?l50n3:1(o:53`18jg5=921b?:k50;&a0?5f;2di?7<4;h14`?6=,k>1?l=4nc197>=n;>i1<7*m4;1b7>he;3>07d=8b;29 g2=;h90bo=55:9j72?=83.i87=n3:la7?0<3`9<47>5$c697d5<fk91;65f36594?"e<39j?6`m3;:8?l50>3:1(o:53`18jg5=121b?:;50;&a0?5f;2di?7o4;h140?6=,k>1?l=4nc19f>=n;>91<7*m4;1b7>he;3i07d=82;29 g2=;h90bo=5d:9j727=83.i87=n3:la7?c<3`9<<7>5$c697d5<fk91j65f37g94?"e<39j?6`m3;33?>o4>m0;6)l;:2c0?kd428;07d=9c;29 g2=;h90bo=51398m60e290/n94<a29mf6<6;21b?;o50;&a0?5f;2di?7?;;:k02<<72-h?6>o<;o`0>43<3`9=47>5$c697d5<fk91=;54i244>5<#j=08m>5ab2823>=n;?<1<7*m4;1b7>he;3;376g<6483>!d32:k87cl<:0;8?l5?>3:1(o:53`18jg5=9h10e>6::18'f1<4i:1en>4>b:9j7=2=83.i87=n3:la7?7d32c84>4?:%`7>6g43gh86<j4;h1;6?6=,k>1?l=4nc195`=<a:2:6=4+b580e6=ij:0:j65f36c94?"e<39j?6`m3;03?>o4>o0;6)l;:2c0?kd42;;07d=94;29 g2=;h90bo=52398m604290/n94<a29mf6<5;21b?8750;9l07b=83.i87:=f:la7?6<3f>9o7>5$c6907`<fk91=65`43`94?"e<3>9j6`m3;08?j25i3:1(o:543d8jg5=;21d8?750;&a0?25n2di?7:4;n60a?6=,k>18>h4nc194>=h<:n1<7*m4;60b>he;3;07b:<c;29 g2=<:l0bo=52:9l06d=83.i87:<f:la7?5<3f>8m7>5$c6906`<fk91865`41094?=n;on1<75`37094?=n<;21<75`42494?=e;<:1<7?50;2x gd=<<1C?9h4H26;?j232900qo=:1;295?6=8r.in7=;9:J00c=O;=20co?50;9~f45e290?6=4?{%`a>14<@:>m7E=;8:&7f?2<a;n1<75f3483>>oe=3:17bl9:188yg55n3:187>50z&af?273A9?j6F<499'0g<53`8o6=44i2394?=n;<0;66am6;29?xd4;m0;694?:1y'fg<3:2B88k5G35:8L7g<,<=18>;4$5`90>o5l3:17d=::188mg3=831dn;4?::a764=8391<7>t$c`97c=O;=l0D>:7;I0b?!302=9>7):m:39j6a<722c897>5;n`5>5<<uk9?<7>53;294~"ej39m7E=;f:J00==O:h1/9:4;349'0g<53`8o6=44i2794?=hj?0;66sm32a94?2=83:p(ol5439K71`<@:>37E<n;%74>1523->i695f2e83>>o4=3:17dl::188kg0=831vn>=>:180>5<7s-hi6>h4H26e?M5302B9m6*:7;601>"3j380e?j50;9j70<722ei:7>5;|`07`<72<0;6=u+bc877>N4<o1C?964H3c8 01=<:?0e?j50;9j6`<722c897>5;h`6>5<<gk<1<75rb21e>5<4290;w)lm:2d8L62a3A9?46F=a:&63?24=2.?n7<4i3f94?=n;<0;66am6;29?xd4;90;684?:1y'fg<3;2B88k5G35:8L7g<,<=18>;4i3f94?=n:l0;66g<5;29?ld22900co850;9~f65e290?6=4?{%`a>14<@:>m7E=;8:J1e>"2?3>896*;b;68m7b=831b?84?::ka1?6=3fh=6=44}c10e?6=<3:1<v*mb;61?M53n2B8855+4c87?l4c2900e>;50;9jf0<722ei:7>5;|`07<<72=0;6=u+bc876>N4<o1C?964$5`90>o5l3:17d=::188mg3=831dn;4?::a76>=83>1<7>t$c`907=O;=l0D>:7;%6a>1=n:m0;66g<5;29?ld22900co850;9~f621290?6=4?{%`a>14<@:>m7E=;8:&7f?2<a;n1<75f3483>>oe=3:17bl9:188yg53=3:187>50z&af?253A9?j6F<499'0g<33`8o6=44i2794?=nj<0;66am6;29?xddl3:187>50z&af?273A9?j6F<499'0g<53`8o6=44i2394?=n;<0;66am6;29?xddk3:187>50z&af?273A9?j6F<499'0g<53`8o6=44i2394?=n;<0;66am6;29?xddj3:187>50z&af?273A9?j6F<499'0g<53`8o6=44i2394?=n;<0;66am6;29?xddi3:187>50z&af?273A9?j6F<499'0g<53`8o6=44i2394?=n;<0;66am6;29?xdd13:187>50z&af?273A9?j6F<499'0g<53`8o6=44i2394?=n;<0;66am6;29?xd6880;694?:1y'fg<382B88k5G35:8 1d=:2c9h7>5;h12>5<<a:?1<75`b783>>{e99:1<7:50;2x gd=<91C?9h4H26;?!2e2;1b>i4?::k05?6=3`9>6=44oc494?=zjol1<7:50;2x gd=<91C?9h4H26;?!2e2;1b>i4?::k05?6=3`9>6=44oc494?=zjoo1<7:50;2x gd=<91C?9h4H26;?!2e2;1b>i4?::k05?6=3`9>6=44oc494?=zjon1<7:50;2x gd=<91C?9h4H26;?!2e2;1b>i4?::k05?6=3`9>6=44oc494?=zj88<6=4;:183!de2=:0D>:i;I17<>"3j380e?j50;9j74<722c897>5;n`5>5<<uk;9:7>54;294~"ej3>;7E=;f:J00==#<k097d<k:188m67=831b?84?::ma2?6=3th:>84?:583>5}#jk0?<6F<4g9K71><,=h1>6g=d;29?l562900e>;50;9lf3<722wi=?:50;694?6|,kh18=5G35d8L62?3->i6?5f2e83>>o493:17d=::188kg0=831vn<<<:187>5<7s-hi69>4H26e?M5302.?n7<4i3f94?=n;80;66g<5;29?jd12900qoh<:187>5<7s-hi69>4H26e?M5302.?n7<4i3f94?=n;80;66g<5;29?jd12900qoh=:187>5<7s-hi69>4H26e?M5302.?n7<4i3f94?=n;80;66g<5;29?jd12900qoh>:187>5<7s-hi69>4H26e?M5302.?n7<4i3f94?=n;80;66g<5;29?jd12900qoh?:187>5<7s-hi69>4H26e?M5302.?n7<4i3f94?=n;80;66g<5;29?jd12900qoki:187>5<7s-hi69>4H26e?M5302.?n7<4i3f94?=n;80;66g<5;29?jd12900qo?>d;290?6=8r.in7:?;I17b>N4<11C>l5+568770=#<k097d<k:188m67=831b?84?::ma2?6=3th:=n4?:583>5}#jk0?<6F<4g9K71><@;k0(8954278 1d=:2c9h7>5;h12>5<<a:?1<75`b783>>{e98h1<7:50;2x gd=<91C?9h4H26;?M4f3-?<69=:;%6a>7=n:m0;66g<1;29?l522900co850;9~f47f290?6=4?{%`a>16<@:>m7E=;8:J1e>"2?3>896*;b;08m7b=831b?<4?::k01?6=3fh=6=44}c32=?6=<3:1<v*mb;63?M53n2B8855G2`9'12<3;<1/8o4=;h0g>5<<a:;1<75f3483>>ie>3:17plj9;290?6=8r.in7:?;I17b>N4<11C>l5+568770=#<k097d<k:188m67=831b?84?::ma2?6=3thn47>54;294~"ej3>;7E=;f:J00==O:h1/9:4;349'0g<53`8o6=44i2394?=n;<0;66am6;29?xdb?3:187>50z&af?273A9?j6F<499K6d=#=>0??85+4c81?l4c2900e>?50;9j70<722ei:7>5;|`f2?6=<3:1<v*mb;63?M53n2B8855G2`9'12<3;<1/8o4=;h0g>5<<a:;1<75f3483>>ie>3:17plj5;290?6=8r.in7:?;I17b>N4<11C>l5+568770=#<k097d<k:188m67=831b?84?::ma2?6=3thoj7>54;294~"ej3>;7E=;f:J00==#<k097d<k:188m67=831b?84?::ma2?6=3thoi7>54;294~"ej3>;7E=;f:J00==#<k097d<k:188m67=831b?84?::ma2?6=3thoh7>54;294~"ej3>;7E=;f:J00==#<k097d<k:188m67=831b?84?::ma2?6=3thoo7>54;294~"ej3>;7E=;f:J00==#<k097d<k:188m67=831b?84?::ma2?6=3thon7>54;294~"ej3>;7E=;f:J00==#<k097d<k:188m67=831b?84?::ma2?6=3th:=>4?:583>5}#jk0?<6F<4g9K71><,=h1>6g=d;29?l562900e>;50;9lf3<722wi=<<50;694?6|,kh18=5G35d8L62?3->i6?5f2e83>>o493:17d=::188kg0=831vn<?>:187>5<7s-hi69>4H26e?M5302.?n7<4i3f94?=n;80;66g<5;29?jd12900qo?>0;290?6=8r.in7:?;I17b>N4<11/8o4=;h0g>5<<a:;1<75f3483>>ie>3:17pl>0g83>1<729q/no4;0:J00c=O;=20(9l52:k1`?6=3`9:6=44i2794?=hj?0;66sm14;94?3=83:p(ol5409K71`<@:>37):m:39j6a<722c9i7>5;h12>5<<a:?1<75`b783>>{e9<21<7;50;2x gd=<81C?9h4H26;?!2e2;1b>i4?::k1a?6=3`9:6=44i2794?=hj?0;66sm14494?3=83:p(ol5409K71`<@:>37):m:39j6a<722c9i7>5;h12>5<<a:?1<75`b783>>{e9<?1<7;50;2x gd=<:1C?9h4H26;?!2e2=1b>i4?::k1a?6=3`9>6=44ic794?=hj?0;66sm14594?3=83:p(ol5409K71`<@:>37):m:39j6a<722c9i7>5;h12>5<<a:?1<75`b783>>{e9?91<7;50;2x gd=<81C?9h4H26;?!2e2;1b>i4?::k1a?6=3`9:6=44i2794?=hj?0;66sm17094?3=83:p(ol5409K71`<@:>37):m:39j6a<722c9i7>5;h12>5<<a:?1<75`b783>>{e9?;1<7;50;2x gd=<81C?9h4H26;?!2e2;1b>i4?::k1a?6=3`9:6=44i2794?=hj?0;66sm17294?3=83:p(ol5409K71`<@:>37):m:39j6a<722c9i7>5;h12>5<<a:?1<75`b783>>{e9<l1<7;50;2x gd=<81C?9h4H26;?!2e2;1b>i4?::k1a?6=3`9:6=44i2794?=hj?0;66sm12594?2=83:p(ol5439K71`<@:>37):m:59j6a<722c897>5;h`6>5<<gk<1<75rb01;>5<3290;w)lm:508L62a3A9?46*;b;68m7b=831b?84?::ka1?6=3fh=6=44}c306?6=<3:1<v*mb;63?M53n2B8855+4c81?l4c2900e>?50;9j70<722ei:7>5;|`274<72=0;6=u+bc874>N4<o1C?964$5`96>o5l3:17d=>:188m63=831dn;4?::a526=8391<7>t$c`971c<@:>m7E=;8:k04?6=3`>o6=44o`d94?=zj8<m6=4<:183!de2:>n7E=;f:J00==n;90;66g;d;29?jga2900qo?99;290?6=8r.in7;7;I17b>N4<11b?=4?::k02?6=3`h36=44o`d94?=zj8<36=4;:183!de2<20D>:i;I17<>o483:17d=9:188mg>=831dmk4?::a531=83>1<7>t$c`91==O;=l0D>:7;h13>5<<a:<1<75fb983>>ifn3:17pl>6783>1<729q/no4:8:J00c=O;=20e>>50;9j73<722ci47>5;nce>5<<uk;=97>54;294~"ej3?37E=;f:J00==n;90;66g<6;29?ld?2900clh50;9~f413290?6=4?{%`a>16<@:>m7E=;8:&7f?4<a;n1<75f3083>>o4=3:17bl9:188yg70;3:187>50z&af?273A9?j6F<499'0g<53`8o6=44i2394?=n;<0;66am6;29?xd6?>0;684?:1y'fg<3;2B88k5G35:8 1d=<2c9h7>5;h0f>5<<a:?1<75fb483>>ie>3:17pl>a583>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6i:0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>a083>0<729q/no4;3:J00c=O;=20(9l54:k1`?6=3`8n6=44i2794?=nj<0;66am6;29?xd6i90;684?:1y'fg<3;2B88k5G35:8 1d=<2c9h7>5;h0f>5<<a:?1<75fb483>>ie>3:17pl>a383>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6ij0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>a`83>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6ik0;684?:1y'fg<3;2B88k5G35:8 1d=<2c9h7>5;h0f>5<<a:?1<75fb483>>ie>3:17pl>ae83>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6il0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>b783>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6j=0;684?:1y'fg<3;2B88k5G35:8 1d=<2c9h7>5;h0f>5<<a:?1<75fb483>>ie>3:17pl>b483>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6j>0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>b983>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6k;0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>c083>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6k90;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>bg83>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6jl0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=e483>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd5m?0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=f083>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd5nj0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl<0283>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd48=0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl<0483>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd48?0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl<0683>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd4810;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=e683>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd5m10;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=e883>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd5mh0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=ec83>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd5mj0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=ee83>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd5ml0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=eg83>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd5n90;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=f383>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd5n:0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=f583>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd5n<0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=f783>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd5n>0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=f983>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd5n00;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=f`83>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd5nk0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=fe83>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd5nl0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=fg83>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd4890;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl<0083>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd48;0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=0e83>a<729q/no4m7:J00c=O;=20e?;50;9j63<722c9;7>5;h0;>5<<a:?1<75f3983>>o413:17d=n:188m6d=831b?9l50;9j71e=831dnl4?::m03?6=3th9=54?:e83>5}#jk0i;6F<4g9K71><a;?1<75f2783>>o5?3:17d<7:188m63=831b?54?::k0=?6=3`9j6=44i2`94?=n;=h1<75f35a94?=hjh0;66a<7;29?xd5::0;6i4?:1y'fg<e?2B88k5G35:8m73=831b>;4?::k13?6=3`836=44i2794?=n;10;66g<9;29?l5f2900e>l50;9j71d=831b?9m50;9lfd<722e8;7>5;|`101<72m0;6=u+bc8a3>N4<o1C?964i3794?=n:?0;66g=7;29?l4?2900e>;50;9j7=<722c857>5;h1b>5<<a:h1<75f35`94?=n;=i1<75`b`83>>i4?3:17pl=2d83>a<729q/no4m7:J00c=O;=20e?;50;9j63<722c9;7>5;h0;>5<<a:?1<75f3983>>o413:17d=n:188m6d=831b?9l50;9j71e=831dnl4?::m03?6=3th9?44?:e83>5}#jk0i;6F<4g9K71><a;?1<75f2783>>o5?3:17d<7:188m63=831b?54?::k0=?6=3`9j6=44i2`94?=n;=h1<75f35a94?=hjh0;66a<7;29?xd5<o0;6i4?:1y'fg<e?2B88k5G35:8m73=831b>;4?::k13?6=3`836=44i2794?=n;10;66g<9;29?l5f2900e>l50;9j71d=831b?9m50;9lfd<722e8;7>5;|`116<72m0;6=u+bc8a3>N4<o1C?964i3794?=n:?0;66g=7;29?l4?2900e>;50;9j7=<722c857>5;h1b>5<<a:h1<75f35`94?=n;=i1<75`b`83>>i4?3:17pl=5583>a<729q/no4m7:J00c=O;=20e?;50;9j63<722c9;7>5;h0;>5<<a:?1<75f3983>>o413:17d=n:188m6d=831b?9l50;9j71e=831dnl4?::m03?6=3th9<h4?:e83>5}#jk0i;6F<4g9K71><a;?1<75f2783>>o5?3:17d<7:188m63=831b?54?::k0=?6=3`9j6=44i2`94?=n;=h1<75f35a94?=hjh0;66a<7;29?xd5980;6i4?:1y'fg<e?2B88k5G35:8m73=831b>;4?::k13?6=3`836=44i2794?=n;10;66g<9;29?l5f2900e>l50;9j71d=831b?9m50;9lfd<722e8;7>5;|`14c<72m0;6=u+bc8a3>N4<o1C?964i3794?=n:?0;66g=7;29?l4?2900e>;50;9j7=<722c857>5;h1b>5<<a:h1<75f35`94?=n;=i1<75`b`83>>i4?3:17pl=1183>a<729q/no4m7:J00c=O;=20e?;50;9j63<722c9;7>5;h0;>5<<a:?1<75f3983>>o413:17d=n:188m6d=831b?9l50;9j71e=831dnl4?::m03?6=3th9=?4?:e83>5}#jk0i;6F<4g9K71><a;?1<75f2783>>o5?3:17d<7:188m63=831b?54?::k0=?6=3`9j6=44i2`94?=n;=h1<75f35a94?=hjh0;66a<7;29?xd59:0;6i4?:1y'fg<e?2B88k5G35:8m73=831b>;4?::k13?6=3`836=44i2794?=n;10;66g<9;29?l5f2900e>l50;9j71d=831b?9m50;9lfd<722e8;7>5;|`151<72m0;6=u+bc8a3>N4<o1C?964i3794?=n:?0;66g=7;29?l4?2900e>;50;9j7=<722c857>5;h1b>5<<a:h1<75f35`94?=n;=i1<75`b`83>>i4?3:17pl=1483>a<729q/no4m7:J00c=O;=20e?;50;9j63<722c9;7>5;h0;>5<<a:?1<75f3983>>o413:17d=n:188m6d=831b?9l50;9j71e=831dnl4?::m03?6=3th9=44?:e83>5}#jk0i;6F<4g9K71><a;?1<75f2783>>o5?3:17d<7:188m63=831b?54?::k0=?6=3`9j6=44i2`94?=n;=h1<75f35a94?=hjh0;66a<7;29?xd59?0;6i4?:1y'fg<e?2B88k5G35:8m73=831b>;4?::k13?6=3`836=44i2794?=n;10;66g<9;29?l5f2900e>l50;9j71d=831b?9m50;9lfd<722e8;7>5;|`152<72m0;6=u+bc8a3>N4<o1C?964i3794?=n:?0;66g=7;29?l4?2900e>;50;9j7=<722c857>5;h1b>5<<a:h1<75f35`94?=n;=i1<75`b`83>>i4?3:17pl=1`83>a<729q/no4m7:J00c=O;=20e?;50;9j63<722c9;7>5;h0;>5<<a:?1<75f3983>>o413:17d=n:188m6d=831b?9l50;9j71e=831dnl4?::m03?6=3th9=o4?:e83>5}#jk0i;6F<4g9K71><a;?1<75f2783>>o5?3:17d<7:188m63=831b?54?::k0=?6=3`9j6=44i2`94?=n;=h1<75f35a94?=hjh0;66a<7;29?xd59j0;6i4?:1y'fg<e?2B88k5G35:8m73=831b>;4?::k13?6=3`836=44i2794?=n;10;66g<9;29?l5f2900e>l50;9j71d=831b?9m50;9lfd<722e8;7>5;|`15a<72m0;6=u+bc8a3>N4<o1C?964i3794?=n:?0;66g=7;29?l4?2900e>;50;9j7=<722c857>5;h1b>5<<a:h1<75f35`94?=n;=i1<75`b`83>>i4?3:17pl=2183>a<729q/no4m7:J00c=O;=20e?;50;9j63<722c9;7>5;h0;>5<<a:?1<75f3983>>o413:17d=n:188m6d=831b?9l50;9j71e=831dnl4?::m03?6=3th9=h4?:e83>5}#jk0i;6F<4g9K71><a;?1<75f2783>>o5?3:17d<7:188m63=831b?54?::k0=?6=3`9j6=44i2`94?=n;=h1<75f35a94?=hjh0;66a<7;29?xd59o0;6i4?:1y'fg<e?2B88k5G35:8m73=831b>;4?::k13?6=3`836=44i2794?=n;10;66g<9;29?l5f2900e>l50;9j71d=831b?9m50;9lfd<722e8;7>5;|`164<72m0;6=u+bc8a3>N4<o1C?964i3794?=n:?0;66g=7;29?l4?2900e>;50;9j7=<722c857>5;h1b>5<<a:h1<75f35`94?=n;=i1<75`b`83>>i4?3:17pl=2383>a<729q/no4m7:J00c=O;=20e?;50;9j63<722c9;7>5;h0;>5<<a:?1<75f3983>>o413:17d=n:188m6d=831b?9l50;9j71e=831dnl4?::m03?6=3th9>94?:e83>5}#jk0i;6F<4g9K71><a;?1<75f2783>>o5?3:17d<7:188m63=831b?54?::k0=?6=3`9j6=44i2`94?=n;=h1<75f35a94?=hjh0;66a<7;29?xd5:<0;6i4?:1y'fg<e?2B88k5G35:8m73=831b>;4?::k13?6=3`836=44i2794?=n;10;66g<9;29?l5f2900e>l50;9j71d=831b?9m50;9lfd<722e8;7>5;|`16=<72m0;6=u+bc8a3>N4<o1C?964i3794?=n:?0;66g=7;29?l4?2900e>;50;9j7=<722c857>5;h1b>5<<a:h1<75f35`94?=n;=i1<75`b`83>>i4?3:17pl=2783>a<729q/no4m7:J00c=O;=20e?;50;9j63<722c9;7>5;h0;>5<<a:?1<75f3983>>o413:17d=n:188m6d=831b?9l50;9j71e=831dnl4?::m03?6=3th9>:4?:e83>5}#jk0i;6F<4g9K71><a;?1<75f2783>>o5?3:17d<7:188m63=831b?54?::k0=?6=3`9j6=44i2`94?=n;=h1<75f35a94?=hjh0;66a<7;29?xd5:00;6i4?:1y'fg<e?2B88k5G35:8m73=831b>;4?::k13?6=3`836=44i2794?=n;10;66g<9;29?l5f2900e>l50;9j71d=831b?9m50;9lfd<722e8;7>5;|`16d<72m0;6=u+bc8a3>N4<o1C?964i3794?=n:?0;66g=7;29?l4?2900e>;50;9j7=<722c857>5;h1b>5<<a:h1<75f35`94?=n;=i1<75`b`83>>i4?3:17pl=2c83>a<729q/no4m7:J00c=O;=20e?;50;9j63<722c9;7>5;h0;>5<<a:?1<75f3983>>o413:17d=n:188m6d=831b?9l50;9j71e=831dnl4?::m03?6=3th9>n4?:e83>5}#jk0i;6F<4g9K71><a;?1<75f2783>>o5?3:17d<7:188m63=831b?54?::k0=?6=3`9j6=44i2`94?=n;=h1<75f35a94?=hjh0;66a<7;29?xd5;90;6i4?:1y'fg<e?2B88k5G35:8m73=831b>;4?::k13?6=3`836=44i2794?=n;10;66g<9;29?l5f2900e>l50;9j71d=831b?9m50;9lfd<722e8;7>5;|`16a<72m0;6=u+bc8a3>N4<o1C?964i3794?=n:?0;66g=7;29?l4?2900e>;50;9j7=<722c857>5;h1b>5<<a:h1<75f35`94?=n;=i1<75`b`83>>i4?3:17pl=2g83>a<729q/no4m7:J00c=O;=20e?;50;9j63<722c9;7>5;h0;>5<<a:?1<75f3983>>o413:17d=n:188m6d=831b?9l50;9j71e=831dnl4?::m03?6=3th9?<4?:e83>5}#jk0i;6F<4g9K71><a;?1<75f2783>>o5?3:17d<7:188m63=831b?54?::k0=?6=3`9j6=44i2`94?=n;=h1<75f35a94?=hjh0;66a<7;29?xd5;;0;6i4?:1y'fg<e?2B88k5G35:8m73=831b>;4?::k13?6=3`836=44i2794?=n;10;66g<9;29?l5f2900e>l50;9j71d=831b?9m50;9lfd<722e8;7>5;|`176<72m0;6=u+bc8a3>N4<o1C?964i3794?=n:?0;66g=7;29?l4?2900e>;50;9j7=<722c857>5;h1b>5<<a:h1<75f35`94?=n;=i1<75`b`83>>i4?3:17pl=3583>a<729q/no4m7:J00c=O;=20e?;50;9j63<722c9;7>5;h0;>5<<a:?1<75f3983>>o413:17d=n:188m6d=831b?9l50;9j71e=831dnl4?::m03?6=3th9?:4?:e83>5}#jk0i;6F<4g9K71><a;?1<75f2783>>o5?3:17d<7:188m63=831b?54?::k0=?6=3`9j6=44i2`94?=n;=h1<75f35a94?=hjh0;66a<7;29?xd5;<0;6i4?:1y'fg<e?2B88k5G35:8m73=831b>;4?::k13?6=3`836=44i2794?=n;10;66g<9;29?l5f2900e>l50;9j71d=831b?9m50;9lfd<722e8;7>5;|`173<72m0;6=u+bc8a3>N4<o1C?964i3794?=n:?0;66g=7;29?l4?2900e>;50;9j7=<722c857>5;h1b>5<<a:h1<75f35`94?=n;=i1<75`b`83>>i4?3:17pl=3c83>a<729q/no4m7:J00c=O;=20e?;50;9j63<722c9;7>5;h0;>5<<a:?1<75f3983>>o413:17d=n:188m6d=831b?9l50;9j71e=831dnl4?::m03?6=3th9?54?:e83>5}#jk0i;6F<4g9K71><a;?1<75f2783>>o5?3:17d<7:188m63=831b?54?::k0=?6=3`9j6=44i2`94?=n;=h1<75f35a94?=hjh0;66a<7;29?xd5;h0;6i4?:1y'fg<e?2B88k5G35:8m73=831b>;4?::k13?6=3`836=44i2794?=n;10;66g<9;29?l5f2900e>l50;9j71d=831b?9m50;9lfd<722e8;7>5;|`17`<72m0;6=u+bc8a3>N4<o1C?964i3794?=n:?0;66g=7;29?l4?2900e>;50;9j7=<722c857>5;h1b>5<<a:h1<75f35`94?=n;=i1<75`b`83>>i4?3:17pl=3b83>a<729q/no4m7:J00c=O;=20e?;50;9j63<722c9;7>5;h0;>5<<a:?1<75f3983>>o413:17d=n:188m6d=831b?9l50;9j71e=831dnl4?::m03?6=3th9?i4?:e83>5}#jk0i;6F<4g9K71><a;?1<75f2783>>o5?3:17d<7:188m63=831b?54?::k0=?6=3`9j6=44i2`94?=n;=h1<75f35a94?=hjh0;66a<7;29?xd5;o0;6i4?:1y'fg<e?2B88k5G35:8m73=831b>;4?::k13?6=3`836=44i2794?=n;10;66g<9;29?l5f2900e>l50;9j71d=831b?9m50;9lfd<722e8;7>5;|`105<72m0;6=u+bc8a3>N4<o1C?964i3794?=n:?0;66g=7;29?l4?2900e>;50;9j7=<722c857>5;h1b>5<<a:h1<75f35`94?=n;=i1<75`b`83>>i4?3:17pl=4083>a<729q/no4m7:J00c=O;=20e?;50;9j63<722c9;7>5;h0;>5<<a:?1<75f3983>>o413:17d=n:188m6d=831b?9l50;9j71e=831dnl4?::m03?6=3th98?4?:e83>5}#jk0i;6F<4g9K71><a;?1<75f2783>>o5?3:17d<7:188m63=831b?54?::k0=?6=3`9j6=44i2`94?=n;=h1<75f35a94?=hjh0;66a<7;29?xd5<?0;6i4?:1y'fg<e?2B88k5G35:8m73=831b>;4?::k13?6=3`836=44i2794?=n;10;66g<9;29?l5f2900e>l50;9j71d=831b?9m50;9lfd<722e8;7>5;|`106<72m0;6=u+bc8a3>N4<o1C?964i3794?=n:?0;66g=7;29?l4?2900e>;50;9j7=<722c857>5;h1b>5<<a:h1<75f35`94?=n;=i1<75`b`83>>i4?3:17pl=4483>a<729q/no4m7:J00c=O;=20e?;50;9j63<722c9;7>5;h0;>5<<a:?1<75f3983>>o413:17d=n:188m6d=831b?9l50;9j71e=831dnl4?::m03?6=3th98:4?:e83>5}#jk0i;6F<4g9K71><a;?1<75f2783>>o5?3:17d<7:188m63=831b?54?::k0=?6=3`9j6=44i2`94?=n;=h1<75f35a94?=hjh0;66a<7;29?xd5<10;6i4?:1y'fg<e?2B88k5G35:8m73=831b>;4?::k13?6=3`836=44i2794?=n;10;66g<9;29?l5f2900e>l50;9j71d=831b?9m50;9lfd<722e8;7>5;|`10<<72m0;6=u+bc8a3>N4<o1C?964i3794?=n:?0;66g=7;29?l4?2900e>;50;9j7=<722c857>5;h1b>5<<a:h1<75f35`94?=n;=i1<75`b`83>>i4?3:17pl=4`83>a<729q/no4m7:J00c=O;=20e?;50;9j63<722c9;7>5;h0;>5<<a:?1<75f3983>>o413:17d=n:188m6d=831b?9l50;9j71e=831dnl4?::m03?6=3th98i4?:e83>5}#jk0i;6F<4g9K71><a;?1<75f2783>>o5?3:17d<7:188m63=831b?54?::k0=?6=3`9j6=44i2`94?=n;=h1<75f35a94?=hjh0;66a<7;29?xd5<k0;6i4?:1y'fg<e?2B88k5G35:8m73=831b>;4?::k13?6=3`836=44i2794?=n;10;66g<9;29?l5f2900e>l50;9j71d=831b?9m50;9lfd<722e8;7>5;|`10f<72m0;6=u+bc8a3>N4<o1C?964i3794?=n:?0;66g=7;29?l4?2900e>;50;9j7=<722c857>5;h1b>5<<a:h1<75f35`94?=n;=i1<75`b`83>>i4?3:17pl=4d83>a<729q/no4m7:J00c=O;=20e?;50;9j63<722c9;7>5;h0;>5<<a:?1<75f3983>>o413:17d=n:188m6d=831b?9l50;9j71e=831dnl4?::m03?6=3th99=4?:e83>5}#jk0i;6F<4g9K71><a;?1<75f2783>>o5?3:17d<7:188m63=831b?54?::k0=?6=3`9j6=44i2`94?=n;=h1<75f35a94?=hjh0;66a<7;29?xd5=80;6i4?:1y'fg<e?2B88k5G35:8m73=831b>;4?::k13?6=3`836=44i2794?=n;10;66g<9;29?l5f2900e>l50;9j71d=831b?9m50;9lfd<722e8;7>5;|`117<72m0;6=u+bc8a3>N4<o1C?964i3794?=n:?0;66g=7;29?l4?2900e>;50;9j7=<722c857>5;h1b>5<<a:h1<75f35`94?=n;=i1<75`b`83>>i4?3:17pl=0483>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd58=0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=0283>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd58;0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=0083>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd5890;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>fd83>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6nm0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>fb83>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6nk0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>f`83>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6n00;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>f983>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6n>0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>f783>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6n<0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>f283>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6n;0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>f083>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6n90;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>eg83>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6ml0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>ee83>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6mj0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>ec83>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6mh0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=0c83>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd58h0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=0883>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd5810;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl=0683>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd58?0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>fg83>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6n=0;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>e883>0<729q/no4;1:J00c=O;=20(9l52:k1`?6=3`8n6=44i2394?=n;<0;66am6;29?xd6m10;684?:1y'fg<392B88k5G35:8 1d=:2c9h7>5;h0f>5<<a:;1<75f3483>>ie>3:17pl>8783>1<729q/no4;2:J00c=O;=20(9l54:k1`?6=3`9>6=44ic794?=hj?0;66sm19594?2=83:p(ol5439K71`<@:>37):m:59j6a<722c897>5;h`6>5<<gk<1<75rb05e>5<2290;w)lm:518L62a3A9?46*;b;68m7b=831b>h4?::k01?6=3`h>6=44oc494?=zj:>96=4<:183!de2<;0D>:i;I17<>"3j3i0e9950;9j0=<722ejj7>5;|`071<72:0;6=u+bc865>N4<o1C?964$5`9g>o3?3:17d:7:188kd`=831vn<><:180>5<7s-hi68?4H26e?M5302.?n7?7;h64>5<<a=21<75`ag83>>{eko0;6>4?:1y'fg<292B88k5G35:8 1d=911b8:4?::k7<?6=3fkm6=44}c3:1?6=;3:1<v*mb;72?M53n2B8855+4c82<>o3?3:17d:7:188kd`=831vn<:n:180>5<7s-hi68?4H26e?M5302.?n7?7;h64>5<<a=21<75`ag83>>{ek:0;6>4?:1y'fg<292B88k5G35:8 1d=911b8:4?::k7<?6=3fkm6=44}ca1>5<4290;w)lm:438L62a3A9?46*;b;3;?l202900e9650;9lec<722wio<4?:283>5}#jk0>=6F<4g9K71><,=h1=55f4683>>o303:17boi:188yge729086=4?{%`a>07<@:>m7E=;8:&7f?7?3`><6=44i5:94?=hio0;66smbg83>6<729q/no4:1:J00c=O;=20(9l5199j02<722c?47>5;nce>5<<ukhn6=4<:183!de2<;0D>:i;I17<>"3j3;37d:8:188m1>=831dmk4?::afa<72:0;6=u+bc865>N4<o1C?964$5`95==n<>0;66g;8;29?jga2900qoll:180>5<7s-hi68?4H26e?M5302.?n7?7;h64>5<<a=21<75`ag83>>{e9>31<7:50;2x gd==:1C?9h4H26;?!2e2:1b8:4?::k7<?6=3`>26=44o`d94?=zj89=6=4;:183!de2<90D>:i;I17<>"3j39n7d:8:188m1>=831b844?::mbb?6=3th:<84?:583>5}#jk0>?6F<4g9K71><,=h1>95f4683>>o303:17d:6:188kd`=831vni?50;694?6|,kh19>5G35d8L62?3->i6?:4i5594?=n<10;66g;9;29?jga2900qo?66;290?6=8r.in7;<;I17b>N4<11/8o4>a:k73?6=3`>36=44i5;94?=hio0;66sm15`94?2=83:p(ol5529K71`<@:>37):m:0c8m11=831b854?::k7=?6=3fkm6=44}c300?6==3:1<v*mb;76?M53n2B8855+4c8g?l202900e9650;9j0<<722c?m7>5;nce>5<<uk;;;7>55;294~"ej3?>7E=;f:J00==#<k0:56g;7;29?l2?2900e9750;9j0d<722ejj7>5;|`g7?6==3:1<v*mb;76?M53n2B8855+4c82=>o3?3:17d:7:188m1?=831b8l4?::mbb?6=3th:?l4?:483>5}#jk0>96F<4g9K71><,=h1=k5f4683>>o303:17d:6:188m1g=831dmk4?::a5=3=8391<7>t$c`914=O;=l0D>:7;%6a>63<a==1<75f4983>>ifn3:17pl>2d83>1<729q/no4:3:J00c=O;=20(9l5269j02<722c?47>5;h6:>5<<ghl1<75rb02;>5<2290;w)lm:478L62a3A9?46*;b;3:?l202900e9650;9j0<<722c?m7>5;nce>5<<ukn?6=4::183!de2<?0D>:i;I17<>"3j3;27d:8:188m1>=831b844?::k7e?6=3fkm6=44}c11g?6=<3:1<v*mb;70?M53n2B8855+4c80g>o3?3:17d:7:188m1?=831dmk4?::a77d=83>1<7>t$c`916=O;=l0D>:7;%6a>6e<a==1<75f4983>>o313:17boi:188yg55i3:187>50z&af?343A9?j6F<499'0g<4k2c?;7>5;h6;>5<<a=31<75`ag83>>{e;;31<7:50;2x gd==:1C?9h4H26;?!2e2:i0e9950;9j0=<722c?57>5;nce>5<<uk9947>54;294~"ej3?87E=;f:J00==#<k08o6g;7;29?l2?2900e9750;9lec<722wi??950;694?6|,kh19>5G35d8L62?3->i6>m4i5594?=n<10;66g;9;29?jga2900qo==6;290?6=8r.in7;<;I17b>N4<11/8o4<c:k73?6=3`>36=44i5;94?=hio0;66sm33794?2=83:p(ol5529K71`<@:>37):m:2a8m11=831b854?::k7=?6=3fkm6=44}c110?6=<3:1<v*mb;70?M53n2B8855+4c80g>o3?3:17d:7:188m1?=831dmk4?::a775=83>1<7>t$c`916=O;=l0D>:7;%6a>6e<a==1<75f4983>>o313:17boi:188yg55:3:187>50z&af?343A9?j6F<499'0g<4k2c?;7>5;h6;>5<<a=31<75`ag83>>{e;;;1<7:50;2x gd==:1C?9h4H26;?!2e2:i0e9950;9j0=<722c?57>5;nce>5<<uk99<7>54;294~"ej3?87E=;f:J00==#<k08o6g;7;29?l2?2900e9750;9lec<722wi?<h50;694?6|,kh19>5G35d8L62?3->i6>m4i5594?=n<10;66g;9;29?jga2900qo=>e;290?6=8r.in7;<;I17b>N4<11/8o4<c:k73?6=3`>36=44i5;94?=hio0;66sm30f94?2=83:p(ol5529K71`<@:>37):m:2a8m11=831b854?::k7=?6=3fkm6=44}c12g?6=<3:1<v*mb;70?M53n2B8855+4c80g>o3?3:17d:7:188m1?=831dmk4?::a74d=83>1<7>t$c`916=O;=l0D>:7;%6a>6e<a==1<75f4983>>o313:17boi:188yg56i3:187>50z&af?343A9?j6F<499'0g<4k2c?;7>5;h6;>5<<a=31<75`ag83>>{e;831<7:50;2x gd==:1C?9h4H26;?!2e2:i0e9950;9j0=<722c?57>5;nce>5<<uk9:47>54;294~"ej3?87E=;f:J00==#<k08o6g;7;29?l2?2900e9750;9lec<722wi?<950;694?6|,kh19>5G35d8L62?3->i6>m4i5594?=n<10;66g;9;29?jga2900qo=>6;290?6=8r.in7;<;I17b>N4<11/8o4<c:k73?6=3`>36=44i5;94?=hio0;66sm30794?2=83:p(ol5529K71`<@:>37):m:2a8m11=831b854?::k7=?6=3fkm6=44}c120?6=<3:1<v*mb;70?M53n2B8855+4c80g>o3?3:17d:7:188m1?=831dmk4?::a745=83>1<7>t$c`916=O;=l0D>:7;%6a>6e<a==1<75f4983>>o313:17boi:188yg56:3:187>50z&af?343A9?j6F<499'0g<4k2c?;7>5;h6;>5<<a=31<75`ag83>>{e;8;1<7:50;2x gd==:1C?9h4H26;?!2e2:i0e9950;9j0=<722c?57>5;nce>5<<uk9:<7>54;294~"ej3?87E=;f:J00==#<k08o6g;7;29?l2?2900e9750;9lec<722wi?=h50;694?6|,kh19>5G35d8L62?3->i6>m4i5594?=n<10;66g;9;29?jga2900qo=?e;290?6=8r.in7;<;I17b>N4<11/8o4<c:k73?6=3`>36=44i5;94?=hio0;66sm31f94?2=83:p(ol5529K71`<@:>37):m:2a8m11=831b854?::k7=?6=3fkm6=44}c13g?6=<3:1<v*mb;70?M53n2B8855+4c80g>o3?3:17d:7:188m1?=831dmk4?::a75d=83>1<7>t$c`916=O;=l0D>:7;%6a>6e<a==1<75f4983>>o313:17boi:188yg5713:187>50z&af?343A9?j6F<499'0g<4k2c?;7>5;h6;>5<<a=31<75`ag83>>{e;9k1<7:50;2x gd==:1C?9h4H26;?!2e2:i0e9950;9j0=<722c?57>5;nce>5<<uk;257>54;294~"ej3?87E=;f:J00==#<k0956g;7;29?l2?2900e9750;9lec<722wi=9k50;694?6|,kh19>5G35d8L62?3->i6?74i5594?=n<10;66g;9;29?jga2900qo?=c;291?6=8r.in7;:;I17b>N4<11/8o47;h64>5<<a=21<75f4883>>o3i3:17boi:188yg7393:197>50z&af?323A9?j6F<499'0g<6l2c?;7>5;h6;>5<<a=31<75f4`83>>ifn3:17pl>4383>0<729q/no4:5:J00c=O;=20(9l51d9j02<722c?47>5;h6:>5<<a=k1<75`ag83>>{e9:n1<7;50;2x gd==<1C?9h4H26;?!2e2;90e9950;9j0=<722c?57>5;h6b>5<<ghl1<75rb063>5<2290;w)lm:478L62a3A9?46*;b;1g?l202900e9650;9j0<<722c?m7>5;nce>5<<uk;3h7>53;294~"ej3?:7E=;f:J00==#<k0<7d:8:188m1>=831dmk4?::a5=4=83?1<7>t$c`910=O;=l0D>:7;%6a>75<a==1<75f4983>>o313:17d:n:188kd`=831vn<6<:186>5<7s-hi68;4H26e?M5302.?n7<<;h64>5<<a=21<75f4883>>o3i3:17boi:188yg7?93:197>50z&af?323A9?j6F<499'0g<b3`><6=44i5:94?=n<00;66g;a;29?jga2900qo?8b;291?6=8r.in7;:;I17b>N4<11/8o4>e:k73?6=3`>36=44i5;94?=n<h0;66anf;29?xd60h0;684?:1y'fg<2=2B88k5G35:8 1d=::1b8:4?::k7<?6=3`>26=44i5c94?=hio0;66sm19`94?3=83:p(ol5549K71`<@:>37):m:318m11=831b854?::k7=?6=3`>j6=44o`d94?=zj8226=4::183!de2<?0D>:i;I17<>"3j3o0e9950;9j0=<722c?57>5;h6b>5<<ghl1<75rb04b>5<4290;w)lm:438L62a3A9?46*;b;03?l202900e9650;9lec<722wi=;l50;194?6|,kh19<5G35d8L62?3->i6?>4i5594?=n<10;66anf;29?xd6>j0;6>4?:1y'fg<292B88k5G35:8 1d=:91b8:4?::k7<?6=3fkm6=44}c35`?6=;3:1<v*mb;72?M53n2B8855+4c814>o3?3:17d:7:188kd`=831vn<=i:186>5<7s-hi68;4H26e?M5302.?n7<=;h64>5<<a=21<75f4883>>o3i3:17boi:188yg70l3:197>50z&af?323A9?j6F<499'0g<5:2c?;7>5;h6;>5<<a=31<75f4`83>>ifn3:17pl>6d83>6<729q/no4:1:J00c=O;=20(9l5219j02<722c?47>5;nce>5<<uk99h7>54;294~"ej3?87E=;f:J00==#<k0=7d:8:188m1>=831b844?::mbb?6=3th8>h4?:583>5}#jk0>?6F<4g9K71><,=h1?6g;7;29?l2?2900e9750;9lec<722wi=4650;794?6|,kh1985G35d8L62?3->i6<l4i5594?=n<10;66g;9;29?l2f2900clh50;9~f42c290>6=4?{%`a>03<@:>m7E=;8:&7f?7e3`><6=44i5:94?=n<00;66g;a;29?jga2900qo?=d;291?6=8r.in7;:;I17b>N4<11/8o47;h64>5<<a=21<75f4883>>o3i3:17boi:188yg7?m3:1?7>50z&af?363A9?j6F<499'0g<03`><6=44i5:94?=hio0;66sm18694?4=83:p(ol54b9K71`<@:>37d:9:188kd`=831vn<:6:181>5<7s-hi69m4H26e?M5302c?:7>5;nce>5<<uk;;57>53;294~"ej3?97E=;f:J00==#<k0:46g;7;29?l2?2900c9k50;9~fa3=8391<7>t$c`917=O;=l0D>:7;%6a>4><a==1<75f4983>>i3m3:17pl>9683>1<729q/no4:4:J00c=O;=20(9l51b9j02<722c?47>5;h6:>5<<g=o1<75rb06`>5<3290;w)lm:468L62a3A9?46*;b;3`?l202900e9650;9j0<<722e?i7>5;|`27`<72<0;6=u+bc862>N4<o1C?964$5`95a=n<>0;66g;8;29?l2>2900e9o50;9l0`<722wi=:m50;794?6|,kh19;5G35d8L62?3->i6<k4i5594?=n<10;66g;9;29?l2f2900c9k50;9~f4>3290>6=4?{%`a>00<@:>m7E=;8:&7f?453`><6=44i5:94?=n<00;66g;a;29?j2b2900qo?7c;291?6=8r.in7;9;I17b>N4<11/8o4=2:k73?6=3`>36=44i5;94?=n<h0;66a;e;29?xd6<:0;694?:1y'fg<2<2B88k5G35:8 1d=:81b8:4?::k7<?6=3`>26=44o5g94?=z{=9;6=48{_604>;6;?0?463>35873>;6;h0?m63>2d87=>;6:j0?;63>2e873>{t<;o1<7<>{_156>X3;11U8>84^274?[24;2T?<<5Q4258Z1653W9=<6P<5g9]70c<V:?o7S=:c:\77`=Y<:n0R9=l;_60f>X3;h1U8?j4^50`?[25j2T?>l5Q43;896372=>01>=j:27896572:?01>=m:278965f2:?01>=6:278965?2:?01>:9:27896222:?01<8::c:8yv70n3:1>vP<599>52`=j?1v9==:184[24:278>k4<1:?07a<e=278?n4m5:?07`<e=278?=4m5:?07g<e=2wx=>650;0xZ6`134;847l9;|q705<72<qU89>4=0:g>11<5:8o6974=20f>11<582n6994}r61<?6=?;qU8?64=01a>7b<5:996?j4=212>7b<5:9;6?j4=21b>7b<5:926?j4=21;>7b<58::6?j4=023>7b<5ol1>i52fd81`>;al38o70?=7;0g?875>38o70?=5;0g?875<38o70?=3;0g?876l38o70?>c;0g?876j38o70?>a;0g?876138o70ji:3f89ac=:m16hi4=d:?gg?4c34ni6?j4=07:>7b<58?36?j4=075>7b<58?>6?j4=074>7b<58<86?j4=041>7b<58<:6?j4=043>7b<58?m6?j4=014>7b<58936?j4=011>7b<589:6?j4=3g6>7b<5;o=6?j4=3d2>7b<5;lh6?j4=220>7b<5::?6?j4=226>7b<5::=6?j4=224>7b<5::36?j4=3g4>7b<5;o36?j4=3g:>7b<5;oj6?j4=3ga>7b<5;oh6?j4=3gg>7b<5;on6?j4=3ge>7b<5;l;6?j4=3d1>7b<5;l86?j4=3d7>7b<5;l>6?j4=3d5>7b<5;l<6?j4=3d;>7b<5;l26?j4=3db>7b<5;li6?j4=3dg>7b<5;ln6?j4=3de>7b<5::;6?j4=222>7b<5::96?j4=326>7b<5;:?6?j4=320>7b<5;:96?j4=322>7b<5;:;6?j4=0df>7b<58lo6?j4=0d`>7b<58li6?j4=0db>7b<58l26?j4=0d;>7b<58l<6?j4=0d5>7b<58l>6?j4=0d0>7b<58l96?j4=0d2>7b<58l;6?j4=0ge>7b<58on6?j4=0gg>7b<58oh6?j4=0ga>7b<58oj6?j4=32a>7b<5;:j6?j4=32:>7b<5;:36?j4=324>7b<5;:=6?j4=0de>7b<58l?6?j4=0g:>7b<58o36?j4}r3;3?6=:rT8jn521959f3=z{=926=470z\77<=:;;l1>i5232f96a=:;=:1>i5232a96a=:;:o1>i5232d96a=:;:h1>i5235496a=:;=?1>i52ce81`>;dk38o70mm:3f89fg=:m16o44=d:?e7?4c34l96?j4=g396a=:n909h63jf;0g?8c>2;n01h652e9>a2<5l27n:7<k;<g6>7b<58;86?j4=031>7b<58;:6?j4=033>7b<58:m6?j4=057>7b<58=86?j4=054>7b<58k?6?j4=0c0>7b<58k:6?j4=0c3>7b<58k96?j4=0c`>7b<58kj6?j4=0ca>7b<58ko6?j4=0cf>7b<58h=6?j4=0`7>7b<58h>6?j4=0`4>7b<58h36?j4=0a1>7b<58i:6?j4=0a3>7b<58hm6?j4=0`f>7b<5;:o6>:m;<02<?53j279>>4<4c9>612=;=h01?<j:26a?844139?n63=4g800g=::<91?9l4=377>62e348;i7=;b:?154<4<k16>=h535`897772:>i70<>2;17f>;59:088o52206971d<5;;>6>:m;<02=?53j279=;4<4c9>641=;=h01??n:26a?846j39?n63=1b800g=::8n1?9l4=303>62e348:i7=;b:?15c<4<k16>??535`897452:>i70<=4;17f>;5:<088o5223:971d<5;8=6>:m;<013?53j279>44<4c9>67g=;=h01?<m:26a?845k39?n63=31800g=::;n1?9l4=30e>62e3488=7=;b:?177<4<k16>>=535`897532:>i70<<7;17f>;5;<088o52224971d<5;9i6>:m;<00<?53j279?l4<4c9>66c=;=h01?=l:26a?844l39?n63=3g800g=::=:1?9l4=362>62e348?>7=;b:?103<4<k16>9=535`897222:>i70<;7;17f>;5<1088o5225;971d<5;>j6>:m;<07`?53j2798o4<4c9>61e=;=h01?:j:26a?842839?n63=50800g=::<81?9l4=0:5>7b<582<6?j4=05e>7b<uz;<;7>52z\750=:9>=1n;5rs0g3>5<5sW9h563=048a2>{t9ml1<7<t^2a;?847<3h=7p}>dd83>7}Y;j=01?><:c48yv7cl3:1>vP<c79>654=j?1v<jl:181[5d=279<<4m6:p5ad=838pR>m;;<034?d13ty:h44?:3y]7f4<58ln6o84}r3g<?6=:rT8o<521gf9f3=z{8n<6=4={_1`4>;6nj0i:6s|1e494?4|V:hm70?ib;`5?xu6l<0;6?uQ3cg894`f2k<0q~?k4;296~X4jm16=k75b79~w4b42909wS=mc:?2b=<e>2wx=i<50;0xZ6de34;m;7l9;|q2`4<72;qU?oo4=0d5>g0<uz;o<7>52z\0f<=:9o?1n;5rs0af>5<5sW9i;63>f28a2>{t9jn1<7<t^2`5?87a:3h=7p}>cb83>7}Y;k?01<h>:c48yv7dj3:1>vP<b59>5c6=j?1v<mn:181[5e;27:ik4m6:p5f?=838pR>l=;<3fa?d13ty:o54?:3y]7g7<58oo6o84}r3`3?6=:rT8n=521da9f3=z{8i=6=4={_1bb>;6mk0i:6s|1b794?4|V:kn70?ja;`5?xu6m>0;6?uQ3bd8976e2k<0q~?j6;296~X4kl16>=o5b79~w4c22909wS=ld:?14<<e>2wx=h:50;0xZ6ed348;47l9;|q2a6<72;qU?nl4=324>g0<uz;n>7>52z\0gd=::9<1n;5rs0g2>5<5sW9h?63>fg8a2>{t9mk1<7<t^2`;?87a<3h=7p}>cg83>7}Y;hn01<k6:c48yv7d<3:1>vP<ab9>5`>=j?1v>o;:180[5?82799<4<5:?117<4=2wx?l<50;1xZ61a348?i7=:;<064?523ty8m<4?:2y]72c<5;>o6>;4=36`>63<uz9j<7>53z\03a=::=k1?85225`970=z{:3m6=4<{_14g>;5<108963=48801>{t;0o1<7=t^25a?843>39>70<;7;16?xu41j0;6>uQ36;897242:?01?:::278yv5>j3:1?vP<799>617=;<16>9<5349~w6?f2908wS=87:?17c<4=2798=4<5:p7<?=839pR>99;<00a?523488h7=:;|q0==<72:qU?:;4=31a>63<5;9h6>;4}r1:3?6=;rT8;95222:970=:::k1?85rs2;5>5<4sW9<?63=36801>;5;?0896s|38794?5|V:=970<<4;16?844=39>7p}<9583>6}Y;>;01?==:27897542:?0q~=63;297~X4?916>>>5349>667=;<1v>7>:180[51m279>i4<5:?16c<4=2wx?4>50;1xZ60c3489n7=:;<01g?523ty84k4?:2y]73e<5;826>;4=30b>63<uz93i7>53z\02g=::;21?852235970=z{:2o6=4<{_15e>;5:<08963=27801>{t;1i1<7=t^24:?845:39>70<=4;16?xu40k0;6>uQ37:897472:?01?<>:278yv5?i3:1?vP<669>64c=;<16><h5349~w6>>2908wS=96:?15f<4=279=i4<5:p7=>=839pR>8:;<02e?52348:n7=:;|q0eg<72:qU?584=33:>63<5;;<6>;4}r1be?6=;rT84852207970=::8<1?85rs2c:>5<4sW93863=12801>;59=0896s|3`:94?5|V:2870<>1;16?846:39>7p}<a683>6}Y;1801?>i:27897772:?0q~=n6;297~X40816>8:5349>65c=;<1v>o::180[50i2798k4<5:?116<4=2wx?4j50;1xZ60a348?87=:;<00=?523ty85?4?:2y]732<5;886>;4=30f>63<uz93;7>53z\026=::9n1?85220:970=z{<h1<7<t=272>g7<58<>6>>4}r30g?6=:r7:?o4<5:?205<fn2wx?>950;33874j3h>70=<a;`5?872139:70?:8;12?872>39:70?:5;`6?872?39:70?93;12?871:39:70?91;12?871839:70?:f;12?874?3h>70?<8;`6?874:39:70?<1;12?xu6;k0;69u212`9f3=:9:>18l5213a90==:9;n1855rs21g>5<5s499j7=:;<10`?d13ty8>k4?:4y>77`=j?16=:75489>5=3=<116=5?5469>5=?=<>1v>=l:185854l39>70=<c;`5?870?3h>70?76;`6?87??3h>70?8f;`6?xu4;80;6>u2320970=:;:;1n;5232296`=z{:996=4={<106?d1349887:8;|q07c<72:q6?9>5349>76c=:l16?>h5b79~w6272909w0=;0;`5?853:3><7p}<3c83>7}:;:i1?85232`9f3=z{:9;6=4<{<105?523498<7l9;<100?2?3ty8?h4?:2y>76c=j?16?>h5349>714=<11v>=<:187854i3h>70=<9;`6?85403h>70=<4;ce?xu4;?0;6<;t=21:>g0<58::6>?4=023>67<5ol1?<52fd805>;al39:70?=7;12?875>39:70?=5;12?875<39:70?=3;12?876l39:70?>c;12?876j39:70?>a;12?876139:70ji:2389ac=;816hi4<1:?gg?5634ni6>?4}r101?6=<0q6?>65b79>6`3=;816>h85309>6c7=;816>km5309>755=;816?=:5309>753=;816?=85309>751=;816?=65309>6`1=;816>h65309>6`?=;816>ho5309>6`d=;816>hm5309>6`b=;816>hk5309>6``=;816>k>5309>6c4=;816>k=5309>6c2=;816>k;5309>6c0=;816>k95309>6c>=;816>k75309>6cg=;816>kl5309>6cb=;816>kk5309>6c`=;816?=>5309>757=;816?=<5309>653=;816>=:5309>655=;816>=<5309>657=;816>=>5309>5cc=;816=kj5309>5ce=;816=kl5309>5cg=;816=k75309>5c>=;816=k95309>5c0=;816=k;5309>5c5=;816=k<5309>5c7=;816=k>5309>5``=;816=hk5309>5`b=;816=hm5309>5`d=;816=ho5309>65d=;816>=o5309>65?=;816>=65309>651=;816>=85309>5c`=;816=k:5309>5`?=;816=h65309~w6262908w0=;6;`6?853=3h>70=;2;ce?xu4<=0;6<9t=265>g0<58=?6>?4=050>67<58k?6>?4=0c0>67<58k:6o;4=0c3>g3<58k96>?4=0c`>67<58kj6>?4=0ca>g3<58ko6>?4=0cf>67<58h=6>?4=0`7>g3<58h>6>?4=0`4>67<58h36>?4=0a1>67<58i:6>?4=0a3>67<58hm6>?4=0`f>67<uz9??7>514y>713=j?16oi4<1:?`g?5634ii6>?4=bc974=:k008=63i3;12?8`52:;01k?5309>b5<4927nj7=>;<g:>67<5l21?<52e6805>;b>39:70k::23894742:;01<?=:23894762:;01<??:238946a2:;0q~kj:1858ec2:?01k=5b79>gc<3027o=7:8;<f0>1?<5m>1845rsb:94?3|5jn1n;52190902=:9>h18l5219c902=:9?o1855rsbg94?4|5ji1?852cg8bb>{tk>0;68u2cb8a2>;60;0?563>8c873>;6>m0?463>7b87e>{tl90;6?u2cc801>;c93km7p}l6;291~;dj3h=70?73;64?87?j3>270?9c;6;?870k3>27p}k2;296~;di39>70j<:`d8yve2290>w0mn:c4894>42=301<9m:5;894>f2=301<8m:5:8yvb32909w0m6:2789a2=io1vn:50;7x9f?=j?16=;o5499>52b=<116=5:5469>5=e=<11v<<=:185877939>70?=7;`5?877;3>370??5;64?877?3>270??8;6:?xuak3:1?v3>008a2>;6<80?463>3e87<>{t9981<7<t=023>63<58:86lh4}rda>5<4s4;;<7l9;<376?2?34;8h7:n;|q241<72;q6jk4<5:?240<fn2wxjl4?:2y>bc<e>27:8?4;7:?27`<302wx==850;0x9cc=;<16==95ag9~wc?=839p1kk5b79>517=<>16=>k5469~w46?2909w0hk:278946?2hl0q~h7:1808`c2k<01<=i:55894242==0q~?>8;296~;6:>08963>1e8a2>{t98=1<7<t=005>63<58;h6o84}r315?6==r7:>;4m6:?246<3?27:<84;8:?242<3i27:<44;7:p540=838p1<<::278947e2k<0q~?=0;290~;6:<0i:63>0487=>;68>0?;63>0887<>{t98?1<7<t=007>63<58;j6o84}r32b?6=;r7:>94m6:?242<3027:<54;7:p542=838p1<<<:278947>2k<0q~?>e;296~;6::0i:63>0987<>{tm=0;6?u2f2801>;b13h=7p}j3;296~;a:39>70k7:c48yvcc290>w0h=:c489f`=<>16h<4;8:?g7?2f34n>6994}rg1>5<5s4l:6>;4=d59f3=z{li1<7:t=g39f3=:l80?563k3;64?8b22=20q~k>:1818`72:?01h85b79~w`d=839p1k>5b79>`6<3027o87:8;|qf4?6=:r7nj7=:;<g6>g0<uzoj6=4={<ge>g0<5m>1855rs02f>5<5s4;:h7=:;<327?d13ty:<i4?:3y>54e=;<16=<<5b79~w46d2909w0?>b;16?87693h=7p}>0c83>7}:98k1?8521029f3=z{8:j6=4={<32=?5234;;j7l9;|qge?6=:r7n57=:;<fe>g0<uzn26=4={<g;>63<5mo1n;5rse:94?4|5l=1?852de8a2>{tl>0;6?u2e7801>;ck3h=7p}k6;296~;b=39>70jm:c48yv72m3:1>5u2dg801>;6>:0i:63mc;64?855k3><70==b;64?855i3><70==9;64?85503><70==7;64?855>3><70==5;64?855<3><70==3;64?855:3><70==1;64?85583><70=>f;64?856m3><70=>d;64?856k3><70=>b;64?856i3><70=>9;64?85603><70=>7;64?856>3><70=>5;64?856<3><70=>3;64?856:3><70=>1;64?85683><70=?f;64?857m3><70=?d;64?857k3><70=?b;64?85713><70=?a;64?87393>27p}i4;296~;cm39>70ll:`d8yv`22909w0jk:2789gb=io1vk850;0x9ae=;<16nh4nf:pb2<72;q6ho4<5:?ab?ga3ty:ni4?:4y>545=;<16=n<5b79>g5<3?278>i4;8:?06`<302wx=?650;0x94752:?01n>5ag9~w44>2909w0?>1;16?8e62hl0q~?=a;296~;69908963l2;ce?xu6:k0;6?u211d970=:k:0jj6s|13a94?4as4;>57<j;<36<?4b34;>:7<j;<361?4b34;>;7<j;<357?4b34;=>7<j;<355?4b34;=<7<j;<36b?4b348n97<j;<0f2?4b348m=7<j;<0eg?4b349;?7<j;<130?4b349;97<j;<132?4b349;;7<j;<13<?4b348n;7<j;<0f<?4b348n57<j;<0fe?4b348nn7<j;<0fg?4b348nh7<j;<0fa?4b348nj7<j;<0e4?4b348m>7<j;<0e7?4b348m87<j;<0e1?4b348m:7<j;<0e3?4b348m47<j;<0e=?4b348mm7<j;<0ef?4b348mh7<j;<0ea?4b348mj7<j;<134?4b349;=7<j;<136?4b34;9h7oi;|q20=<72;q6=875349>51c=io1v<;;:18787213h=70?93;16?873m3><70?<d;64?xu6<>0;6?u214:970=:9=n1mk5rs070>5<2s4;>47l9;<356?5234;?i7:7;<30`?2>34;?h7:8;|q200<72;q6=885349>51g=io1v<;>:184872>3h=70?90;16?873i3>370?;b;6:?873l3>270?;c;6;?874m3>j7p}>4583>7}:9<?1?85215;9ec=z{8?;6=47{<361?d134;>j7=:;<37e?2034;?n7:7;<30b?2?34;?h7:7;<37=?2134;?o7:8;|q203<72;q6=895349>51d=io1v<;=:185872?3h=70?91;16?873j3><70?;d;6b?873k3>270?<e;6:?xu6=m0;69mt=041>g0<5;:o6>l4=33;>6d<5;886>l4=367>6d<5;8n6>l4=31:>6d<5;>m6>l4=370>6d<5;??6>l4=32f>6d<5;;:6>l4=32e>6d<5;;;6>l4=331>6d<5;;86>l4=337>6d<5;;>6>l4=33:>6d<5;;=6>l4=334>6d<5;;j6>l4=33a>6d<5;;h6>l4=33g>6d<5;8;6>l4=33f>6d<5;;m6>l4=302>6d<5;896>l4=307>6d<5;8>6>l4=30;>6d<5;8=6>l4=304>6d<5;826>l4=30b>6d<5;8i6>l4=30`>6d<5;9;6>l4=30g>6d<5;8m6>l4=312>6d<5;996>l4=310>6d<5;9?6>l4=314>6d<5;9>6>l4=315>6d<5;9i6>l4=31;>6d<5;9j6>l4=31f>6d<5;9h6>l4=31g>6d<5;9m6>l4=363>6d<5;>:6>l4=361>6d<5;>=6>l4=360>6d<5;>>6>l4=364>6d<5;>36>l4=36:>6d<5;>j6>l4=36g>6d<5;>i6>l4=36`>6d<5;>n6>l4=373>6d<5;?:6>l4=371>6d<5kn18:52bb87<>;6<;0?m6s|14a94?2ds4;==7l9;<03`?5f348:47=n;<017?5f348?87=n;<01a?5f348857=n;<07b?5f348>?7=n;<060?5f348;i7=n;<025?5f348;j7=n;<024?5f348:>7=n;<027?5f348:87=n;<021?5f348:57=n;<022?5f348:;7=n;<02e?5f348:n7=n;<02g?5f348:h7=n;<014?5f348:i7=n;<02b?5f3489=7=n;<016?5f348987=n;<011?5f348947=n;<012?5f3489;7=n;<01=?5f3489m7=n;<01f?5f3489o7=n;<004?5f3489h7=n;<01b?5f3488=7=n;<006?5f3488?7=n;<000?5f3488;7=n;<001?5f3488:7=n;<00f?5f348847=n;<00e?5f3488i7=n;<00g?5f3488h7=n;<00b?5f348?<7=n;<075?5f348?>7=n;<072?5f348??7=n;<071?5f348?;7=n;<07<?5f348?57=n;<07e?5f348?h7=n;<07f?5f348?o7=n;<07a?5f348><7=n;<065?5f348>>7=n;<`f>11<5kn1855215090<=z{8?i6=4;cz?225<e>279<i4<9:?15=<41279>>4<9:?101<41279>h4<9:?17<<412798k4<9:?116<41279994<9:?14`<41279=<4<9:?14c<41279==4<9:?157<41279=>4<9:?151<41279=84<9:?15<<41279=;4<9:?152<41279=l4<9:?15g<41279=n4<9:?15a<41279>=4<9:?15`<41279=k4<9:?164<41279>?4<9:?161<41279>84<9:?16=<41279>;4<9:?162<41279>44<9:?16d<41279>o4<9:?16f<41279?=4<9:?16a<41279>k4<9:?174<41279??4<9:?176<41279?94<9:?172<41279?84<9:?173<41279?o4<9:?17=<41279?l4<9:?17`<41279?n4<9:?17a<41279?k4<9:?105<412798<4<9:?107<412798;4<9:?106<41279884<9:?102<41279854<9:?10<<412798l4<9:?10a<412798o4<9:?10f<412798h4<9:?115<412799<4<9:?117<4127ij7:8;<`f>1><58>:69o4}r36e?6=<kq6=8h5b79>65b=;116><65399>675=;116>9:5399>67c=;116>>75399>61`=;116>8=5399>602=;116>=k5399>647=;116>=h5399>646=;116><<5399>645=;116><:5399>643=;116><75399>640=;116><95399>64g=;116><l5399>64e=;116><j5399>676=;116><k5399>64`=;116>??5399>674=;116>?:5399>673=;116>?65399>670=;116>?95399>67?=;116>?o5399>67d=;116>?m5399>666=;116>?j5399>67`=;116>>?5399>664=;116>>=5399>662=;116>>95399>663=;116>>85399>66d=;116>>65399>66g=;116>>k5399>66e=;116>>j5399>66`=;116>9>5399>617=;116>9<5399>610=;116>9=5399>613=;116>995399>61>=;116>975399>61g=;116>9j5399>61d=;116>9m5399>61c=;116>8>5399>607=;116>8<5399>fc<3027:8>4;8:p56?=839p1<=8:278945?2:?01<=n:`d8yv74?3:1>v3>368a2>;6;h0?;6s|12194?4|58996>;4=017>d`<uz;8<7>57z?277<e>27:?;4;9:?271<3127:?l4;9:?26`<3?27:>n4;9:?26a<312wx=>;50;0x94562:?01<=9:`d8yv75n3:1;v3>308a2>;6;?0?;63>3587<>;6;h0?463>2d87<>;6:j0?m63>2e87e>{t9?31<7<t=053>66<58<26lh4}r35a?6=:r7:;=4;d:?22`<fn2wx=:850;0x94172hl01<9;:278yv7103:1?v3>6g804>;6>008<63>698bb>{t9?n1<7=t=04e>1b<58<26o64=04g>d`<uz;<97>52z?22c<fn27:;>4<5:p5g4=83?p1<86:24894d02k<01<m>:27894>e2=201<8k:558yv71?3:1>v3>69804>;6>>0jj6s|1c394?3|58<36>84=0`5>g0<58i;6>;4=0:a>1g<58<h6994}r35g?6=:r7::54m8:?22f<fn2wx=;850;0x94002::01<89:`d8yv7e83:19v3>66802>;6j<0i:63>bg801>;60h0?m63>6c873>{t9?h1<7<t=044>g><58<i6lh4}r351?6=:r7::;4<0:?220<fn2wx=lh50;7x94012:<01<l;:c4894db2:?01<8n:55894>d2==0q~?9a;296~;6>?0i463>6`8bb>{t91n1<7?8{<351?5134;j87<j;<3b7?4b34;j=7<j;<3b4?4b34;j>7<j;<3bg?4b34;jm7<j;<3bf?4b34;jh7<j;<3ba?4b34;i:7<j;<3a0?4b34;i97<j;<3a3?4b34;i47<j;<3`6?4b34;h=7<j;<3`4?4b34;ij7<j;<3aa?4b34;3i7oi;<3;0?2f3ty:;?4?:3y>522=j?16=:75499~w4162909w0?83;`5?87013><7p}>7`83>6}:9>=1>h5216d96`=:91?1mk5rs05;>5<5s4;<;7=:;<34=?ga3ty:5>4?:3y>5d2=;<16=475ag9~w4?a290?w0?n4;`5?87fm39>70?69;64?87?:3>37p}>9383>7}:9h91?85218:9ec=z{83n6=4:{<3b7?d134;jh7=:;<3:=?2?34;3>7:n;<3:<?203ty:5=4?:3y>5d7=;<16=4;5ag9~w4?d290<w0?n1;`5?87fj39>70?65;64?87>>3>270?73;6b?87>03>270?67;6;?xu60o0;6?u21`2970=:90>1mk5rs0;a>5<?s4;j<7l9;<3be?5234;297:7;<3:2?2?34;247:7;<3:0?2134;2;7:8;<3;0?2?3ty:5<4?:3y>5d4=;<16=485ag9~w4?c290=w0?n2;`5?87fk39>70?66;64?87?;3>370?68;6b?87>?3>27p}>a683>6}:9hi1n;521c4970=:9>i18:5rs0c6>5<4s4;jm7l9;<3a0?5234;<h7:8;|q2e3<72:q6=ll5b79>5g3=;<16=:l5469~w4g?2908w0?nd;`5?87e?39>70?8c;6;?xu6i00;6>u21`g9f3=:9k21?85216`90==z{8h86=4;{<3a<?d134;h>7=:;<3;e?2?34;=i7:8;|q2ff<72=hp1<m>:c48976c2;201??7:3:897442;201?:;:3:8974b2;201?=6:3:8972a2;201?;<:3:897332;201?>j:3:897762;201?>i:3:897772;201??=:3:897742;201??;:3:897722;201??6:3:897712;201??8:3:8977f2;201??m:3:8977d2;201??k:3:897472;201??j:3:8977a2;201?<>:3:897452;201?<;:3:897422;201?<7:3:897412;201?<8:3:8974>2;201?<n:3:8974e2;201?<l:3:897572;201?<k:3:8974a2;201?=>:3:897552;201?=<:3:897532;201?=8:3:897522;201?=9:3:8975e2;201?=7:3:8975f2;201?=j:3:8975d2;201?=k:3:8975a2;201?:?:3:897262;201?:=:3:897212;201?:<:3:897222;201?:8:3:8972?2;201?:6:3:8972f2;201?:k:3:8972e2;201?:l:3:8972b2;201?;?:3:897362;201?;=:3:89f7=<>16o=4;8:p5gd=83>iw0?l0;`5?847l38<70<>8;04?845;38<70<;4;04?845m38<70<<9;04?843n38<70<:3;04?842<38<70<?e;04?846938<70<?f;04?846838<70<>2;04?846;38<70<>4;04?846=38<70<>9;04?846>38<70<>7;04?846i38<70<>b;04?846k38<70<>d;04?845838<70<>e;04?846n38<70<=1;04?845:38<70<=4;04?845=38<70<=8;04?845>38<70<=7;04?845138<70<=a;04?845j38<70<=c;04?844838<70<=d;04?845n38<70<<1;04?844:38<70<<3;04?844<38<70<<7;04?844=38<70<<6;04?844j38<70<<8;04?844i38<70<<e;04?844k38<70<<d;04?844n38<70<;0;04?843938<70<;2;04?843>38<70<;3;04?843=38<70<;7;04?843038<70<;9;04?843i38<70<;d;04?843j38<70<;c;04?843m38<70<:0;04?842938<70<:2;04?8e52==01n?5499~w4df290?nv3>bg8a2>;58m09:63=19812>;5::09:63=45812>;5:l09:63=38812>;5<o09:63=52812>;5==09:63=0d812>;59809:63=0g812>;59909:63=13812>;59:09:63=15812>;59<09:63=18812>;59?09:63=16812>;59h09:63=1c812>;59j09:63=1e812>;5:909:63=1d812>;59o09:63=20812>;5:;09:63=25812>;5:<09:63=29812>;5:?09:63=26812>;5:009:63=2`812>;5:k09:63=2b812>;5;909:63=2e812>;5:o09:63=30812>;5;;09:63=32812>;5;=09:63=36812>;5;<09:63=37812>;5;k09:63=39812>;5;h09:63=3d812>;5;j09:63=3e812>;5;o09:63=41812>;5<809:63=43812>;5<?09:63=42812>;5<<09:63=46812>;5<109:63=48812>;5<h09:63=4e812>;5<k09:63=4b812>;5<l09:63=51812>;5=809:63=53812>;d;3><70m=:5:8yv7e13:18lu21cg9f3=::9n1>85220:960=::;91>852256960=::;o1>85222;960=::=l1>852241960=::<>1>85221g960=::8;1>85221d960=::8:1>852200960=::891>852206960=::8?1>85220;960=::8<1>852205960=::8k1>85220`960=::8i1>85220f960=::;:1>85220g960=::8l1>852233960=::;81>852236960=::;?1>85223:960=::;<1>852235960=::;31>85223c960=::;h1>85223a960=::::1>85223f960=::;l1>852223960=:::81>852221960=:::>1>852225960=:::?1>852224960=:::h1>85222:960=:::k1>85222g960=:::i1>85222f960=:::l1>852252960=::=;1>852250960=::=<1>852251960=::=?1>852255960=::=21>85225;960=::=k1>85225f960=::=h1>85225a960=::=o1>852242960=::<;1>852240960=:k:0?46s|28f94?4|5;o>6>;4=22b>d`<uz8h=7>52z?1a0<e>27:i54<5:p6d>=838p1?k9:278966e2hl0q~<lc;296~;5m?0i:63>e8801>{t:k91<7<t=3d2>63<5:;=6lh4}r0g3?6=:r79j<4m6:?2b1<4=2wx>oo50;0x97`d2:?01><>:`d8yv4cm3:1>v3=fb8a2>;6no0896s|2c`94?4|5::86>;4=204>d`<uz8oj7>52z?046<e>279<;4<5:p6ge=838p1>>;:278964?2hl0q~<j0;296~;48=0i:63=06801>{t:kn1<7<t=226>63<5:826lh4}r0f5?6=:r78<84m6:?14=<4=2wx>ok50;0x96612:?01><n:`d8yv4b:3:1>v3<078a2>;5800896s|2cd94?4|5::<6>;4=20a>d`<uz8n?7>52z?042<e>279<l4<5:p6f6=838p1>>7:278964d2hl0q~<j4;296~;4810i:63=0c801>{t:0o1<7<t=3g4>63<5::26lh4}r0`6?6=:r79i:4m6:?2ad<4=2wx>4h50;0x97c?2:?01>>l:`d8yv4d;3:1>v3=e98a2>;6mk0896s|2`294?4|5;o26>;4=22g>d`<uz8h87>52z?1a<<e>27:in4<5:p6d7=838p1?kn:278966b2hl0q~<l5;296~;5mh0i:63>ee801>{t:h81<7<t=3ga>63<5::m6lh4}r0`2?6=:r79io4m6:?2a`<4=2wx>l=50;0x97cd2:?01>??:`d8yv4d?3:1>v3=eb8a2>;6mo0896s|2`694?4|5;oo6>;4=232>d`<uz8h47>52z?1aa<e>27:j=4<5:p6d3=838p1?kj:27896752hl0q~<l9;296~;5ml0i:63>f0801>{t:h<1<7<t=3ge>63<5:;86lh4}r0`e?6=:r79ik4m6:?2b7<4=2wx>l950;0x97`72:?01>?;:`d8yv4dj3:1>v3=f18a2>;6n:0896s|2`;94?4|5;l96>;4=236>d`<uz8hh7>52z?1b7<e>27:j84<5:p6dg=838p1?h<:27896702hl0q~<le;296~;5n:0i:63>f7801>{t:hh1<7<t=3d7>63<5:;36lh4}r0`b?6=:r79j94m6:?2b2<4=2wx>lm50;0x97`22:?01>?6:`d8yv4c83:1>v3=f48a2>;6n10896s|2`f94?4|5;l=6>;4=23b>d`<uz8o=7>52z?1b3<e>27:j44<5:p6dc=838p1?h8:278967e2hl0q~<k2;296~;5n>0i:63>f`801>{t:hl1<7<t=3d;>63<5:;h6lh4}r0g7?6=:r79j54m6:?2bg<4=2wx>o>50;0x97`>2:?01>?k:`d8yv4c<3:1>v3=f88a2>;6nj0896s|2c394?4|5;lj6>;4=23f>d`<uz8o97>52z?1bd<e>27:ji4<5:p6g4=838p1?hm:278967a2hl0q~<k6;296~;5nk0i:63>fd801>{t:k>1<7<t=3dg>63<5:8;6lh4}r0g<?6=:r79ji4m6:?145<4=2wx>o;50;0x97`b2:?01><=:`d8yv4c13:1>v3=fd8a2>;5880896s|2c494?4|5;lm6>;4=200>d`<uz8om7>52z?1bc<e>279<?4<5:p6g1=838p1>>?:27896432hl0q~<kb;296~;4890i:63=02801>{t:k21<7<t=222>63<5:8>6lh4}r0gg?6=:r78<<4m6:?141<4=2wx>o750;0x96652:?01><9:`d8yv4cl3:1>v3<038a2>;58<0896s|33f94?42s48;h7=;c:?166<4<j16>>7535a8972a2:>h70<:4;17g>;598088n5221d971e<5;;86>:l;<021?53k279=:4<4b9>64g=;=i01??l:26`?845839?o63=1d800f=::;81?9m4=306>62d3489;7=;c:?16<<4<j16>?l535a897572:>h70<=d;17g>;5;;088n52226971e<5;9=6>:l;<00f?53k279?54<4b9>66b=;=i01?=i:26`?843939?o63=47800f=::=91?9m4=36;>62d348?m7=;c:?10f<4<j16>9k535a897362:>h70==d;ce?xu5080;6?u221f972=:;9k1855rs20f>5<5=r79=54<4b9>612=;=i01?<j:26`?842;39?o63=0d800f=::8:1?9m4=331>62d348:87=;c:?15<<4<j16><8535a8977e2:>h70<>d;17g>;59o088n52233971e<5;8?6>:l;<01<?53k279>;4<4b9>67g=;=i01?<l:26`?845n39?o63=30800f=:::91?9m4=314>62d348897=;c:?17d<4<j16>>k535a8975d2:>h70<;0;17g>;5<;088n52257971e<5;><6>:l;<07=?53k2798i4<4b9>61d=;=i01?;?:26`?842:39?o63<2d8bb>{t:1i1<7<t=33;>61<5::j6974}r0:3?6=:r79>>4<7:?04g<302wx>;h50;0x97232:=01>?9:5;8yv42i3:1>v3=2d803>;48k0?56s|27794?4|5;926>94=235>1><uz8<<7>52z?10c<4?278><4;8:p627=838p1?;<:25896462=30q~<82;296~;5==08;63<2687<>{t:>91<7<t=32f>61<5:8<6974}r042?6=:r79=<4<7:?06<<302wx>::50;0x976a2:=01><7:5:8yv40=3:1>v3=11803>;4:10?56s|26594?4|5;;96>94=20:>1?<uz8<47>52z?156<4?278>l4;8:p62?=838p1??;:258964f2=30q~<8a;296~;59<08;63<2c87<>{t:>n1<7<t=33:>61<5:8h6974}r04f?6=:r79=;4<7:?06g<312wx>:m50;0x97702:=01><l:5:8yv40m3:1>v3=1`803>;4800?46s|26d94?4|5;;i6>94=22:>1?<uz83<7>52z?15f<4?278<n4;8:p6=4=838p1??k:258966d2=30q~<75;296~;5:908;63<0d87<>{t:191<7<t=33f>61<5::o6964}r0;0?6=:r79=k4<7:?04a<312wx>5850;0x97462:=01>>j:5;8yv4??3:1>v3=23803>;48o0?46s|29:94?4|5;8?6>94=22e>1?<uz8357>52z?160<4?278==4;8:p6=b=838p1?<7:25896762=30q~<7a;296~;5:?08;63<1187=>{t:1h1<7<t=304>61<5:;:6964}r0;a?6=:r79>44<7:?057<302wx>5h50;0x974f2:=01>?=:5;8yv4>83:1>v3=2c803>;49:0?46s|28394?4|5;8h6>94=230>1?<uz8287>52z?175<4?278=84;8:p6<4=838p1?<k:25896732=20q~<63;296~;5:o08;63<1587=>{t:0?1<7<t=312>61<5:;>6974}r0:2?6=:r79??4<7:?052<302wx>4650;0x97542:=01>?8:5;8yv4>13:1>v3=35803>;4910?46s|28a94?4|5;9<6>94=23:>1?<uz82m7>52z?170<4?278=54;9:p6<d=838p1?=9:258967>2=20q~<:7;296~;5;k08;63<1c87<>{t:<?1<7<t=31;>61<5:;j6964}r062?6=:r79?l4<7:?05d<312wx>8l50;0x975b2:=01>?l:5;8yv4203:1>v3=3b803>;49k0?56s|24;94?4|5;9o6>94=23`>1><uz8>o7>52z?17c<4?278=i4;8:p60b=838p1?:?:258967c2=30q~<:e;296~;5<808;63<1d87<>{t:<l1<7<t=361>61<5:;n6974}r056?6=:r798;4<7:?065<302wx>;>50;0x97242:=01>?i:5:8yv4193:1>v3=44803>;49o0?56s|27194?4|5;><6>94=203>1?<uz8=87>52z?10=<4?278>?4;8:p630=838p1?:6:25896452=30q~<97;296~;5<h08;63<2287<>{t:?k1<7<t=36g>61<5:8?6974}r05<?6=:r798o4<7:?066<312wx>;750;0x972d2:=01><;:5:8yv41j3:1>v3=4d803>;4:<0?46s|27a94?4|5;?;6>94=206>1?<uz8=h7>52z?114<4?278>;4;8:p63c=838p1?;=:25896412=30q~<?c;2960}::9?1>h5221696`=::991>h5221096`=::9;1>h5221296`=:9oo1>h521gf96`=:9oi1>h521g`96`=:9ok1>h521g;96`=:9o21>h521g596`=:9o<1>h521g796`=:9o91>h521g096`=:9o;1>h521g296`=:9ll1>h521dg96`=:9ln1>h521da96`=:9lh1>h521dc96`=::9h1>h5221c96`=::931>h5221:96`=::9=1>h5221496`=:9ol1>h521g696`=:9l31>h521d:96`=:9;o1mk5rs0:;>5<4s4;3:7=:;<3;3?5234;357oi;|q2<3<72?q6=585b79>5=3=<>16=5j5499>77b=<>16??k5489>5=c=<11v<6?:181870n39>70?71;ce?xu0<3:1>v3>0987e>;6800?i6s|7683>7}:l=0?m63k5;6f?xu61h0;6?u218;90<=:90=18h5rs06e>5<5s4;?i7:6;<37g?2b3ty::94?:3y>57e=io16=>h54`9~w4262909w0?;1;ce?87383>37p}>4383>7}:9=81mk5215190<=z{89o6=4={<30`?ga34;?<7:8;|q27c<72;q6=9>5489>56`=io1v<:<:18187383>j70?;3;6f?xu6k:0;6?u219f9ec=:9131855rs0:1>5<5s4;3>7oi;<3;5?2?3ty:4>4?:3y>5=5=io16=5:5489~w41b2908w0?71;6:?87?13>j70?8d;ce?xu60=0;6?u219390d=:91>18h5rs05a>5<5s4;<n7oi;<34`?2f3ty:4l4?:3y>5=g=io16=5m54`9~w4>e2909w0?7b;ce?87?k3>27p}>8b83>7}:9131845219a90`=z{89n6=4={<30b?2>34;8i7:j;|q23f<72;q6=:j5489>52e=<l1vq~:<2;296~X3;;16>o4;339'711=111v9=6:181[241279n7:<9:&002<>12wx8?650;0xZ14?348i69<7;%173?g53ty8m94?:3y]7=6<5;h1?5>4$264>30<uz9j>7>52z\03c=::k08;k5+355934=z{:k:6=4={_14a>;5j39<i6*<46847>{t;h:1<7<t^25g?84e2:=o7)=;7;57?xu41o0;6?uQ36a897d=;>i0(>:8:648yv5>m3:1>vP<7c9>6g<4?k1/?995769~w6?d2909wS=89:?1f?5012.88:488:p7<d=838pR>97;<0a>61?3-9?;796;|q0=d<72;qU?:94=3`9721<,:><6:o4}r1:=?6=:rT8;;522c8033=#;==1;o5rs2;;>5<5sW9<963=b;141>"4<>0<o6s|38594?4|V:=?70<m:257?!53?3=o7p}<9783>7}Y;>901?l53618 6202>o0q~=65;296~X4?;16>o4<739'711=?o1v>7;:181[509279n7=81:&002<?82wx?4=50;0xZ617348i6>9?;%173?>63ty85<4?:3y]73c<5;h1?;k4$264>=4<uz92<7>52z\02a=::k08:i5+3559<6=z{:2m6=4={_15g>;5j39=o6*<468;0>{t;1o1<7<t^24a?84e2:<i7)=;7;:6?xu40m0;6?uQ37c897d=;?k0(>:8:948yv5?k3:1>vP<689>6g<4>01/?995869~w6>e2909wS=98:?1f?5102.88:478:p7=g=838pR>88;<0a>6003-9?;766;|q0<<<72;qU?;84=3`9730<,:><65o4}r1;<?6=:rT8:8522c8020=#;==14o5rs2ca>5<5sW93:63=b;1;2>"4<>03o6s|3`c94?4|V:2>70<m:2:6?!53?32o7p}<a883>7}Y;1>01?l53968 62021o0q~=n8;296~X40:16>o4<829'711=0o1v>o8:181[5?:279n7=72:&002<>82wx?l850;0xZ6>6348i6>6>;%173??63ty8m84?:3y]72g<5;h1?:o4$264><4<uz92h7>52z\02c=::k08:k5+3559=6=z{:396=4={_150>;5j39=86*<468:0>{t;1=1<7<t^240?84e2:<87)=;7;;6?xu3<90;6?uQ452897d=<=:0(>:8:848yv2483:1>vP;319>6g<3;91/?995969~w6cc2909wS=l9:?1f?5d12.88:46a:p7`d=838pR>m7;<0a>6e?3-9?;77m;|q0ad<72;qU?n94=3`97f1<,:><64m4}r1f=?6=:rT8o;522c80g3=#;==15i5rs2g;>5<5sW9h963=b;1`1>"4<>02i6s|3d594?4|V:i?70<m:2a7?!53?33m7p}<e483>7}Y;j801?l53b08 6202h:0q~=j4;296~X4k816>o4<c09'711=i81v>k<:181[5d8279n7=l0:&002<f;2wx?h<50;0xZ6da348i6>li;%173?g33ty8i<4?:3y]7gc<5;h1?ok4$264>d3<uz9n<7>52z\0fa=::k08ni5+3559e3=z{:nm6=4={_1ag>;5j39io6*<468b3>{t;mo1<7<t^2`a?84e2:hi7)=;7;c;?xu4lm0;6?uQ3cc897d=;kk0(>:8:`;8yv5ck3:1>vP<b89>6g<4j01/?995a`9~w6bf2909wS=m7:?1f?5e?2.88:4nb:p7a?=838pR>l9;<0a>6d13-9?;7ol;|q0`=<72;qU?o;4=3`97g3<,:><68m4}r1g3?6=:rT8n9522c80f1=#;==19i5rs2f5>5<5sW9i?63=b;1a7>"4<>0>i6s|3e794?4|V:h970<m:2`1?!53?3?m7p}<d583>7}Y;k;01?l53c38 6202?:0q~=k3;296~X4j916>o4<b19'711=>81v>j=:181[5fn279n7=nf:&002<1:2wx?i?50;0xZ6gb348i6>oj;%173?043ty8j94?:3y]7f`<5;h1?nh4$264>32<uz9m?7>52z\0g`=::k08oh5+355920=z{:l96=4={_1``>;5j39hh6*<46853>{t;o;1<7<t^2a`?84e2:ih7)=;7;4;?xu4n90;6?uQ3b`897d=;jh0(>:8:7;8yv5bn3:1>vP<c`9>6g<4kh1/?9956`9~w6cb2909wS=l3:?1f?5d;2.88:49b:p7`0=838pR>l7;<0a>6d?3-9?;78l;|q0`g<72;qU?lj4=3`97db<,:><6;j4}r1g4?6=:rT8mn522c80ef=#;==1:h5rs2d`>5<5sW9mo63=b;1eg>"4<>0=j6s|34:94?4|V:?370<m:27;?!53?3=;7p}<f783>7}Y;o<01?l53g48 6202>80q~:>5;296~X39<16>o4;149'711=?<1vqcm<e;296~N4<11vbn=i:181M5302weo9>50;0xL62?3tdh8<4?:3yK71><ugi?>7>52zJ00==zfj>86=4={I17<>{ik=>1<7<tH26;?xhd<<0;6?uG35:8yke3>3:1>vF<499~jf202909wE=;8:mg1>=838pD>:7;|l`0<<72;qC?964}oa7e?6=:rB8855rnb6a>5<5sA9?46sac5a94?4|@:>37p`l4e83>7}O;=20qcm;e;296~N4<11vbn:i:181M5302weo8>50;0xL62?3tdh9<4?:3yK71><ugi>>7>52zJ00==zfj?86=4={I17<>{ik<>1<7<tH26;?xhd=<0;6?uG35:8yke2>3:1>vF<499~jf302909wE=;8:mg0>=838pD>:7;|l`1<<72;qC?964}oa6e?6=:rB8855rnb7a>5<5sA9?46sac4a94?4|@:>37p`l5e83>7}O;=20qcm:e;296~N4<11vbn;i:181M5302weo;>50;0xL62?3tdh:<4?:3yK71><ugi=>7>52zJ00==zfj<86=4={I17<>{ik?>1<7<tH26;?xhd><0;6?uG35:8yke1>3:1>vF<499~jf002909wE=;8:mg3>=838pD>:7;|l`2<<72;qC?964}oa5e?6=:rB8855rnb4a>5<5sA9?46sac7a94?4|@:>37p`l6e83>7}O;=20qcm9e;296~N4<11vbn8i:181M5302weo:>50;0xL62?3tdh;<4?:3yK71><ugi<>7>52zJ00==zfj=86=4={I17<>{ik>>1<7<tH26;?xhd?<0;6?uG35:8yke0>3:1>vF<499~jf102909wE=;8:mg2>=838pD>:7;|l`3<<72;qC?964}oa4e?6=:rB8855rnb5a>5<5sA9?46sac6a94?4|@:>37p`l7e83>7}O;=20qcm8e;296~N4<11vbn9i:181M5302weo5>50;0xL62?3tdh4<4?:3yK71><ugi3>7>52zJ00==zfj286=4={I17<>{ik1>1<7<tH26;?xhd0<0;6?uG35:8yke?>3:1>vF<499~jf>02909wE=;8:mg=>=838pD>:7;|l`<<<72;qC?964}oa;e?6=:rB8855rnb:a>5<5sA9?46sac9a94?4|@:>37p`l8e83>7}O;=20qcm7e;296~N4<11vbll9:182M5302wen=950;3xL62?3tdi<54?:0yK71><ugh;57>51zJ00==zfk:j6=4>{I17<>{ij9h1<7?tH26;?xhe8j0;6<uG35:8ykd7l3:1=vF<499~jg6b290:wE=;8:mf5`=83;pD>:7;|la55<728qC?964}o`25?6=9rB8855rnc31>5<6sA9?46sab0194?7|@:>37p`m1583>4}O;=20qcl>5;295~N4<11vbo?9:182M5302wen<950;3xL62?3tdi=54?:0yK71><ugh:57>51zJ00==zfk;j6=4>{I17<>{ij8h1<7?tH26;?xhe9j0;6<uG35:8ykd6l3:1=vF<499~jg7b290:wE=;8:mf4`=83;pD>:7;|la65<728qC?964}o`15?6=9rB8855rnc01>5<6sA9?46sab3194?7|@:>37p`m2583>4}O;=20qcl=5;295~N4<11vbo<9:182M5302wen?950;3xL62?3tdi>54?:0yK71><ugh957>51zJ00==zfk8j6=4>{I17<>{ij;h1<7?tH26;?xhe:j0;6<uG35:8ykd5l3:1=vF<499~jg4b290:wE=;8:mf7`=83;pD>:7;|la75<728qC?964}o`05?6=9rB8855rnc11>5<6sA9?46sab2194?7|@:>37p`m3583>4}O;=20qcl<5;295~N4<11vbo=9:182M5302wen>950;3xL62?3tdi?54?:0yK71><ugh857>51zJ00==zfk9j6=4>{I17<>{ij:h1<7?tH26;?xhe;j0;6<uG35:8ykd4l3:1=vF<499~jg5b290:wE=;8:mf6`=83;pD>:7;|la05<728qC?964}o`75?6=9rB8855rnc61>5<6sA9?46sab5194?7|@:>37p`m4583>4}O;=20qcl;5;295~N4<11vbo:9:182M5302wen9950;3xL62?3tdi854?:0yK71><ugh?57>51zJ00==zfk>j6=4>{I17<>{ij=h1<7?tH26;?xhe<j0;6<uG35:8ykd3l3:1=vF<499~jg2b290:wE=;8:mf1`=83;pD>:7;|la15<728qC?964}o`65?6=9rB8855rnc71>5<6sA9?46sab4194?7|@:>37p`m5583>4}O;=20qcl:5;295~N4<11vbo;9:182M5302wen8950;3xL62?3tdi954?:0yK71><ugh>57>51zJ00==zfk?j6=4>{I17<>{ij<h1<7?tH26;?xhe=j0;6<uG35:8ykd2l3:1=vF<499~jg3b290:wE=;8:mf0`=83;pD>:7;|la25<728qC?964}o`55?6=9rB8855rnc41>5<6sA9?46sab7194?7|@:>37p`m6583>4}O;=20qcl95;295~N4<11vbo89:182M5302wen;950;3xL62?3tdi:54?:0yK71><ugh=57>51zJ00==zfk<j6=4>{I17<>{ij?h1<7?tH26;?xhe>j0;6<uG35:8ykd1l3:1=vF<499~jg0b290:wE=;8:mf3`=83;pD>:7;|la35<728qC?964}o`45?6=9rB8855rnc51>5<6sA9?46sab6194?7|@:>37p`m7583>4}O;=20qcl85;295~N4<11vbo99:182M5302wen:950;3xL62?3tdi;54?:0yK71><ugh<57>51zJ00==zfk=j6=4>{I17<>{ij>h1<7?tH26;?xhe?j0;6<uG35:8ykd0l3:1=vF<499~jg1b290:wE=;8:mf2`=83;pD>:7;|la<5<728qC?964}o`;5?6=9rB8855rnc:1>5<6sA9?46sab9194?7|@:>37p`m8583>4}O;=20qcl75;295~N4<11vbo69:182M5302wen5950;3xL62?3tdi454?:0yK71><ugh357>51zJ00==zfk2j6=4>{I17<>{ij1h1<7?tH26;?xhe0j0;6<uG35:8ykd?l3:1=vF<499~jg>b290:wE=;8:mf=`=83;pD>:7;|la=5<728qC?964}o`:5?6=9rB8855rnc;1>5<6sA9?46sab8194?7|@:>37p`m9583>4}O;=20qcl65;295~N4<11vbo79:182M5302wen4950;3xL62?3tdi554?:0yK71><ugh257>51zJ00==zfk3j6=4>{I17<>{ij0h1<7?tH26;?xhe1j0;6<uG35:8ykd>l3:1=vF<499~jg?b290:wE=;8:mf<`=83;pD>:7;|lae5<728qC?964}o`b5?6=9rB8855rncc1>5<6sA9?46sab`194?7|@:>37p`ma583>4}O;=20qcln5;295~N4<11vboo9:182M5302wenl950;3xL62?3tdim54?:0yK71><ughj57>51zJ00==zfkkj6=4>{I17<>{ijhh1<7?tH26;?xheij0;6<uG35:8ykdfl3:1=vF<499~jggb290:wE=;8:mfd`=83;pD>:7;|laf5<728qC?964}o`a5?6=9rB8855rnc`1>5<6sA9?46sabc194?7|@:>37p`mb583>4}O;=20qclm5;295~N4<11vbol9:182M5302weno950;3xL62?3tdin54?:0yK71><ughi57>51zJ00==zfkhj6=4>{I17<>{ijkh1<7?tH26;?xhejj0;6<uG35:8ykdel3:1=vF<499~jgdb290:wE=;8:mfg`=83;pD>:7;|lag5<728qC?964}o``5?6=9rB8855rnca1>5<6sA9?46sabb194?7|@:>37p`mc583>4}O;=20qcll5;295~N4<11vbom9:182M5302wenn950;3xL62?3tdio54?:0yK71><ughh57>51zJ00==zfkij6=4>{I17<>{ijjh1<7?tH26;?xhekj0;6<uG35:8ykddl3:1=vF<499~jgeb290:wE=;8:mff`=83;pD>:7;|la`5<728qC?964}o`g5?6=9rB8855rncf1>5<6sA9?46sabe194?7|@:>37p`md583>4}O;=20qclk5;295~N4<11vboj9:182M5302weni950;3xL62?3tdih54?:0yK71><ugho57>51zJ00==zfknj6=4>{I17<>{ijmh1<7?tH26;?xhelj0;6<uG35:8ykdcl3:1=vF<499~jgbb290:wE=;8:mfa`=83;pD>:7;|laa5<728qC?964}o`f5?6=9rB8855rncg1>5<6sA9?46sabd194?7|@:>37p`me583>4}O;=20qclj5;295~N4<11vbok9:182M5302wenh950;3xL62?3tdii54?:0yK71><ughn57>51zJ00==zfkoj6=4>{I17<>{ijlh1<7?tH26;?xhemj0;6<uG35:8ykdbl3:1=vF<499~jgcb290:wE=;8:mf``=83;pD>:7;|lab5<728qC?964}o`e5?6=9rB8855rncd1>5<6sA9?46sabg194?7|@:>37p`mf583>4}O;=20qcli5;295~N4<11vboh9:182M5302wenk950;3xL62?3tdij54?:0yK71><ughm57>51zJ00==zfklj6=4>{I17<>{ijoh1<7?tH26;?xhenj0;6<uG35:8ykdal3:1=vF<499~jg`b290:wE=;8:mfc`=83;pD>:7;|l`45<728qC?964}oa35?6=9rB8855rnb21>5<6sA9?46sac1194?7|@:>37p`l0583>4}O;=20qcm?5;295~N4<11vbn>9:182M5302weo=950;3xL62?3tdh<54?:0yK71><ugi;57>51zJ00==zfj:j6=4>{I17<>{ik9h1<7?tH26;?xhd8j0;6<uG35:8yke7l3:1=vF<499~jf6b290:wE=;8:mg5`=83;pD>:7;|l`55<728qC?964}oa25?6=9rB8855rnb31>5<6sA9?46sac0194?7|@:>37p`l1583>4}O;=20qcm>5;295~N4<11vbn?9:182M5302weo<950;3xL62?3tdh=54?:0yK71><ugi:57>51zJ00==zfj;j6=4>{I17<>{ik8h1<7?tH26;?xhd9j0;6<uG35:8yke6l3:1=vF<499~jf7b290:wE=;8:mg4`=83;pD>:7;|l`65<728qC?964}oa15?6=9rB8855rnb01>5<6sA9?46sac3194?7|@:>37p`l2583>4}O;=20qcm=5;295~N4<11vbn<9:182M5302weo?950;3xL62?3tdh>54?:0yK71><ugi957>51zJ00==zfj8j6=4>{I17<>{ik;h1<7?tH26;?xhd:j0;6<uG35:8yke5l3:1=vF<499~jf4b290:wE=;8:mg7`=83;pD>:7;|l`75<728qC?964}oa05?6=9rB8855rnb11>5<6sA9?46sac2194?7|@:>37p`l3583>4}O;=20qcm<5;295~N4<11vbn=9:182M5302weo>950;3xL62?3tdh?54?:0yK71><ugi857>51zJ00==zfj9j6=4>{I17<>{ik:h1<7?tH26;?xhd;j0;6<uG35:8yke4l3:1=vF<499~yx{GHJqn=546ee65e44zHIHp<pNOPzCD \ No newline at end of file
diff --git a/usrp2/coregen/fifo_xlnx_32x36_2clk.v b/usrp2/coregen/fifo_xlnx_32x36_2clk.v
new file mode 100644
index 000000000..68a8caaf6
--- /dev/null
+++ b/usrp2/coregen/fifo_xlnx_32x36_2clk.v
@@ -0,0 +1,3839 @@
+////////////////////////////////////////////////////////////////////////////////
+// Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved.
+////////////////////////////////////////////////////////////////////////////////
+// ____ ____
+// / /\/ /
+// /___/ \ / Vendor: Xilinx
+// \ \ \/ Version: M.63c
+// \ \ Application: netgen
+// / / Filename: fifo_xlnx_32x36_2clk.v
+// /___/ /\ Timestamp: Fri Oct 15 00:50:08 2010
+// \ \ / \
+// \___\/\___\
+//
+// Command : -intstyle ise -w -sim -ofmt verilog /tmp/_cg/fifo_xlnx_32x36_2clk.ngc /tmp/_cg/fifo_xlnx_32x36_2clk.v
+// Device : 3s2000fg456-5
+// Input file : /tmp/_cg/fifo_xlnx_32x36_2clk.ngc
+// Output file : /tmp/_cg/fifo_xlnx_32x36_2clk.v
+// # of Modules : 1
+// Design Name : fifo_xlnx_32x36_2clk
+// Xilinx : /opt/Xilinx/12.2/ISE_DS/ISE/
+//
+// Purpose:
+// This verilog netlist is a verification model and uses simulation
+// primitives which may not represent the true implementation of the
+// device, however the netlist is functionally correct and should not
+// be modified. This file cannot be synthesized and should only be used
+// with supported simulation tools.
+//
+// Reference:
+// Command Line Tools User Guide, Chapter 23 and Synthesis and Simulation Design Guide, Chapter 6
+//
+////////////////////////////////////////////////////////////////////////////////
+
+`timescale 1 ns/1 ps
+
+module fifo_xlnx_32x36_2clk (
+ rd_en, almost_full, prog_full, wr_en, full, empty, wr_clk, rst, rd_clk, dout, din
+)/* synthesis syn_black_box syn_noprune=1 */;
+ input rd_en;
+ output almost_full;
+ output prog_full;
+ input wr_en;
+ output full;
+ output empty;
+ input wr_clk;
+ input rst;
+ input rd_clk;
+ output [35 : 0] dout;
+ input [35 : 0] din;
+
+ // synthesis translate_off
+
+ wire \BU2/U0/grf.rf/gl0.wr/gwas.wsts/c2/dout_i62_392 ;
+ wire \BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or0000156_391 ;
+ wire \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i_mux000079_390 ;
+ wire \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i_mux000063_389 ;
+ wire \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i_mux000027_388 ;
+ wire \BU2/U0/grf.rf/gl0.wr/gwas.wsts/c2/dout_i26_387 ;
+ wire \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_almost_full_i_mux000069_386 ;
+ wire \BU2/U0/grf.rf/gl0.wr/gwas.wsts/comp2 ;
+ wire \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_almost_full_i_mux000067_384 ;
+ wire \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_almost_full_i_mux000026_383 ;
+ wire \BU2/U0/grf.rf/gl0.wr/wpntr/count_not0001 ;
+ wire \BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or000063_381 ;
+ wire \BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or0000158_380 ;
+ wire \BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or0000115_379 ;
+ wire \BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or000062_378 ;
+ wire \BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or000026_377 ;
+ wire \BU2/U0/grf.rf/gl0.rd/rpntr/count_not0001 ;
+ wire \BU2/U0/grf.rf/gl0.rd/rpntr/N11 ;
+ wire \BU2/U0/grf.rf/gl0.wr/wpntr/N11 ;
+ wire \BU2/N16 ;
+ wire \BU2/N14 ;
+ wire \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_almost_full_i_mux0000 ;
+ wire \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_fb_i_370 ;
+ wire \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i_mux0000 ;
+ wire \BU2/U0/grf.rf/mem/dout_i_not0001 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N147 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N145 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N143 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N141 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N137 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N135 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N139 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N133 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N131 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N129 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N127 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N123 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N121 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N125 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N119 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N117 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N115 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N113 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N109 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N107 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N111 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N103 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N101 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N105 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N97 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N95 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N99 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N93 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N91 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N89 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N87 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N83 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N81 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N85 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N79 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N77 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N75 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N73 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N69 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N67 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N71 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N65 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N63 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N61 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N59 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N55 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N53 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N57 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N51 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N49 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N47 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N45 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N41 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N39 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N43 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N37 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N35 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N33 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N31 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N27 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N25 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N29 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N23 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N21 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N19 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N17 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N13 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N11 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N15 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N9 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N7 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/N5 ;
+ wire \BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ;
+ wire \BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count2 ;
+ wire \BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count ;
+ wire \BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count1 ;
+ wire \BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count3 ;
+ wire \BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count4 ;
+ wire \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/prog_full_i_mux0003 ;
+ wire \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/prog_full_i_not0001 ;
+ wire \BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ;
+ wire \BU2/U0/grf.rf/gl0.rd/gr1.rfwft/empty_fwft_fb_176 ;
+ wire \BU2/U0/grf.rf/gl0.rd/gr1.rfwft/empty_fwft_i_mux0000 ;
+ wire \BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count2 ;
+ wire \BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count ;
+ wire \BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count1 ;
+ wire \BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count3 ;
+ wire \BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count4 ;
+ wire \BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ;
+ wire \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_xor0003 ;
+ wire \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_xor0002 ;
+ wire \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_xor0001 ;
+ wire \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_xor0000 ;
+ wire \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_xor0003 ;
+ wire \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_xor0002 ;
+ wire \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_xor0001 ;
+ wire \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_xor0000 ;
+ wire \BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_xor0003_120 ;
+ wire \BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_xor0002 ;
+ wire \BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_xor0001 ;
+ wire \BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_xor0000 ;
+ wire \BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_xor0003_110 ;
+ wire \BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_xor0002 ;
+ wire \BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_xor0001 ;
+ wire \BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_xor0000 ;
+ wire \BU2/U0/grf.rf/rstblk/wr_rst_comb ;
+ wire \BU2/U0/grf.rf/rstblk/rd_rst_comb ;
+ wire \BU2/U0/grf.rf/rstblk/wr_rst_asreg_95 ;
+ wire \BU2/U0/grf.rf/rstblk/rd_rst_asreg_94 ;
+ wire \BU2/U0/grf.rf/rstblk/rst_d1_93 ;
+ wire \BU2/U0/grf.rf/rstblk/wr_rst_asreg_d2_92 ;
+ wire \BU2/U0/grf.rf/rstblk/wr_rst_asreg_d1_91 ;
+ wire \BU2/U0/grf.rf/rstblk/rd_rst_asreg_d2_90 ;
+ wire \BU2/U0/grf.rf/rstblk/rd_rst_asreg_d1_89 ;
+ wire \BU2/U0/grf.rf/rstblk/rst_d2_88 ;
+ wire \BU2/U0/grf.rf/rstblk/RST_FULL_GEN_87 ;
+ wire \BU2/U0/grf.rf/rstblk/rst_d3_86 ;
+ wire \BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_85 ;
+ wire \BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or0000 ;
+ wire \BU2/N1 ;
+ wire NLW_VCC_P_UNCONNECTED;
+ wire NLW_GND_G_UNCONNECTED;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM72_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM71_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM70_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM69_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM67_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM66_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM68_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM65_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM64_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM63_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM62_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM60_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM59_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM61_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM58_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM57_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM56_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM55_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM53_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM52_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM54_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM50_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM49_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM51_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM47_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM46_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM48_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM45_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM44_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM43_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM42_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM40_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM39_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM41_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM38_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM37_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM36_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM35_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM33_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM32_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM34_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM31_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM30_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM29_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM28_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM26_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM25_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM27_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM24_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM23_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM22_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM21_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM19_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM18_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM20_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM17_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM16_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM15_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM14_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM12_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM11_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM13_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM10_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM9_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM8_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM7_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM5_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM4_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM6_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM3_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM2_SPO_UNCONNECTED ;
+ wire \NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM1_SPO_UNCONNECTED ;
+ wire [35 : 0] din_2;
+ wire [35 : 0] dout_3;
+ wire [35 : 0] \BU2/U0/grf.rf/mem/gdm.dm/dout_i ;
+ wire [35 : 0] \BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 ;
+ wire [4 : 0] \BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 ;
+ wire [4 : 0] \BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 ;
+ wire [4 : 0] \BU2/U0/grf.rf/gl0.wr/wpntr/count_d1 ;
+ wire [4 : 0] \BU2/U0/grf.rf/gl0.wr/wpntr/count ;
+ wire [5 : 4] \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/diff_pntr_pad ;
+ wire [5 : 1] \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_lut ;
+ wire [4 : 0] \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_cy ;
+ wire [5 : 4] \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/diff_pntr_pad_add0000 ;
+ wire [1 : 0] \BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state ;
+ wire [1 : 0] \BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state_mux0001 ;
+ wire [4 : 0] \BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 ;
+ wire [4 : 0] \BU2/U0/grf.rf/gl0.rd/rpntr/count ;
+ wire [4 : 0] \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc ;
+ wire [4 : 0] \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc ;
+ wire [4 : 0] \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 ;
+ wire [4 : 0] \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg ;
+ wire [4 : 0] \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 ;
+ wire [4 : 0] \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg ;
+ wire [4 : 0] \BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin ;
+ wire [4 : 0] \BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin ;
+ wire [1 : 0] \BU2/U0/grf.rf/rstblk/wr_rst_reg ;
+ wire [2 : 0] \BU2/U0/grf.rf/rstblk/rd_rst_reg ;
+ wire [0 : 0] \BU2/rd_data_count ;
+ assign
+ dout[35] = dout_3[35],
+ dout[34] = dout_3[34],
+ dout[33] = dout_3[33],
+ dout[32] = dout_3[32],
+ dout[31] = dout_3[31],
+ dout[30] = dout_3[30],
+ dout[29] = dout_3[29],
+ dout[28] = dout_3[28],
+ dout[27] = dout_3[27],
+ dout[26] = dout_3[26],
+ dout[25] = dout_3[25],
+ dout[24] = dout_3[24],
+ dout[23] = dout_3[23],
+ dout[22] = dout_3[22],
+ dout[21] = dout_3[21],
+ dout[20] = dout_3[20],
+ dout[19] = dout_3[19],
+ dout[18] = dout_3[18],
+ dout[17] = dout_3[17],
+ dout[16] = dout_3[16],
+ dout[15] = dout_3[15],
+ dout[14] = dout_3[14],
+ dout[13] = dout_3[13],
+ dout[12] = dout_3[12],
+ dout[11] = dout_3[11],
+ dout[10] = dout_3[10],
+ dout[9] = dout_3[9],
+ dout[8] = dout_3[8],
+ dout[7] = dout_3[7],
+ dout[6] = dout_3[6],
+ dout[5] = dout_3[5],
+ dout[4] = dout_3[4],
+ dout[3] = dout_3[3],
+ dout[2] = dout_3[2],
+ dout[1] = dout_3[1],
+ dout[0] = dout_3[0],
+ din_2[35] = din[35],
+ din_2[34] = din[34],
+ din_2[33] = din[33],
+ din_2[32] = din[32],
+ din_2[31] = din[31],
+ din_2[30] = din[30],
+ din_2[29] = din[29],
+ din_2[28] = din[28],
+ din_2[27] = din[27],
+ din_2[26] = din[26],
+ din_2[25] = din[25],
+ din_2[24] = din[24],
+ din_2[23] = din[23],
+ din_2[22] = din[22],
+ din_2[21] = din[21],
+ din_2[20] = din[20],
+ din_2[19] = din[19],
+ din_2[18] = din[18],
+ din_2[17] = din[17],
+ din_2[16] = din[16],
+ din_2[15] = din[15],
+ din_2[14] = din[14],
+ din_2[13] = din[13],
+ din_2[12] = din[12],
+ din_2[11] = din[11],
+ din_2[10] = din[10],
+ din_2[9] = din[9],
+ din_2[8] = din[8],
+ din_2[7] = din[7],
+ din_2[6] = din[6],
+ din_2[5] = din[5],
+ din_2[4] = din[4],
+ din_2[3] = din[3],
+ din_2[2] = din[2],
+ din_2[1] = din[1],
+ din_2[0] = din[0];
+ VCC VCC_0 (
+ .P(NLW_VCC_P_UNCONNECTED)
+ );
+ GND GND_1 (
+ .G(NLW_GND_G_UNCONNECTED)
+ );
+ LUT3_L #(
+ .INIT ( 8'h90 ))
+ \BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or000063 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin [0]),
+ .I1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .I2(\BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or000062_378 ),
+ .LO(\BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or000063_381 )
+ );
+ LUT4_L #(
+ .INIT ( 16'h9000 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i_mux000079 (
+ .I0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [0]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [0]),
+ .I2(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i_mux000063_389 ),
+ .I3(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i_mux000027_388 ),
+ .LO(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i_mux000079_390 )
+ );
+ LUT4_L #(
+ .INIT ( 16'h9000 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_almost_full_i_mux000069 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [0]),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count [0]),
+ .I2(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_almost_full_i_mux000067_384 ),
+ .I3(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .LO(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_almost_full_i_mux000069_386 )
+ );
+ LUT4_L #(
+ .INIT ( 16'h8421 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.wsts/c2/dout_i62 (
+ .I0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d1 [2]),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d1 [3]),
+ .I2(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [2]),
+ .I3(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [3]),
+ .LO(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/c2/dout_i62_392 )
+ );
+ LUT4_L #(
+ .INIT ( 16'h8241 ))
+ \BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or0000156 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin [1]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin [2]),
+ .I2(\BU2/U0/grf.rf/gl0.rd/rpntr/count [2]),
+ .I3(\BU2/U0/grf.rf/gl0.rd/rpntr/count [1]),
+ .LO(\BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or0000156_391 )
+ );
+ LUT3_L #(
+ .INIT ( 8'h7F ))
+ \BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count_xor<3>111 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count [0]),
+ .I1(\BU2/U0/grf.rf/gl0.rd/rpntr/count [1]),
+ .I2(\BU2/U0/grf.rf/gl0.rd/rpntr/count [2]),
+ .LO(\BU2/U0/grf.rf/gl0.rd/rpntr/N11 )
+ );
+ LUT3_L #(
+ .INIT ( 8'h7F ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count_xor<3>111 (
+ .I0(\BU2/U0/grf.rf/gl0.wr/wpntr/count [0]),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count [1]),
+ .I2(\BU2/U0/grf.rf/gl0.wr/wpntr/count [2]),
+ .LO(\BU2/U0/grf.rf/gl0.wr/wpntr/N11 )
+ );
+ LUT2_L #(
+ .INIT ( 4'h6 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_xor0003_SW0 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [3]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [2]),
+ .LO(\BU2/N16 )
+ );
+ LUT2_L #(
+ .INIT ( 4'h6 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_xor0003_SW0 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [3]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [2]),
+ .LO(\BU2/N14 )
+ );
+ INV \BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count_xor<0>11_INV_0 (
+ .I(\BU2/U0/grf.rf/gl0.rd/rpntr/count [0]),
+ .O(\BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count )
+ );
+ INV \BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count_xor<0>11_INV_0 (
+ .I(\BU2/U0/grf.rf/gl0.wr/wpntr/count [0]),
+ .O(\BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count )
+ );
+ LUT2 #(
+ .INIT ( 4'h2 ))
+ \BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_1 (
+ .I0(wr_en),
+ .I1(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_fb_i_370 ),
+ .O(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 )
+ );
+ LUT4 #(
+ .INIT ( 16'h2333 ))
+ \BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_1 (
+ .I0(rd_en),
+ .I1(\BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_85 ),
+ .I2(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state [1]),
+ .I3(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state [0]),
+ .O(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 )
+ );
+ LUT4 #(
+ .INIT ( 16'h6AAA ))
+ \BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count_xor<3>12 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count [3]),
+ .I1(\BU2/U0/grf.rf/gl0.rd/rpntr/count [0]),
+ .I2(\BU2/U0/grf.rf/gl0.rd/rpntr/count [1]),
+ .I3(\BU2/U0/grf.rf/gl0.rd/rpntr/count [2]),
+ .O(\BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count3 )
+ );
+ LUT4 #(
+ .INIT ( 16'h6AAA ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count_xor<3>12 (
+ .I0(\BU2/U0/grf.rf/gl0.wr/wpntr/count [3]),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count [0]),
+ .I2(\BU2/U0/grf.rf/gl0.wr/wpntr/count [1]),
+ .I3(\BU2/U0/grf.rf/gl0.wr/wpntr/count [2]),
+ .O(\BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count3 )
+ );
+ LUT3 #(
+ .INIT ( 8'h08 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1 (
+ .I0(wr_en),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [4]),
+ .I2(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_fb_i_370 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 )
+ );
+ LUT3 #(
+ .INIT ( 8'h10 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/write_ctrl (
+ .I0(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_fb_i_370 ),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [4]),
+ .I2(wr_en),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 )
+ );
+ LUT2 #(
+ .INIT ( 4'h9 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_lut<5> (
+ .I0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [4]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [4]),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_lut [5])
+ );
+ LUT4 #(
+ .INIT ( 16'h9000 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.wsts/c2/dout_i78 (
+ .I0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d1 [0]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [0]),
+ .I2(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/c2/dout_i62_392 ),
+ .I3(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/c2/dout_i26_387 ),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/comp2 )
+ );
+ LUT4 #(
+ .INIT ( 16'h9000 ))
+ \BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or0000158 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin [0]),
+ .I1(\BU2/U0/grf.rf/gl0.rd/rpntr/count [0]),
+ .I2(\BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or0000156_391 ),
+ .I3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_not0001 ),
+ .O(\BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or0000158_380 )
+ );
+ LUT2 #(
+ .INIT ( 4'h9 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_lut<4> (
+ .I0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [3]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [3]),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_lut [4])
+ );
+ LUT2 #(
+ .INIT ( 4'h9 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_lut<3> (
+ .I0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [2]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [2]),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_lut [3])
+ );
+ LUT2 #(
+ .INIT ( 4'h9 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_lut<2> (
+ .I0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [1]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [1]),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_lut [2])
+ );
+ LUT2 #(
+ .INIT ( 4'h9 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_lut<1> (
+ .I0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [0]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [0]),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_lut [1])
+ );
+ LUT4 #(
+ .INIT ( 16'h5450 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i_mux0000105 (
+ .I0(\BU2/U0/grf.rf/rstblk/RST_FULL_GEN_87 ),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_not0001 ),
+ .I2(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i_mux000079_390 ),
+ .I3(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/comp2 ),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i_mux0000 )
+ );
+ LUT4 #(
+ .INIT ( 16'h9009 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i_mux000063 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [3]),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [3]),
+ .I2(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [2]),
+ .I3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [2]),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i_mux000063_389 )
+ );
+ LUT4 #(
+ .INIT ( 16'h9009 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i_mux000027 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [4]),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [4]),
+ .I2(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [1]),
+ .I3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [1]),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i_mux000027_388 )
+ );
+ LUT4 #(
+ .INIT ( 16'h8421 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.wsts/c2/dout_i26 (
+ .I0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d1 [1]),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d1 [4]),
+ .I2(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [1]),
+ .I3(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [4]),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/c2/dout_i26_387 )
+ );
+ LUT4 #(
+ .INIT ( 16'h5450 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_almost_full_i_mux0000107 (
+ .I0(\BU2/U0/grf.rf/rstblk/RST_FULL_GEN_87 ),
+ .I1(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_almost_full_i_mux000026_383 ),
+ .I2(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/comp2 ),
+ .I3(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_almost_full_i_mux000069_386 ),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_almost_full_i_mux0000 )
+ );
+ LUT4 #(
+ .INIT ( 16'h9009 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_almost_full_i_mux000067 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [2]),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count [2]),
+ .I2(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [1]),
+ .I3(\BU2/U0/grf.rf/gl0.wr/wpntr/count [1]),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_almost_full_i_mux000067_384 )
+ );
+ LUT4 #(
+ .INIT ( 16'h9009 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_almost_full_i_mux000026 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [4]),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count [4]),
+ .I2(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [3]),
+ .I3(\BU2/U0/grf.rf/gl0.wr/wpntr/count [3]),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_almost_full_i_mux000026_383 )
+ );
+ LUT2 #(
+ .INIT ( 4'h2 ))
+ \BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1 (
+ .I0(wr_en),
+ .I1(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_fb_i_370 ),
+ .O(\BU2/U0/grf.rf/gl0.wr/wpntr/count_not0001 )
+ );
+ LUT4 #(
+ .INIT ( 16'hECA0 ))
+ \BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or0000183 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or0000115_379 ),
+ .I1(\BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or000026_377 ),
+ .I2(\BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or0000158_380 ),
+ .I3(\BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or000063_381 ),
+ .O(\BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or0000 )
+ );
+ LUT4 #(
+ .INIT ( 16'h9009 ))
+ \BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or0000115 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count [4]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin [4]),
+ .I2(\BU2/U0/grf.rf/gl0.rd/rpntr/count [3]),
+ .I3(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin [3]),
+ .O(\BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or0000115_379 )
+ );
+ LUT4 #(
+ .INIT ( 16'h8421 ))
+ \BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or000062 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin [2]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin [3]),
+ .I2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .I3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .O(\BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or000062_378 )
+ );
+ LUT4 #(
+ .INIT ( 16'h8241 ))
+ \BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or000026 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin [1]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin [4]),
+ .I2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .O(\BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or000026_377 )
+ );
+ LUT4 #(
+ .INIT ( 16'h2333 ))
+ \BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21 (
+ .I0(rd_en),
+ .I1(\BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_85 ),
+ .I2(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state [1]),
+ .I3(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state [0]),
+ .O(\BU2/U0/grf.rf/gl0.rd/rpntr/count_not0001 )
+ );
+ LUT3 #(
+ .INIT ( 8'hA6 ))
+ \BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count_xor<4>11 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count [4]),
+ .I1(\BU2/U0/grf.rf/gl0.rd/rpntr/count [3]),
+ .I2(\BU2/U0/grf.rf/gl0.rd/rpntr/N11 ),
+ .O(\BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count4 )
+ );
+ LUT3 #(
+ .INIT ( 8'hA6 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count_xor<4>11 (
+ .I0(\BU2/U0/grf.rf/gl0.wr/wpntr/count [4]),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count [3]),
+ .I2(\BU2/U0/grf.rf/gl0.wr/wpntr/N11 ),
+ .O(\BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count4 )
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX11 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N5 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N7 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [0])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX1011 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N45 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N47 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [10])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX1111 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N9 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N11 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [1])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX11111 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N49 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N51 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [11])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX1211 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N53 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N55 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [12])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX1311 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N57 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N59 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [13])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX1411 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N61 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N63 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [14])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX1511 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N65 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N67 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [15])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX1611 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N69 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N71 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [16])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX1711 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N73 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N75 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [17])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX1811 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N77 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N79 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [18])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX1911 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N81 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N83 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [19])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX2011 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N85 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N87 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [20])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX2111 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N13 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N15 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [2])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX21111 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N89 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N91 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [21])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX2211 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N93 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N95 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [22])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX2311 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N97 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N99 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [23])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX2411 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N101 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N103 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [24])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX2511 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N105 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N107 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [25])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX2611 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N109 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N111 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [26])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX2711 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N113 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N115 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [27])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX2811 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N117 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N119 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [28])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX2911 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N121 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N123 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [29])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX3011 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N125 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N127 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [30])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX3111 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N17 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N19 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [3])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX31111 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N129 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N131 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [31])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX3211 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N133 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N135 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [32])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX3311 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N137 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N139 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [33])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX3411 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N141 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N143 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [34])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX3511 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N145 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N147 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [35])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX411 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N21 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N23 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [4])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX511 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N25 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N27 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [5])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX611 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N29 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N31 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [6])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX711 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N33 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N35 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [7])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX811 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N37 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N39 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [8])
+ );
+ LUT3 #(
+ .INIT ( 8'hE4 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/inst_LPM_MUX911 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/mem/gdm.dm/N41 ),
+ .I2(\BU2/U0/grf.rf/mem/gdm.dm/N43 ),
+ .O(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [9])
+ );
+ LUT4 #(
+ .INIT ( 16'h6996 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_xor0003 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [1]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [0]),
+ .I2(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [4]),
+ .I3(\BU2/N16 ),
+ .O(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_xor0003_110 )
+ );
+ LUT4 #(
+ .INIT ( 16'h6996 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_xor0003 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [1]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [0]),
+ .I2(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [4]),
+ .I3(\BU2/N14 ),
+ .O(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_xor0003_120 )
+ );
+ LUT3 #(
+ .INIT ( 8'hA2 ))
+ \BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_REGOUT_EN11 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state [1]),
+ .I1(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state [0]),
+ .I2(rd_en),
+ .O(\BU2/U0/grf.rf/mem/dout_i_not0001 )
+ );
+ LUT2 #(
+ .INIT ( 4'hD ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_almost_full_i_not00011 (
+ .I0(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_fb_i_370 ),
+ .I1(\BU2/U0/grf.rf/rstblk/RST_FULL_GEN_87 ),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/prog_full_i_not0001 )
+ );
+ LUT4 #(
+ .INIT ( 16'h8E8A ))
+ \BU2/U0/grf.rf/gl0.rd/gr1.rfwft/empty_fwft_i_mux00001 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/empty_fwft_fb_176 ),
+ .I1(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state [0]),
+ .I2(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state [1]),
+ .I3(rd_en),
+ .O(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/empty_fwft_i_mux0000 )
+ );
+ LUT4 #(
+ .INIT ( 16'h6996 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_xor00021 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [2]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [1]),
+ .I2(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [4]),
+ .I3(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [3]),
+ .O(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_xor0002 )
+ );
+ LUT4 #(
+ .INIT ( 16'h6996 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_xor00021 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [2]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [1]),
+ .I2(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [4]),
+ .I3(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [3]),
+ .O(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_xor0002 )
+ );
+ LUT4 #(
+ .INIT ( 16'h40FF ))
+ \BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state_mux0001<0>1 (
+ .I0(rd_en),
+ .I1(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state [0]),
+ .I2(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state [1]),
+ .I3(\BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_85 ),
+ .O(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state_mux0001 [0])
+ );
+ LUT3 #(
+ .INIT ( 8'h6A ))
+ \BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count_xor<2>11 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count [2]),
+ .I1(\BU2/U0/grf.rf/gl0.rd/rpntr/count [0]),
+ .I2(\BU2/U0/grf.rf/gl0.rd/rpntr/count [1]),
+ .O(\BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count2 )
+ );
+ LUT3 #(
+ .INIT ( 8'h6A ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count_xor<2>11 (
+ .I0(\BU2/U0/grf.rf/gl0.wr/wpntr/count [2]),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count [0]),
+ .I2(\BU2/U0/grf.rf/gl0.wr/wpntr/count [1]),
+ .O(\BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count2 )
+ );
+ LUT3 #(
+ .INIT ( 8'h96 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_xor00011 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [4]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [3]),
+ .I2(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [2]),
+ .O(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_xor0001 )
+ );
+ LUT3 #(
+ .INIT ( 8'h96 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_xor00011 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [4]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [3]),
+ .I2(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [2]),
+ .O(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_xor0001 )
+ );
+ LUT3 #(
+ .INIT ( 8'hF2 ))
+ \BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state_mux0001<1>1 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state [0]),
+ .I1(rd_en),
+ .I2(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state [1]),
+ .O(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state_mux0001 [1])
+ );
+ LUT3 #(
+ .INIT ( 8'h08 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/prog_full_i_mux00031 (
+ .I0(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/diff_pntr_pad [4]),
+ .I1(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/diff_pntr_pad [5]),
+ .I2(\BU2/U0/grf.rf/rstblk/RST_FULL_GEN_87 ),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/prog_full_i_mux0003 )
+ );
+ LUT2 #(
+ .INIT ( 4'h6 ))
+ \BU2/U0/grf.rf/gcx.clkx/Mxor_rd_pntr_gc_xor0000_Result1 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .I1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .O(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_xor0000 )
+ );
+ LUT2 #(
+ .INIT ( 4'h6 ))
+ \BU2/U0/grf.rf/gcx.clkx/Mxor_rd_pntr_gc_xor0001_Result1 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .I1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .O(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_xor0001 )
+ );
+ LUT2 #(
+ .INIT ( 4'h6 ))
+ \BU2/U0/grf.rf/gcx.clkx/Mxor_rd_pntr_gc_xor0002_Result1 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .I1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .O(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_xor0002 )
+ );
+ LUT2 #(
+ .INIT ( 4'h6 ))
+ \BU2/U0/grf.rf/gcx.clkx/Mxor_rd_pntr_gc_xor0003_Result1 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .I1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .O(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_xor0003 )
+ );
+ LUT2 #(
+ .INIT ( 4'h6 ))
+ \BU2/U0/grf.rf/gcx.clkx/Mxor_wr_pntr_gc_xor0000_Result1 (
+ .I0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [4]),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .O(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_xor0000 )
+ );
+ LUT2 #(
+ .INIT ( 4'h6 ))
+ \BU2/U0/grf.rf/gcx.clkx/Mxor_wr_pntr_gc_xor0001_Result1 (
+ .I0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .O(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_xor0001 )
+ );
+ LUT2 #(
+ .INIT ( 4'h6 ))
+ \BU2/U0/grf.rf/gcx.clkx/Mxor_wr_pntr_gc_xor0002_Result1 (
+ .I0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .O(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_xor0002 )
+ );
+ LUT2 #(
+ .INIT ( 4'h6 ))
+ \BU2/U0/grf.rf/gcx.clkx/Mxor_wr_pntr_gc_xor0003_Result1 (
+ .I0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .O(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_xor0003 )
+ );
+ LUT2 #(
+ .INIT ( 4'h6 ))
+ \BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count_xor<1>11 (
+ .I0(\BU2/U0/grf.rf/gl0.rd/rpntr/count [0]),
+ .I1(\BU2/U0/grf.rf/gl0.rd/rpntr/count [1]),
+ .O(\BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count1 )
+ );
+ LUT2 #(
+ .INIT ( 4'h6 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count_xor<1>11 (
+ .I0(\BU2/U0/grf.rf/gl0.wr/wpntr/count [1]),
+ .I1(\BU2/U0/grf.rf/gl0.wr/wpntr/count [0]),
+ .O(\BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count1 )
+ );
+ LUT2 #(
+ .INIT ( 4'h6 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_xor00001 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [3]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [4]),
+ .O(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_xor0000 )
+ );
+ LUT2 #(
+ .INIT ( 4'h6 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_xor00001 (
+ .I0(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [3]),
+ .I1(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [4]),
+ .O(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_xor0000 )
+ );
+ LUT2 #(
+ .INIT ( 4'h4 ))
+ \BU2/U0/grf.rf/rstblk/rd_rst_comb1 (
+ .I0(\BU2/U0/grf.rf/rstblk/rd_rst_asreg_d2_90 ),
+ .I1(\BU2/U0/grf.rf/rstblk/rd_rst_asreg_94 ),
+ .O(\BU2/U0/grf.rf/rstblk/rd_rst_comb )
+ );
+ LUT2 #(
+ .INIT ( 4'h4 ))
+ \BU2/U0/grf.rf/rstblk/wr_rst_comb1 (
+ .I0(\BU2/U0/grf.rf/rstblk/wr_rst_asreg_d2_92 ),
+ .I1(\BU2/U0/grf.rf/rstblk/wr_rst_asreg_95 ),
+ .O(\BU2/U0/grf.rf/rstblk/wr_rst_comb )
+ );
+ FDPE #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_almost_full_i (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/prog_full_i_not0001 ),
+ .D(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_almost_full_i_mux0000 ),
+ .PRE(\BU2/U0/grf.rf/rstblk/rst_d2_88 ),
+ .Q(almost_full)
+ );
+ FDP #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i (
+ .C(wr_clk),
+ .D(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i_mux0000 ),
+ .PRE(\BU2/U0/grf.rf/rstblk/rst_d2_88 ),
+ .Q(full)
+ );
+ FDP #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_fb_i (
+ .C(wr_clk),
+ .D(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i_mux0000 ),
+ .PRE(\BU2/U0/grf.rf/rstblk/rst_d2_88 ),
+ .Q(\BU2/U0/grf.rf/gl0.wr/gwas.wsts/ram_full_fb_i_370 )
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_0 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [0]),
+ .Q(dout_3[0])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_1 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [1]),
+ .Q(dout_3[1])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_2 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [2]),
+ .Q(dout_3[2])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_3 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [3]),
+ .Q(dout_3[3])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_4 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [4]),
+ .Q(dout_3[4])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_5 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [5]),
+ .Q(dout_3[5])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_6 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [6]),
+ .Q(dout_3[6])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_7 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [7]),
+ .Q(dout_3[7])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_8 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [8]),
+ .Q(dout_3[8])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_9 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [9]),
+ .Q(dout_3[9])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_10 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [10]),
+ .Q(dout_3[10])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_11 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [11]),
+ .Q(dout_3[11])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_12 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [12]),
+ .Q(dout_3[12])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_13 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [13]),
+ .Q(dout_3[13])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_14 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [14]),
+ .Q(dout_3[14])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_15 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [15]),
+ .Q(dout_3[15])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_16 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [16]),
+ .Q(dout_3[16])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_17 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [17]),
+ .Q(dout_3[17])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_18 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [18]),
+ .Q(dout_3[18])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_19 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [19]),
+ .Q(dout_3[19])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_20 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [20]),
+ .Q(dout_3[20])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_21 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [21]),
+ .Q(dout_3[21])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_22 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [22]),
+ .Q(dout_3[22])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_23 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [23]),
+ .Q(dout_3[23])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_24 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [24]),
+ .Q(dout_3[24])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_25 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [25]),
+ .Q(dout_3[25])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_26 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [26]),
+ .Q(dout_3[26])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_27 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [27]),
+ .Q(dout_3[27])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_28 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [28]),
+ .Q(dout_3[28])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_29 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [29]),
+ .Q(dout_3[29])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_30 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [30]),
+ .Q(dout_3[30])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_31 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [31]),
+ .Q(dout_3[31])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_32 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [32]),
+ .Q(dout_3[32])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_33 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [33]),
+ .Q(dout_3[33])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_34 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [34]),
+ .Q(dout_3[34])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/dout_i_35 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/mem/dout_i_not0001 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [35]),
+ .Q(dout_3[35])
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM72 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[35]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM72_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N147 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM71 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[35]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM71_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N145 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM70 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[34]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM70_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N143 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM69 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[34]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM69_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N141 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM67 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[33]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM67_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N137 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM66 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[32]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM66_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N135 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM68 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[33]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM68_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N139 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM65 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[32]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM65_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N133 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM64 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[31]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM64_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N131 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM63 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[31]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM63_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N129 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM62 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[30]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM62_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N127 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM60 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[29]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM60_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N123 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM59 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[29]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM59_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N121 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM61 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[30]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM61_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N125 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM58 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[28]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM58_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N119 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM57 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[28]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM57_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N117 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM56 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[27]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM56_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N115 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM55 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[27]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM55_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N113 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM53 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[26]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM53_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N109 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM52 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[25]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM52_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N107 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM54 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[26]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM54_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N111 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM50 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[24]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM50_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N103 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM49 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[24]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM49_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N101 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM51 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[25]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM51_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N105 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM47 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[23]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM47_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N97 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM46 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[22]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM46_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N95 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM48 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[23]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM48_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N99 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM45 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[22]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM45_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N93 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM44 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[21]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM44_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N91 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM43 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[21]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM43_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N89 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM42 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[20]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM42_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N87 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM40 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[19]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM40_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N83 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM39 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[19]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM39_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N81 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM41 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[20]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM41_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N85 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM38 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[18]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM38_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N79 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM37 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[18]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM37_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N77 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM36 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[17]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM36_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N75 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM35 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[17]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM35_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N73 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM33 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[16]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM33_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N69 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM32 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[15]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM32_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N67 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM34 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[16]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM34_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N71 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM31 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[15]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM31_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N65 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM30 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[14]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM30_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N63 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM29 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[14]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM29_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N61 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM28 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[13]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM28_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N59 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM26 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[12]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM26_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N55 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM25 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[12]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM25_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N53 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM27 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[13]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM27_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N57 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM24 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[11]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM24_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N51 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM23 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[11]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM23_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N49 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM22 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[10]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM22_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N47 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM21 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[10]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM21_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N45 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM19 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[9]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM19_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N41 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM18 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[8]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM18_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N39 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM20 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[9]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM20_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N43 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM17 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[8]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM17_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N37 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM16 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[7]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM16_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N35 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM15 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[7]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM15_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N33 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM14 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[6]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM14_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N31 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM12 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[5]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM12_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N27 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM11 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[5]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM11_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N25 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM13 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[6]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM13_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N29 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM10 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[4]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM10_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N23 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM9 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[4]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM9_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N21 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM8 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[3]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM8_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N19 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM7 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[3]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM7_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N17 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM5 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[2]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM5_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N13 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM4 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[1]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM4_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N11 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM6 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[2]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM6_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N15 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM3 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[1]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM3_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N9 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM2 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[0]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl1_296 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM2_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N7 )
+ );
+ RAM16X1D \BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM1 (
+ .A0(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0]),
+ .A1(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1]),
+ .A2(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2]),
+ .A3(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3]),
+ .D(din_2[0]),
+ .DPRA0(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0]),
+ .DPRA1(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1]),
+ .DPRA2(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2]),
+ .DPRA3(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3]),
+ .WCLK(wr_clk),
+ .WE(\BU2/U0/grf.rf/mem/gdm.dm/write_ctrl_294 ),
+ .SPO(\NLW_BU2/U0/grf.rf/mem/gdm.dm/Mram_RAM1_SPO_UNCONNECTED ),
+ .DPO(\BU2/U0/grf.rf/mem/gdm.dm/N5 )
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_35 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [35]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [35])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_34 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [34]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [34])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_33 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [33]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [33])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_32 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [32]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [32])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_31 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [31]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [31])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_30 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [30]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [30])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_29 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [29]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [29])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_28 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [28]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [28])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_27 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [27]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [27])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_26 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [26]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [26])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_25 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [25]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [25])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_24 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [24]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [24])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_23 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [23]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [23])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_22 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [22]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [22])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_21 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [21]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [21])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_20 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [20]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [20])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_19 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [19]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [19])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_18 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [18]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [18])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_17 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [17]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [17])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_16 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [16]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [16])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_15 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [15]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [15])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_14 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [14]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [14])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_13 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [13]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [13])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_12 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [12]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [12])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_11 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [11]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [11])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_10 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [10]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [10])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_9 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [9]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [9])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_8 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [8]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [8])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_7 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [7]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [7])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_6 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [6]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [6])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_5 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [5]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [5])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_4 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [4]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [4])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_3 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [3]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [3])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_2 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [2]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [2])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_1 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [1]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [1])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/mem/gdm.dm/dout_i_0 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/mem/gdm.dm/_varindex0000 [0]),
+ .Q(\BU2/U0/grf.rf/mem/gdm.dm/dout_i [0])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_d3_0 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [0]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [0])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_d3_1 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [1]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [1])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_d3_2 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [2]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [2])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_d3_3 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [3]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [3])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_d3_4 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [4]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [4])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_d2_4 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d1 [4]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [4])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_d2_3 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d1 [3]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [3])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_d2_1 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d1 [1]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [1])
+ );
+ FDPE #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_d2_0 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d1 [0]),
+ .PRE(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [0])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_d2_2 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d1 [2]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [2])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_d1_4 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/count [4]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d1 [4])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_d1_3 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/count [3]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d1 [3])
+ );
+ FDPE #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_d1_1 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/count [1]),
+ .PRE(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d1 [1])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_d1_0 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/count [0]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d1 [0])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_d1_2 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/count [2]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d1 [2])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_2 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count2 ),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count [2])
+ );
+ FDPE #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_0 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count ),
+ .PRE(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count [0])
+ );
+ FDPE #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_1 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count1 ),
+ .PRE(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count [1])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_3 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count3 ),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count [3])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.wr/wpntr/count_4 (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/Mcount_count4 ),
+ .Q(\BU2/U0/grf.rf/gl0.wr/wpntr/count [4])
+ );
+ FDPE #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/prog_full_i (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/prog_full_i_not0001 ),
+ .D(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/prog_full_i_mux0003 ),
+ .PRE(\BU2/U0/grf.rf/rstblk/rst_d2_88 ),
+ .Q(prog_full)
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/diff_pntr_pad_4 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/diff_pntr_pad_add0000 [4]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/diff_pntr_pad [4])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/diff_pntr_pad_5 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/diff_pntr_pad_add0000 [5]),
+ .Q(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/diff_pntr_pad [5])
+ );
+ MUXCY \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_cy<0> (
+ .CI(\BU2/N1 ),
+ .DI(\BU2/U0/grf.rf/gl0.wr/ram_wr_en_i1_197 ),
+ .S(\BU2/rd_data_count [0]),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_cy [0])
+ );
+ MUXCY \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_cy<1> (
+ .CI(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_cy [0]),
+ .DI(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [0]),
+ .S(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_lut [1]),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_cy [1])
+ );
+ MUXCY \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_cy<2> (
+ .CI(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_cy [1]),
+ .DI(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [1]),
+ .S(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_lut [2]),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_cy [2])
+ );
+ MUXCY \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_cy<3> (
+ .CI(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_cy [2]),
+ .DI(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [2]),
+ .S(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_lut [3]),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_cy [3])
+ );
+ MUXCY \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_cy<4> (
+ .CI(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_cy [3]),
+ .DI(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d2 [3]),
+ .S(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_lut [4]),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_cy [4])
+ );
+ XORCY \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_xor<4> (
+ .CI(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_cy [3]),
+ .LI(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_lut [4]),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/diff_pntr_pad_add0000 [4])
+ );
+ XORCY \BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_xor<5> (
+ .CI(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_cy [4]),
+ .LI(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/Madd_diff_pntr_pad_add0000_lut [5]),
+ .O(\BU2/U0/grf.rf/gl0.wr/gwas.gpf.wrpf/diff_pntr_pad_add0000 [5])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state_0 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [2]),
+ .D(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state_mux0001 [1]),
+ .Q(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state [0])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state_1 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [2]),
+ .D(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state_mux0001 [0]),
+ .Q(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/curr_fwft_state [1])
+ );
+ FDP #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/gl0.rd/gr1.rfwft/empty_fwft_i (
+ .C(rd_clk),
+ .D(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/empty_fwft_i_mux0000 ),
+ .PRE(\BU2/U0/grf.rf/rstblk/rd_rst_reg [2]),
+ .Q(empty)
+ );
+ FDP #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/gl0.rd/gr1.rfwft/empty_fwft_fb (
+ .C(rd_clk),
+ .D(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/empty_fwft_i_mux0000 ),
+ .PRE(\BU2/U0/grf.rf/rstblk/rd_rst_reg [2]),
+ .Q(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/empty_fwft_fb_176 )
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.rd/rpntr/count_d1_0 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [2]),
+ .D(\BU2/U0/grf.rf/gl0.rd/rpntr/count [0]),
+ .Q(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [0])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.rd/rpntr/count_d1_1 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [2]),
+ .D(\BU2/U0/grf.rf/gl0.rd/rpntr/count [1]),
+ .Q(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [1])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.rd/rpntr/count_d1_2 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [2]),
+ .D(\BU2/U0/grf.rf/gl0.rd/rpntr/count [2]),
+ .Q(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [2])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.rd/rpntr/count_d1_3 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [2]),
+ .D(\BU2/U0/grf.rf/gl0.rd/rpntr/count [3]),
+ .Q(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [3])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.rd/rpntr/count_d1_4 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [2]),
+ .D(\BU2/U0/grf.rf/gl0.rd/rpntr/count [4]),
+ .Q(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.rd/rpntr/count_2 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [2]),
+ .D(\BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count2 ),
+ .Q(\BU2/U0/grf.rf/gl0.rd/rpntr/count [2])
+ );
+ FDPE #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/gl0.rd/rpntr/count_0 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .D(\BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count ),
+ .PRE(\BU2/U0/grf.rf/rstblk/rd_rst_reg [2]),
+ .Q(\BU2/U0/grf.rf/gl0.rd/rpntr/count [0])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.rd/rpntr/count_1 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [2]),
+ .D(\BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count1 ),
+ .Q(\BU2/U0/grf.rf/gl0.rd/rpntr/count [1])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.rd/rpntr/count_3 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [2]),
+ .D(\BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count3 ),
+ .Q(\BU2/U0/grf.rf/gl0.rd/rpntr/count [3])
+ );
+ FDCE #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gl0.rd/rpntr/count_4 (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/gl0.rd/gr1.rfwft/Mmux_RAM_RD_EN_FWFT21_160 ),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [2]),
+ .D(\BU2/U0/grf.rf/gl0.rd/rpntr/Mcount_count4 ),
+ .Q(\BU2/U0/grf.rf/gl0.rd/rpntr/count [4])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_0 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_xor0003 ),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc [0])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_1 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_xor0002 ),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc [1])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_2 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_xor0001 ),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc [2])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_3 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_xor0000 ),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc [3])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_4 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gl0.wr/wpntr/count_d3 [4]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc [4])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_0 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_xor0003 ),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc [0])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_1 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_xor0002 ),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc [1])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_2 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_xor0001 ),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc [2])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_3 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_xor0000 ),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc [3])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_4 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gl0.rd/rpntr/count_d1 [4]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc [4])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_0 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc [0]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg [0])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_1 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc [1]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg [1])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_2 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc [2]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg [2])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_3 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc [3]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg [3])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_4 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc [4]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg [4])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_0 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc [0]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg [0])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_1 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc [1]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg [1])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_2 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc [2]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg [2])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_3 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc [3]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg [3])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_4 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc [4]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg [4])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1_0 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg [0]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [0])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1_1 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg [1]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [1])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1_2 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg [2]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [2])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1_3 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg [3]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [3])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1_4 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg [4]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [4])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1_0 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg [0]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [0])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1_1 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg [1]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [1])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1_2 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg [2]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [2])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1_3 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg [3]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [3])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1_4 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg [4]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [4])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_0 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_xor0003_120 ),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin [0])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_1 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_xor0002 ),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin [1])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_2 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_xor0001 ),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin [2])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_3 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_xor0000 ),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin [3])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin_4 (
+ .C(rd_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_gc_asreg_d1 [4]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/wr_pntr_bin [4])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_0 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_xor0003_110 ),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [0])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_1 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_xor0002 ),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [1])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_2 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_xor0001 ),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [2])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_3 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_xor0000 ),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [3])
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin_4 (
+ .C(wr_clk),
+ .CLR(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0]),
+ .D(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_gc_asreg_d1 [4]),
+ .Q(\BU2/U0/grf.rf/gcx.clkx/rd_pntr_bin [4])
+ );
+ FDP #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/rstblk/wr_rst_reg_0 (
+ .C(wr_clk),
+ .D(\BU2/rd_data_count [0]),
+ .PRE(\BU2/U0/grf.rf/rstblk/wr_rst_comb ),
+ .Q(\BU2/U0/grf.rf/rstblk/wr_rst_reg [0])
+ );
+ FDP #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/rstblk/wr_rst_reg_1 (
+ .C(wr_clk),
+ .D(\BU2/rd_data_count [0]),
+ .PRE(\BU2/U0/grf.rf/rstblk/wr_rst_comb ),
+ .Q(\BU2/U0/grf.rf/rstblk/wr_rst_reg [1])
+ );
+ FDP #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/rstblk/rd_rst_reg_0 (
+ .C(rd_clk),
+ .D(\BU2/rd_data_count [0]),
+ .PRE(\BU2/U0/grf.rf/rstblk/rd_rst_comb ),
+ .Q(\BU2/U0/grf.rf/rstblk/rd_rst_reg [0])
+ );
+ FDP #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/rstblk/rd_rst_reg_1 (
+ .C(rd_clk),
+ .D(\BU2/rd_data_count [0]),
+ .PRE(\BU2/U0/grf.rf/rstblk/rd_rst_comb ),
+ .Q(\BU2/U0/grf.rf/rstblk/rd_rst_reg [1])
+ );
+ FDP #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/rstblk/rd_rst_reg_2 (
+ .C(rd_clk),
+ .D(\BU2/rd_data_count [0]),
+ .PRE(\BU2/U0/grf.rf/rstblk/rd_rst_comb ),
+ .Q(\BU2/U0/grf.rf/rstblk/rd_rst_reg [2])
+ );
+ FDP #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/rstblk/rst_d1 (
+ .C(wr_clk),
+ .D(\BU2/rd_data_count [0]),
+ .PRE(rst),
+ .Q(\BU2/U0/grf.rf/rstblk/rst_d1_93 )
+ );
+ FDPE \BU2/U0/grf.rf/rstblk/rd_rst_asreg (
+ .C(rd_clk),
+ .CE(\BU2/U0/grf.rf/rstblk/rd_rst_asreg_d1_89 ),
+ .D(\BU2/rd_data_count [0]),
+ .PRE(rst),
+ .Q(\BU2/U0/grf.rf/rstblk/rd_rst_asreg_94 )
+ );
+ FD #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/rstblk/wr_rst_asreg_d1 (
+ .C(wr_clk),
+ .D(\BU2/U0/grf.rf/rstblk/wr_rst_asreg_95 ),
+ .Q(\BU2/U0/grf.rf/rstblk/wr_rst_asreg_d1_91 )
+ );
+ FDPE \BU2/U0/grf.rf/rstblk/wr_rst_asreg (
+ .C(wr_clk),
+ .CE(\BU2/U0/grf.rf/rstblk/wr_rst_asreg_d1_91 ),
+ .D(\BU2/rd_data_count [0]),
+ .PRE(rst),
+ .Q(\BU2/U0/grf.rf/rstblk/wr_rst_asreg_95 )
+ );
+ FD #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/rstblk/rd_rst_asreg_d1 (
+ .C(rd_clk),
+ .D(\BU2/U0/grf.rf/rstblk/rd_rst_asreg_94 ),
+ .Q(\BU2/U0/grf.rf/rstblk/rd_rst_asreg_d1_89 )
+ );
+ FDP #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/rstblk/rst_d2 (
+ .C(wr_clk),
+ .D(\BU2/U0/grf.rf/rstblk/rst_d1_93 ),
+ .PRE(rst),
+ .Q(\BU2/U0/grf.rf/rstblk/rst_d2_88 )
+ );
+ FD #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/rstblk/wr_rst_asreg_d2 (
+ .C(wr_clk),
+ .D(\BU2/U0/grf.rf/rstblk/wr_rst_asreg_d1_91 ),
+ .Q(\BU2/U0/grf.rf/rstblk/wr_rst_asreg_d2_92 )
+ );
+ FD #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/rstblk/rd_rst_asreg_d2 (
+ .C(rd_clk),
+ .D(\BU2/U0/grf.rf/rstblk/rd_rst_asreg_d1_89 ),
+ .Q(\BU2/U0/grf.rf/rstblk/rd_rst_asreg_d2_90 )
+ );
+ FDP #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/rstblk/rst_d3 (
+ .C(wr_clk),
+ .D(\BU2/U0/grf.rf/rstblk/rst_d2_88 ),
+ .PRE(rst),
+ .Q(\BU2/U0/grf.rf/rstblk/rst_d3_86 )
+ );
+ FDC #(
+ .INIT ( 1'b0 ))
+ \BU2/U0/grf.rf/rstblk/RST_FULL_GEN (
+ .C(wr_clk),
+ .CLR(rst),
+ .D(\BU2/U0/grf.rf/rstblk/rst_d3_86 ),
+ .Q(\BU2/U0/grf.rf/rstblk/RST_FULL_GEN_87 )
+ );
+ FDP #(
+ .INIT ( 1'b1 ))
+ \BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i (
+ .C(rd_clk),
+ .D(\BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_or0000 ),
+ .PRE(\BU2/U0/grf.rf/rstblk/rd_rst_reg [2]),
+ .Q(\BU2/U0/grf.rf/gl0.rd/gras.rsts/ram_empty_fb_i_85 )
+ );
+ VCC \BU2/XST_VCC (
+ .P(\BU2/N1 )
+ );
+ GND \BU2/XST_GND (
+ .G(\BU2/rd_data_count [0])
+ );
+
+// synthesis translate_on
+
+endmodule
+
+// synthesis translate_off
+
+`ifndef GLBL
+`define GLBL
+
+`timescale 1 ps / 1 ps
+
+module glbl ();
+
+ parameter ROC_WIDTH = 100000;
+ parameter TOC_WIDTH = 0;
+
+ wire GSR;
+ wire GTS;
+ wire GWE;
+ wire PRLD;
+ tri1 p_up_tmp;
+ tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
+
+ reg GSR_int;
+ reg GTS_int;
+ reg PRLD_int;
+
+//-------- JTAG Globals --------------
+ wire JTAG_TDO_GLBL;
+ wire JTAG_TCK_GLBL;
+ wire JTAG_TDI_GLBL;
+ wire JTAG_TMS_GLBL;
+ wire JTAG_TRST_GLBL;
+
+ reg JTAG_CAPTURE_GLBL;
+ reg JTAG_RESET_GLBL;
+ reg JTAG_SHIFT_GLBL;
+ reg JTAG_UPDATE_GLBL;
+ reg JTAG_RUNTEST_GLBL;
+
+ reg JTAG_SEL1_GLBL = 0;
+ reg JTAG_SEL2_GLBL = 0 ;
+ reg JTAG_SEL3_GLBL = 0;
+ reg JTAG_SEL4_GLBL = 0;
+
+ reg JTAG_USER_TDO1_GLBL = 1'bz;
+ reg JTAG_USER_TDO2_GLBL = 1'bz;
+ reg JTAG_USER_TDO3_GLBL = 1'bz;
+ reg JTAG_USER_TDO4_GLBL = 1'bz;
+
+ assign (weak1, weak0) GSR = GSR_int;
+ assign (weak1, weak0) GTS = GTS_int;
+ assign (weak1, weak0) PRLD = PRLD_int;
+
+ initial begin
+ GSR_int = 1'b1;
+ PRLD_int = 1'b1;
+ #(ROC_WIDTH)
+ GSR_int = 1'b0;
+ PRLD_int = 1'b0;
+ end
+
+ initial begin
+ GTS_int = 1'b1;
+ #(TOC_WIDTH)
+ GTS_int = 1'b0;
+ end
+
+endmodule
+
+`endif
+
+// synthesis translate_on
diff --git a/usrp2/coregen/fifo_xlnx_32x36_2clk.veo b/usrp2/coregen/fifo_xlnx_32x36_2clk.veo
new file mode 100644
index 000000000..eb98a2b70
--- /dev/null
+++ b/usrp2/coregen/fifo_xlnx_32x36_2clk.veo
@@ -0,0 +1,47 @@
+/*******************************************************************************
+* This file is owned and controlled by Xilinx and must be used *
+* solely for design, simulation, implementation and creation of *
+* design files limited to Xilinx devices or technologies. Use *
+* with non-Xilinx devices or technologies is expressly prohibited *
+* and immediately terminates your license. *
+* *
+* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" *
+* SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR *
+* XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION *
+* AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION *
+* OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS *
+* IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, *
+* AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE *
+* FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY *
+* WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE *
+* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR *
+* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF *
+* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS *
+* FOR A PARTICULAR PURPOSE. *
+* *
+* Xilinx products are not intended for use in life support *
+* appliances, devices, or systems. Use in such applications are *
+* expressly prohibited. *
+* *
+* (c) Copyright 1995-2009 Xilinx, Inc. *
+* All rights reserved. *
+*******************************************************************************/
+// The following must be inserted into your Verilog file for this
+// core to be instantiated. Change the instance name and port connections
+// (in parentheses) to your own signal names.
+
+//----------- Begin Cut here for INSTANTIATION Template ---// INST_TAG
+fifo_xlnx_32x36_2clk YourInstanceName (
+ .rst(rst),
+ .wr_clk(wr_clk),
+ .rd_clk(rd_clk),
+ .din(din), // Bus [35 : 0]
+ .wr_en(wr_en),
+ .rd_en(rd_en),
+ .dout(dout), // Bus [35 : 0]
+ .full(full),
+ .almost_full(almost_full),
+ .empty(empty),
+ .prog_full(prog_full));
+
+// INST_TAG_END ------ End INSTANTIATION Template ---------
diff --git a/usrp2/coregen/fifo_xlnx_32x36_2clk.xco b/usrp2/coregen/fifo_xlnx_32x36_2clk.xco
new file mode 100644
index 000000000..1cf4c8ba5
--- /dev/null
+++ b/usrp2/coregen/fifo_xlnx_32x36_2clk.xco
@@ -0,0 +1,84 @@
+##############################################################
+#
+# Xilinx Core Generator version 12.2
+# Date: Fri Oct 15 07:50:15 2010
+#
+##############################################################
+#
+# This file contains the customisation parameters for a
+# Xilinx CORE Generator IP GUI. It is strongly recommended
+# that you do not manually alter this file as it may cause
+# unexpected and unsupported behavior.
+#
+##############################################################
+#
+# BEGIN Project Options
+SET addpads = false
+SET asysymbol = false
+SET busformat = BusFormatAngleBracketNotRipped
+SET createndf = false
+SET designentry = Verilog
+SET device = xc3s2000
+SET devicefamily = spartan3
+SET flowvendor = Other
+SET formalverification = false
+SET foundationsym = false
+SET implementationfiletype = Ngc
+SET package = fg456
+SET removerpms = false
+SET simulationfiles = Structural
+SET speedgrade = -5
+SET verilogsim = true
+SET vhdlsim = false
+# END Project Options
+# BEGIN Select
+SELECT Fifo_Generator family Xilinx,_Inc. 6.1
+# END Select
+# BEGIN Parameters
+CSET almost_empty_flag=false
+CSET almost_full_flag=true
+CSET component_name=fifo_xlnx_32x36_2clk
+CSET data_count=false
+CSET data_count_width=5
+CSET disable_timing_violations=false
+CSET dout_reset_value=0
+CSET empty_threshold_assert_value=4
+CSET empty_threshold_negate_value=5
+CSET enable_ecc=false
+CSET enable_int_clk=false
+CSET enable_reset_synchronization=true
+CSET fifo_implementation=Independent_Clocks_Distributed_RAM
+CSET full_flags_reset_value=1
+CSET full_threshold_assert_value=24
+CSET full_threshold_negate_value=23
+CSET inject_dbit_error=false
+CSET inject_sbit_error=false
+CSET input_data_width=36
+CSET input_depth=32
+CSET output_data_width=36
+CSET output_depth=32
+CSET overflow_flag=false
+CSET overflow_sense=Active_High
+CSET performance_options=First_Word_Fall_Through
+CSET programmable_empty_type=No_Programmable_Empty_Threshold
+CSET programmable_full_type=Single_Programmable_Full_Threshold_Constant
+CSET read_clock_frequency=1
+CSET read_data_count=false
+CSET read_data_count_width=5
+CSET reset_pin=true
+CSET reset_type=Asynchronous_Reset
+CSET underflow_flag=false
+CSET underflow_sense=Active_High
+CSET use_dout_reset=true
+CSET use_embedded_registers=false
+CSET use_extra_logic=false
+CSET valid_flag=false
+CSET valid_sense=Active_High
+CSET write_acknowledge_flag=false
+CSET write_acknowledge_sense=Active_High
+CSET write_clock_frequency=1
+CSET write_data_count=false
+CSET write_data_count_width=5
+# END Parameters
+GENERATE
+# CRC: 8e84ee7f
diff --git a/usrp2/coregen/fifo_xlnx_32x36_2clk.xise b/usrp2/coregen/fifo_xlnx_32x36_2clk.xise
new file mode 100644
index 000000000..0c3544a33
--- /dev/null
+++ b/usrp2/coregen/fifo_xlnx_32x36_2clk.xise
@@ -0,0 +1,72 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">
+
+ <header>
+ <!-- ISE source project file created by Project Navigator. -->
+ <!-- -->
+ <!-- This file contains project source information including a list of -->
+ <!-- project source files, project and process properties. This file, -->
+ <!-- along with the project source files, is sufficient to open and -->
+ <!-- implement in ISE Project Navigator. -->
+ <!-- -->
+ <!-- Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved. -->
+ </header>
+
+ <version xil_pn:ise_version="12.2" xil_pn:schema_version="2"/>
+
+ <files>
+ <file xil_pn:name="fifo_xlnx_32x36_2clk.ngc" xil_pn:type="FILE_NGC">
+ <association xil_pn:name="BehavioralSimulation"/>
+ <association xil_pn:name="Implementation"/>
+ </file>
+ <file xil_pn:name="fifo_xlnx_32x36_2clk.v" xil_pn:type="FILE_VERILOG">
+ <association xil_pn:name="BehavioralSimulation"/>
+ <association xil_pn:name="Implementation"/>
+ <association xil_pn:name="PostMapSimulation"/>
+ <association xil_pn:name="PostRouteSimulation"/>
+ <association xil_pn:name="PostTranslateSimulation"/>
+ </file>
+ </files>
+
+ <properties>
+ <property xil_pn:name="Auto Implementation Top" xil_pn:value="false" xil_pn:valueState="non-default"/>
+ <property xil_pn:name="Device" xil_pn:value="xc3s2000" xil_pn:valueState="non-default"/>
+ <property xil_pn:name="Device Family" xil_pn:value="Spartan3" xil_pn:valueState="non-default"/>
+ <property xil_pn:name="Implementation Stop View" xil_pn:value="PreSynthesis" xil_pn:valueState="non-default"/>
+ <property xil_pn:name="Implementation Top" xil_pn:value="Module|fifo_xlnx_32x36_2clk" xil_pn:valueState="non-default"/>
+ <property xil_pn:name="Implementation Top File" xil_pn:value="fifo_xlnx_32x36_2clk.ngc" xil_pn:valueState="non-default"/>
+ <property xil_pn:name="Implementation Top Instance Path" xil_pn:value="/fifo_xlnx_32x36_2clk" xil_pn:valueState="non-default"/>
+ <property xil_pn:name="Package" xil_pn:value="fg456" xil_pn:valueState="default"/>
+ <property xil_pn:name="Preferred Language" xil_pn:value="Verilog" xil_pn:valueState="default"/>
+ <property xil_pn:name="Project Generator" xil_pn:value="CoreGen" xil_pn:valueState="non-default"/>
+ <property xil_pn:name="Property Specification in Project File" xil_pn:value="Store all values" xil_pn:valueState="default"/>
+ <property xil_pn:name="Simulator" xil_pn:value="ISim (VHDL/Verilog)" xil_pn:valueState="default"/>
+ <property xil_pn:name="Speed Grade" xil_pn:value="-5" xil_pn:valueState="default"/>
+ <property xil_pn:name="Synthesis Tool" xil_pn:value="XST (VHDL/Verilog)" xil_pn:valueState="default"/>
+ <property xil_pn:name="Top-Level Source Type" xil_pn:value="HDL" xil_pn:valueState="default"/>
+ <property xil_pn:name="Working Directory" xil_pn:value="." xil_pn:valueState="non-default"/>
+ <!-- -->
+ <!-- The following properties are for internal use only. These should not be modified.-->
+ <!-- -->
+ <property xil_pn:name="PROP_DesignName" xil_pn:value="fifo_xlnx_32x36_2clk" xil_pn:valueState="non-default"/>
+ <property xil_pn:name="PROP_DevFamilyPMName" xil_pn:value="spartan3" xil_pn:valueState="default"/>
+ <property xil_pn:name="PROP_intProjectCreationTimestamp" xil_pn:value="2010-10-15T00:50:17" xil_pn:valueState="non-default"/>
+ <property xil_pn:name="PROP_intWbtProjectID" xil_pn:value="F8449944117490A53CFE9CD2127BE2AA" xil_pn:valueState="non-default"/>
+ <property xil_pn:name="PROP_intWorkingDirLocWRTProjDir" xil_pn:value="Same" xil_pn:valueState="non-default"/>
+ <property xil_pn:name="PROP_intWorkingDirUsed" xil_pn:value="No" xil_pn:valueState="non-default"/>
+ </properties>
+
+ <bindings/>
+
+ <libraries/>
+
+ <autoManagedFiles>
+ <!-- The following files are identified by `include statements in verilog -->
+ <!-- source files and are automatically managed by Project Navigator. -->
+ <!-- -->
+ <!-- Do not hand-edit this section, as it will be overwritten when the -->
+ <!-- project is analyzed based on files automatically identified as -->
+ <!-- include files. -->
+ </autoManagedFiles>
+
+</project>
diff --git a/usrp2/coregen/fifo_xlnx_32x36_2clk_flist.txt b/usrp2/coregen/fifo_xlnx_32x36_2clk_flist.txt
new file mode 100644
index 000000000..b8c69a9f7
--- /dev/null
+++ b/usrp2/coregen/fifo_xlnx_32x36_2clk_flist.txt
@@ -0,0 +1,12 @@
+# Output products list for <fifo_xlnx_32x36_2clk>
+_xmsgs/pn_parser.xmsgs
+fifo_generator_ug175.pdf
+fifo_xlnx_32x36_2clk.gise
+fifo_xlnx_32x36_2clk.ngc
+fifo_xlnx_32x36_2clk.v
+fifo_xlnx_32x36_2clk.veo
+fifo_xlnx_32x36_2clk.xco
+fifo_xlnx_32x36_2clk.xise
+fifo_xlnx_32x36_2clk_flist.txt
+fifo_xlnx_32x36_2clk_readme.txt
+fifo_xlnx_32x36_2clk_xmdf.tcl
diff --git a/usrp2/coregen/fifo_xlnx_32x36_2clk_readme.txt b/usrp2/coregen/fifo_xlnx_32x36_2clk_readme.txt
new file mode 100644
index 000000000..8ab5679fd
--- /dev/null
+++ b/usrp2/coregen/fifo_xlnx_32x36_2clk_readme.txt
@@ -0,0 +1,46 @@
+The following files were generated for 'fifo_xlnx_32x36_2clk' in directory
+/home/ianb/ettus/sram_fifo/fpgapriv/usrp2/coregen/
+
+fifo_generator_ug175.pdf:
+ Please see the core data sheet.
+
+fifo_xlnx_32x36_2clk.gise:
+ ISE Project Navigator support file. This is a generated file and should
+ not be edited directly.
+
+fifo_xlnx_32x36_2clk.ngc:
+ Binary Xilinx implementation netlist file containing the information
+ required to implement the module in a Xilinx (R) FPGA.
+
+fifo_xlnx_32x36_2clk.v:
+ Unisim Verilog file containing the information required to simulate
+ the module.
+
+fifo_xlnx_32x36_2clk.veo:
+ VEO template file containing code that can be used as a model for
+ instantiating a CORE Generator module in a Verilog design.
+
+fifo_xlnx_32x36_2clk.xco:
+ CORE Generator input file containing the parameters used to
+ regenerate a core.
+
+fifo_xlnx_32x36_2clk.xise:
+ ISE Project Navigator support file. This is a generated file and should
+ not be edited directly.
+
+fifo_xlnx_32x36_2clk_readme.txt:
+ Text file indicating the files generated and how they are used.
+
+fifo_xlnx_32x36_2clk_xmdf.tcl:
+ ISE Project Navigator interface file. ISE uses this file to determine
+ how the files output by CORE Generator for the core can be integrated
+ into your ISE project.
+
+fifo_xlnx_32x36_2clk_flist.txt:
+ Text file listing all of the output files produced when a customized
+ core was generated in the CORE Generator.
+
+
+Please see the Xilinx CORE Generator online help for further details on
+generated files and how to use them.
+
diff --git a/usrp2/coregen/fifo_xlnx_32x36_2clk_xmdf.tcl b/usrp2/coregen/fifo_xlnx_32x36_2clk_xmdf.tcl
new file mode 100644
index 000000000..ec9426357
--- /dev/null
+++ b/usrp2/coregen/fifo_xlnx_32x36_2clk_xmdf.tcl
@@ -0,0 +1,68 @@
+# The package naming convention is <core_name>_xmdf
+package provide fifo_xlnx_32x36_2clk_xmdf 1.0
+
+# This includes some utilities that support common XMDF operations
+package require utilities_xmdf
+
+# Define a namespace for this package. The name of the name space
+# is <core_name>_xmdf
+namespace eval ::fifo_xlnx_32x36_2clk_xmdf {
+# Use this to define any statics
+}
+
+# Function called by client to rebuild the params and port arrays
+# Optional when the use context does not require the param or ports
+# arrays to be available.
+proc ::fifo_xlnx_32x36_2clk_xmdf::xmdfInit { instance } {
+# Variable containg name of library into which module is compiled
+# Recommendation: <module_name>
+# Required
+utilities_xmdf::xmdfSetData $instance Module Attributes Name fifo_xlnx_32x36_2clk
+}
+# ::fifo_xlnx_32x36_2clk_xmdf::xmdfInit
+
+# Function called by client to fill in all the xmdf* data variables
+# based on the current settings of the parameters
+proc ::fifo_xlnx_32x36_2clk_xmdf::xmdfApplyParams { instance } {
+
+set fcount 0
+# Array containing libraries that are assumed to exist
+# Examples include unisim and xilinxcorelib
+# Optional
+# In this example, we assume that the unisim library will
+# be magically
+# available to the simulation and synthesis tool
+utilities_xmdf::xmdfSetData $instance FileSet $fcount type logical_library
+utilities_xmdf::xmdfSetData $instance FileSet $fcount logical_library unisim
+incr fcount
+
+utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_generator_ug175.pdf
+utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView
+incr fcount
+
+utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_xlnx_32x36_2clk.ngc
+utilities_xmdf::xmdfSetData $instance FileSet $fcount type ngc
+incr fcount
+
+utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_xlnx_32x36_2clk.v
+utilities_xmdf::xmdfSetData $instance FileSet $fcount type verilog
+incr fcount
+
+utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_xlnx_32x36_2clk.veo
+utilities_xmdf::xmdfSetData $instance FileSet $fcount type verilog_template
+incr fcount
+
+utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_xlnx_32x36_2clk.xco
+utilities_xmdf::xmdfSetData $instance FileSet $fcount type coregen_ip
+incr fcount
+
+utilities_xmdf::xmdfSetData $instance FileSet $fcount relative_path fifo_xlnx_32x36_2clk_xmdf.tcl
+utilities_xmdf::xmdfSetData $instance FileSet $fcount type AnyView
+incr fcount
+
+utilities_xmdf::xmdfSetData $instance FileSet $fcount associated_module fifo_xlnx_32x36_2clk
+incr fcount
+
+}
+
+# ::gen_comp_name_xmdf::xmdfApplyParams
diff --git a/usrp2/extramfifo/ext_fifo.v b/usrp2/extramfifo/ext_fifo.v
index 2af59a75d..2a8d57448 100644
--- a/usrp2/extramfifo/ext_fifo.v
+++ b/usrp2/extramfifo/ext_fifo.v
@@ -18,7 +18,7 @@
//`define NO_EXT_FIFO
module ext_fifo
- #(parameter INT_WIDTH=36,EXT_WIDTH=18,RAM_DEPTH=19,FIFO_DEPTH=19)
+ #(parameter INT_WIDTH=36,EXT_WIDTH=18,RAM_DEPTH=19,FIFO_DEPTH=19)
(
input int_clk,
input ext_clk,
@@ -44,34 +44,29 @@ module ext_fifo
wire [EXT_WIDTH-1:0] write_data;
wire [EXT_WIDTH-1:0] read_data;
- wire full1, empty1;
- wire almost_full2, full2, empty2;
+ wire full1, empty1;
+ wire almost_full2, full2, empty2;
wire [INT_WIDTH-1:0] data_to_fifo;
wire [INT_WIDTH-1:0] data_from_fifo;
wire [FIFO_DEPTH-1:0] capacity;
-
+ wire space_avail;
+ wire data_avail;
+
+ // These next 2 lines here purely because ICARUS is crap at handling generate statements.
+ // Empirically this has been determined to make simulations work.
+ wire read_input_fifo = space_avail & ~empty1;
+ wire write_output_fifo = data_avail;
- // FIFO buffers data from UDP engine into external FIFO clock domain.
- fifo_xlnx_512x36_2clk_36to18 fifo_xlnx_512x36_2clk_36to18_i1 (
- .rst(rst),
- .wr_clk(int_clk),
- .rd_clk(ext_clk),
- .din(datain), // Bus [35 : 0]
- .wr_en(src_rdy_i),
- .rd_en(space_avail&~empty1),
- .dout(write_data), // Bus [17 : 0]
- .full(full1),
- .empty(empty1));
-
- assign dst_rdy_o = ~full1;
+ assign src_rdy_o = ~empty2;
+ assign dst_rdy_o = ~full1;
`ifdef NO_EXT_FIFO
- assign space_avail = ~full2;
- assign data_avail = ~empty1;
- assign read_data = write_data;
+ assign space_avail = ~full2;
+ assign data_avail = ~empty1;
+ assign read_data = write_data;
`else
- // External FIFO running at ext clock rate and 18 bit width.
+ // External FIFO running at ext clock rate and 18 or 36 bit width.
nobl_fifo #(.WIDTH(EXT_WIDTH),.RAM_DEPTH(RAM_DEPTH),.FIFO_DEPTH(FIFO_DEPTH))
nobl_fifo_i1
(
@@ -95,22 +90,67 @@ module ext_fifo
.capacity(capacity)
);
`endif // !`ifdef NO_EXT_FIFO
+
-
- // FIFO buffers data read from external FIFO into DSP clk domain and to TX DSP.
- fifo_xlnx_512x36_2clk_18to36 fifo_xlnx_512x36_2clk_18to36_i1 (
- .rst(rst),
- .wr_clk(ext_clk),
- .rd_clk(int_clk),
- .din(read_data), // Bus [17 : 0]
- .wr_en(data_avail),
- .rd_en(dst_rdy_i),
- .dout(dataout), // Bus [35 : 0]
- .full(full2),
- .prog_full(almost_full2),
- .empty(empty2));
- assign src_rdy_o = ~empty2;
+ generate
+ if (EXT_WIDTH == 18 && INT_WIDTH == 36) begin: fifo_g1
+ // FIFO buffers data from UDP engine into external FIFO clock domain.
+ fifo_xlnx_512x36_2clk_36to18 fifo_xlnx_512x36_2clk_36to18_i1 (
+ .rst(rst),
+ .wr_clk(int_clk),
+ .rd_clk(ext_clk),
+ .din(datain), // Bus [35 : 0]
+ .wr_en(src_rdy_i),
+ .rd_en(read_input_fifo),
+ .dout(write_data), // Bus [17 : 0]
+ .full(full1),
+ .empty(empty1));
+
+ // FIFO buffers data read from external FIFO into DSP clk domain and to TX DSP.
+ fifo_xlnx_512x36_2clk_18to36 fifo_xlnx_512x36_2clk_18to36_i1 (
+ .rst(rst),
+ .wr_clk(ext_clk),
+ .rd_clk(int_clk),
+ .din(read_data), // Bus [17 : 0]
+ .wr_en(write_output_fifo),
+ .rd_en(dst_rdy_i),
+ .dout(dataout), // Bus [35 : 0]
+ .full(full2),
+ .prog_full(almost_full2),
+ .empty(empty2));
+ end // block: fifo_g1
+ else if (EXT_WIDTH == 36 && INT_WIDTH == 36) begin: fifo_g1
+ // FIFO buffers data from UDP engine into external FIFO clock domain.
+ fifo_xlnx_32x36_2clk fifo_xlnx_32x36_2clk_i1 (
+ .rst(rst),
+ .wr_clk(int_clk),
+ .rd_clk(ext_clk),
+ .din(datain), // Bus [35 : 0]
+ .wr_en(src_rdy_i),
+ .rd_en(read_input_fifo),
+ .dout(write_data), // Bus [35 : 0]
+ .full(full1),
+ .empty(empty1));
+
+ // FIFO buffers data read from external FIFO into DSP clk domain and to TX DSP.
+ fifo_xlnx_32x36_2clk fifo_xlnx_32x36_2clk_i2 (
+ .rst(rst),
+ .wr_clk(ext_clk),
+ .rd_clk(int_clk),
+ .din(read_data), // Bus [35 : 0]
+ .wr_en(write_output_fifo),
+ .rd_en(dst_rdy_i),
+ .dout(dataout), // Bus [35 : 0]
+ .full(full2),
+ .empty(empty2),
+ .prog_full(almost_full2));
+
+ end
+ endgenerate
+
+
+
always @ (posedge int_clk)
debug[31:28] <= {empty2,full1,dst_rdy_i,src_rdy_i };
@@ -118,6 +158,7 @@ module ext_fifo
debug[27:0] <= {RAM_WEn,RAM_CE1n,RAM_A[3:0],read_data[17:0],empty1,space_avail,data_avail,almost_full2 };
always@ (posedge ext_clk)
-// debug2[31:0] <= {write_data[15:0],read_data[15:0]};
- debug2[31:0] <= 0;
+ // debug2[31:0] <= {write_data[15:0],read_data[15:0]};
+ debug2[31:0] <= 0;
+
endmodule // ext_fifo
diff --git a/usrp2/extramfifo/ext_fifo_tb.sh b/usrp2/extramfifo/ext_fifo_tb.sh
index dcfede37a..dcfede37a 100644..100755
--- a/usrp2/extramfifo/ext_fifo_tb.sh
+++ b/usrp2/extramfifo/ext_fifo_tb.sh
diff --git a/usrp2/extramfifo/ext_fifo_tb.v b/usrp2/extramfifo/ext_fifo_tb.v
index 0eda89769..5f4e28719 100644
--- a/usrp2/extramfifo/ext_fifo_tb.v
+++ b/usrp2/extramfifo/ext_fifo_tb.v
@@ -1,18 +1,31 @@
`timescale 1ns / 1ps
-`define INT_WIDTH 36
-`define EXT_WIDTH 18
-`define RAM_DEPTH 19
-`define FIFO_DEPTH 8
-`define DUMP_VCD_FULL
-
-module ext_fifo_tb();
+//`define USRP2
+`define USRP2PLUS
+`ifdef USRP2
+ `define INT_WIDTH 36
+ `define EXT_WIDTH 18
+ `define RAM_DEPTH 19
+ `define FIFO_DEPTH 8
+ `define DUMP_VCD_FULL
+ `define INT_CLK_PERIOD 5
+ `define EXT_CLK_PERIOD 4
+`elsif USRP2PLUS
+ `define INT_WIDTH 36
+ `define EXT_WIDTH 36
+ `define RAM_DEPTH 18
+ `define FIFO_DEPTH 8
+ `define DUMP_VCD_FULL
+ `define INT_CLK_PERIOD 5
+ `define EXT_CLK_PERIOD 5
+`endif // `ifdef USRP2
+
+module ext_fifo_tb();
+
reg int_clk;
reg ext_clk;
reg rst;
-
-
wire [`EXT_WIDTH-1:0] RAM_D_pi;
wire [`EXT_WIDTH-1:0] RAM_D_po;
@@ -33,7 +46,6 @@ module ext_fifo_tb();
reg dst_rdy_i;
integer ether_frame;
-
// Clocks
// Int clock is 100MHz
// Ext clock is 125MHz
@@ -47,10 +59,10 @@ module ext_fifo_tb();
end
always
- #5 int_clk <= ~int_clk;
+ #(`INT_CLK_PERIOD/2) int_clk <= ~int_clk;
always
- #4 ext_clk <= ~ext_clk;
+ #(`EXT_CLK_PERIOD/2) ext_clk <= ~ext_clk;
initial
begin
@@ -270,7 +282,7 @@ module ext_fifo_tb();
//
generate
- for (i=0;i<18;i=i+1)
+ for (i=0;i<`EXT_WIDTH;i=i+1)
begin : gen_RAM_D_IO
IOBUF #(
@@ -309,28 +321,53 @@ module ext_fifo_tb();
assign #2 RAM_A_ext = RAM_A;
-
- idt71v65603s150 idt71v65603s150_i1
- (
- .A(RAM_A_ext[17:0]),
- .adv_ld_(RAM_LDn_ext), // advance (high) / load (low)
- .bw1_(1'b0),
- .bw2_(1'b0),
- .bw3_(1'b1),
- .bw4_(1'b1), // byte write enables (low)
- .ce1_(RAM_CE1n_ext),
- .ce2(1'b1),
- .ce2_(1'b0), // chip enables
- .cen_(RAM_CENn_ext), // clock enable (low)
- .clk(ext_clk), // clock
- .IO({RAM_D[16:9],RAM_D[7:0]}),
- .IOP({RAM_D[17],RAM_D[8]}), // data bus
- .lbo_(1'b0), // linear burst order (low)
- .oe_(RAM_OEn_ext), // output enable (low)
- .r_w_(RAM_WEn_ext)
- ); // read (high) / write (low)
+ generate
+ if (`EXT_WIDTH==18) begin: ram_tb_g1
+ idt71v65603s150 idt71v65603s150_i1
+ (
+ .A(RAM_A_ext[17:0]),
+ .adv_ld_(RAM_LDn_ext), // advance (high) / load (low)
+ .bw1_(1'b0),
+ .bw2_(1'b0),
+ .bw3_(1'b1),
+ .bw4_(1'b1), // byte write enables (low)
+ .ce1_(RAM_CE1n_ext),
+ .ce2(1'b1),
+ .ce2_(1'b0), // chip enables
+ .cen_(RAM_CENn_ext), // clock enable (low)
+ .clk(ext_clk), // clock
+ .IO({RAM_D[16:9],RAM_D[7:0]}),
+ .IOP({RAM_D[17],RAM_D[8]}), // data bus
+ .lbo_(1'b0), // linear burst order (low)
+ .oe_(RAM_OEn_ext), // output enable (low)
+ .r_w_(RAM_WEn_ext)
+ ); // read (high) / write (low)
+ end // block: ram_tb_g1
+ else if (`EXT_WIDTH==36) begin: ram_tb_g1
+ idt71v65603s150 idt71v65603s150_i1
+ (
+ .A(RAM_A_ext[17:0]),
+ .adv_ld_(RAM_LDn_ext), // advance (high) / load (low)
+ .bw1_(1'b0),
+ .bw2_(1'b0),
+ .bw3_(1'b0),
+ .bw4_(1'b0), // byte write enables (low)
+ .ce1_(RAM_CE1n_ext),
+ .ce2(1'b1),
+ .ce2_(1'b0), // chip enables
+ .cen_(RAM_CENn_ext), // clock enable (low)
+ .clk(ext_clk), // clock
+ .IO(RAM_D[31:0]),
+ .IOP(RAM_D[35:32]), // data bus
+ .lbo_(1'b0), // linear burst order (low)
+ .oe_(RAM_OEn_ext), // output enable (low)
+ .r_w_(RAM_WEn_ext)
+ ); // read (high) / write (low)
+ end // block: ram_tb_g1
+ endgenerate
+
/* -----\/----- EXCLUDED -----\/-----
diff --git a/usrp2/extramfifo/nobl_fifo.v b/usrp2/extramfifo/nobl_fifo.v
index 4c009d980..0b63768fc 100644
--- a/usrp2/extramfifo/nobl_fifo.v
+++ b/usrp2/extramfifo/nobl_fifo.v
@@ -70,26 +70,27 @@ module nobl_fifo
// Simple NoBL SRAM interface, 4 cycle read latency.
// Read/Write arbitration via temprary application of empty/full flags.
//
- nobl_if nobl_if_i1
- (
- .clk(clk),
- .rst(rst),
- .RAM_D_pi(RAM_D_pi),
- .RAM_D_po(RAM_D_po),
- .RAM_D_poe(RAM_D_poe),
- .RAM_A(RAM_A),
- .RAM_WEn(RAM_WEn),
- .RAM_CENn(RAM_CENn),
- .RAM_LDn(RAM_LDn),
- .RAM_OEn(RAM_OEn),
- .RAM_CE1n(RAM_CE1n),
- .address(address),
- .data_out(write_data),
- .data_in(read_data),
- .data_in_valid(data_avail),
- .write(write),
- .enable(enable)
- );
+ nobl_if #(.WIDTH(WIDTH),.DEPTH(RAM_DEPTH))
+ nobl_if_i1
+ (
+ .clk(clk),
+ .rst(rst),
+ .RAM_D_pi(RAM_D_pi),
+ .RAM_D_po(RAM_D_po),
+ .RAM_D_poe(RAM_D_poe),
+ .RAM_A(RAM_A),
+ .RAM_WEn(RAM_WEn),
+ .RAM_CENn(RAM_CENn),
+ .RAM_LDn(RAM_LDn),
+ .RAM_OEn(RAM_OEn),
+ .RAM_CE1n(RAM_CE1n),
+ .address(address),
+ .data_out(write_data),
+ .data_in(read_data),
+ .data_in_valid(data_avail),
+ .write(write),
+ .enable(enable)
+ );
diff --git a/usrp2/top/u2plus/Makefile b/usrp2/top/u2plus/Makefile
index 23eb8908e..c38bd3ec1 100644
--- a/usrp2/top/u2plus/Makefile
+++ b/usrp2/top/u2plus/Makefile
@@ -24,6 +24,8 @@ include ../../vrt/Makefile.srcs
include ../../udp/Makefile.srcs
include ../../coregen/Makefile.srcs
include ../../extram/Makefile.srcs
+include ../../extramfifo/Makefile.srcs
+
##################################################
# Project Properties
diff --git a/usrp2/top/u2plus/u2plus.ucf b/usrp2/top/u2plus/u2plus.ucf
index aee9e57bf..3717b3d91 100755
--- a/usrp2/top/u2plus/u2plus.ucf
+++ b/usrp2/top/u2plus/u2plus.ucf
@@ -414,3 +414,11 @@ NET "ser_rx_clk" TNM_NET = "ser_rx_clk";
TIMESPEC "TS_ser_rx_clk" = PERIOD "ser_rx_clk" 10 ns HIGH 50 %;
TIMESPEC "TS_clk_div_to_dsp_clk" = FROM "clk_div" TO "dcm_out" 10 ns;
+
+NET "CLK_FPGA_P" CLOCK_DEDICATED_ROUTE = FALSE;
+PIN "DCM_INST/DCM_SP.CLKIN" CLOCK_DEDICATED_ROUTE = FALSE;
+
+NET "RAM_CLK" CLOCK_DEDICATED_ROUTE = FALSE;
+PIN "DCM_INST1/DCM_SP.CLKFB" CLOCK_DEDICATED_ROUTE = FALSE;
+
+
diff --git a/usrp2/top/u2plus/u2plus.v b/usrp2/top/u2plus/u2plus.v
index 90dbe9d55..55b5bd8f4 100644
--- a/usrp2/top/u2plus/u2plus.v
+++ b/usrp2/top/u2plus/u2plus.v
@@ -216,7 +216,49 @@ module u2plus
BUFG dspclk_BUFG (.I(dcm_out), .O(dsp_clk));
BUFG wbclk_BUFG (.I(clk_div), .O(wb_clk));
-
+
+ wire RAM_CLK_buf;
+ wire clk100_ext;
+ wire clk100_ext_buf;
+
+ DCM DCM_INST1 (.CLKFB(RAM_CLK_buf),
+ .CLKIN(clk_fpga),
+ .DSSEN(1'b0),
+ .PSCLK(1'b0),
+ .PSEN(1'b0),
+ .PSINCDEC(1'b0),
+ .RST(1'b0),
+ .CLK0(clk100_ext) );
+ defparam DCM_INST1.CLK_FEEDBACK = "1X";
+ defparam DCM_INST1.CLKDV_DIVIDE = 2.0;
+ defparam DCM_INST1.CLKFX_DIVIDE = 1;
+ defparam DCM_INST1.CLKFX_MULTIPLY = 4;
+ defparam DCM_INST1.CLKIN_DIVIDE_BY_2 = "FALSE";
+ defparam DCM_INST1.CLKIN_PERIOD = 10.000;
+ defparam DCM_INST1.CLKOUT_PHASE_SHIFT = "FIXED";
+ defparam DCM_INST1.DESKEW_ADJUST = "SYSTEM_SYNCHRONOUS";
+ defparam DCM_INST1.DFS_FREQUENCY_MODE = "LOW";
+ defparam DCM_INST1.DLL_FREQUENCY_MODE = "LOW";
+ defparam DCM_INST1.DUTY_CYCLE_CORRECTION = "TRUE";
+ defparam DCM_INST1.FACTORY_JF = 16'h8080;
+ defparam DCM_INST1.PHASE_SHIFT = -64;
+ defparam DCM_INST1.STARTUP_WAIT = "FALSE";
+
+ IBUFG RAM_CLK_buf_i1 (.I(RAM_CLK),
+ .O(RAM_CLK_buf));
+
+ BUFG clk100_ext_buf_i1 (.I(clk100_ext),
+ .O(clk100_ext_buf));
+
+ OFDDRRSE RAM_CLK_i1 (.Q(RAM_CLK),
+ .C0(clk100_ext_buf),
+ .C1(~clk100_ext_buf),
+ .CE(1'b1),
+ .D0(1'b1),
+ .D1(1'b0),
+ .R(1'b0),
+ .S(1'b0));
+
// I2C -- Don't use external transistors for open drain, the FPGA implements this
IOBUF scl_pin(.O(scl_pad_i), .IO(SCL), .I(scl_pad_o), .T(scl_pad_oen_o));
IOBUF sda_pin(.O(sda_pad_i), .IO(SDA), .I(sda_pad_o), .T(sda_pad_oen_o));
@@ -299,6 +341,36 @@ module u2plus
.S(0) // Synchronous preset input
);
*/
+
+
+ //
+ // Instantiate IO for Bidirectional bus to SRAM
+ //
+ wire [35:0] RAM_D_pi;
+ wire [35:0] RAM_D_po;
+ wire RAM_D_poe;
+
+ genvar i;
+
+ generate
+ for (i=0;i<36;i=i+1)
+ begin : gen_RAM_D_IO
+
+ IOBUF #(
+ .DRIVE(12),
+ .IOSTANDARD("LVCMOS25"),
+ .SLEW("FAST")
+ )
+ RAM_D_i (
+ .O(RAM_D_pi[i]),
+ .I(RAM_D_po[i]),
+ .IO(RAM_D[i]),
+ .T(RAM_D_poe)
+ );
+ end // block: gen_RAM_D_IO
+ endgenerate
+
+
wire [15:0] dac_a_int, dac_b_int;
// DAC A and B are swapped in schematic to facilitate clean layout
@@ -377,11 +449,12 @@ module u2plus
.sen_rx_dac (SEN_RX_DAC),
.io_tx (io_tx[15:0]),
.io_rx (io_rx[15:0]),
- .RAM_D (RAM_D),
+ .RAM_D_po (RAM_D_po),
+ .RAM_D_pi (RAM_D_pi),
+ .RAM_D_poe (RAM_D_poe),
.RAM_A (RAM_A),
.RAM_CE1n (RAM_CE1n),
.RAM_CENn (RAM_CENn),
- .RAM_CLK (RAM_CLK),
.RAM_WEn (RAM_WEn),
.RAM_OEn (RAM_OEn),
.RAM_LDn (RAM_LDn),
@@ -398,6 +471,8 @@ module u2plus
);
assign RAM_ZZ = 1;
- assign RAM_BWn = 4'b1111;
+ // Byte Writes are qualified by the global write enable
+ // Always do 36bit operations to extram.
+ assign RAM_BWn = 4'b0000;
endmodule // u2plus
diff --git a/usrp2/top/u2plus/u2plus_core.v b/usrp2/top/u2plus/u2plus_core.v
index 4378436a6..9b177390a 100644
--- a/usrp2/top/u2plus/u2plus_core.v
+++ b/usrp2/top/u2plus/u2plus_core.v
@@ -110,11 +110,12 @@ module u2plus_core
inout [15:0] io_rx,
// External RAM
- inout [35:0] RAM_D,
+ input [35:0] RAM_D_pi,
+ output [35:0] RAM_D_po,
+ output RAM_D_poe,
output [20:0] RAM_A,
output RAM_CE1n,
output RAM_CENn,
- output RAM_CLK,
output RAM_WEn,
output RAM_OEn,
output RAM_LDn,
@@ -606,11 +607,41 @@ module u2plus_core
wire tx_src_rdy, tx_dst_rdy;
wire [31:0] debug_vt;
+/* -----\/----- EXCLUDED -----\/-----
fifo_cascade #(.WIDTH(36), .SIZE(DSP_TX_FIFOSIZE)) tx_fifo_cascade
(.clk(dsp_clk), .reset(dsp_rst), .clear(0),
.datain({rd1_flags,rd1_dat}), .src_rdy_i(rd1_ready_o), .dst_rdy_o(rd1_ready_i),
.dataout(tx_data), .src_rdy_o(tx_src_rdy), .dst_rdy_i(tx_dst_rdy) );
-
+ -----/\----- EXCLUDED -----/\----- */
+ // External and internal clock run at 100MHz for USRP2+ because ext RAM is 36bits wide
+ // and provides ample bandwidth.
+ assign RAM_A[20:18] = 3'b0;
+
+ ext_fifo #(.EXT_WIDTH(36),.INT_WIDTH(36),.RAM_DEPTH(18),.FIFO_DEPTH(18))
+ ext_fifo_i1
+ (
+ .int_clk(dsp_clk),
+ .ext_clk(dsp_clk),
+ .rst(dsp_rst),
+ .RAM_D_pi(RAM_D_pi),
+ .RAM_D_po(RAM_D_po),
+ .RAM_D_poe(RAM_D_poe),
+ .RAM_A(RAM_A[17:0]),
+ .RAM_WEn(RAM_WEn),
+ .RAM_CENn(RAM_CENn),
+ .RAM_LDn(RAM_LDn),
+ .RAM_OEn(RAM_OEn),
+ .RAM_CE1n(RAM_CE1n),
+ .datain({rd1_flags[3:2],rd1_dat[31:16],rd1_flags[1:0],rd1_dat[15:0]}),
+ .src_rdy_i(rd1_ready_o), // WRITE
+ .dst_rdy_o(rd1_ready_i), // not FULL
+ .dataout({tx_data[35:34],tx_data[31:16],tx_data[33:32],tx_data[15:0]}),
+ .src_rdy_o(tx_src_rdy), // not EMPTY
+ .dst_rdy_i(tx_dst_rdy),
+ .debug(debug_extfifo),
+ .debug2(debug_extfifo2)
+ );
+
vita_tx_chain #(.BASE_CTRL(SR_TX_CTRL), .BASE_DSP(SR_TX_DSP),
.REPORT_ERROR(1), .PROT_ENG_FLAGS(1))
vita_tx_chain
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-16 23:22:53 +0000