diff options
| -rw-r--r-- | host/lib/CMakeLists.txt | 5 | ||||
| -rwxr-xr-x | host/lib/ic_reg_maps/gen_ad7922_regs.py | 2 | ||||
| -rwxr-xr-x | host/lib/ic_reg_maps/gen_ad9510_regs.py | 2 | ||||
| -rwxr-xr-x | host/lib/ic_reg_maps/gen_ad9522_regs.py | 177 | ||||
| -rwxr-xr-x | host/lib/ic_reg_maps/gen_ad9862_regs.py | 10 | ||||
| -rwxr-xr-x | host/lib/ic_reg_maps/gen_adf4360_regs.py | 2 | ||||
| -rwxr-xr-x | host/lib/ic_reg_maps/gen_max2829_regs.py | 2 |
7 files changed, 188 insertions, 12 deletions
diff --git a/host/lib/CMakeLists.txt b/host/lib/CMakeLists.txt index a4e492b49..d11ecf13b 100644 --- a/host/lib/CMakeLists.txt +++ b/host/lib/CMakeLists.txt @@ -123,6 +123,11 @@ UHD_PYTHON_GEN_SOURCE_FILE( ${CMAKE_CURRENT_BINARY_DIR}/ic_reg_maps/ad9862_regs.hpp ) +UHD_PYTHON_GEN_SOURCE_FILE( + ${CMAKE_CURRENT_SOURCE_DIR}/ic_reg_maps/gen_ad9522_regs.py + ${CMAKE_CURRENT_BINARY_DIR}/ic_reg_maps/ad9522_regs.hpp +) + ######################################################################## # Add dboard sources ######################################################################## diff --git a/host/lib/ic_reg_maps/gen_ad7922_regs.py b/host/lib/ic_reg_maps/gen_ad7922_regs.py index 842d40430..5cec1924a 100755 --- a/host/lib/ic_reg_maps/gen_ad7922_regs.py +++ b/host/lib/ic_reg_maps/gen_ad7922_regs.py @@ -40,7 +40,7 @@ boost::uint16_t get_reg(void){ void set_reg(boost::uint16_t reg){ #for $reg in filter(lambda r: r.get_addr() == 0, $regs) - $reg.get_name() = (reg >> $reg.get_shift()) & $reg.get_mask(); + $reg.get_name() = $(reg.get_type())((reg >> $reg.get_shift()) & $reg.get_mask()); #end for } """ diff --git a/host/lib/ic_reg_maps/gen_ad9510_regs.py b/host/lib/ic_reg_maps/gen_ad9510_regs.py index 903063df1..83236c921 100755 --- a/host/lib/ic_reg_maps/gen_ad9510_regs.py +++ b/host/lib/ic_reg_maps/gen_ad9510_regs.py @@ -126,7 +126,7 @@ boost::uint32_t get_write_reg(boost::uint16_t addr){ } boost::uint32_t get_read_reg(boost::uint16_t addr){ - return (boost::uint32_t(addr) << 8) | (1 << 15); + return (boost::uint32_t(addr) << 8) | (1 << 23); } """ diff --git a/host/lib/ic_reg_maps/gen_ad9522_regs.py b/host/lib/ic_reg_maps/gen_ad9522_regs.py new file mode 100755 index 000000000..85c3e9f2b --- /dev/null +++ b/host/lib/ic_reg_maps/gen_ad9522_regs.py @@ -0,0 +1,177 @@ +#!/usr/bin/env python +# +# Copyright 2010 Ettus Research LLC +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see <http://www.gnu.org/licenses/>. +# + +######################################################################## +# Template for raw text data describing registers +# name addr[bit range inclusive] default optional enums +######################################################################## +REGS_TMPL="""\ +sdo_active 0x000[7] 0 +lsb_first_addr_incr 0x000[6] 0 +soft_reset 0x000[5] 0 +mirror 0x000[3:0] 0 +readback_active_registers 0x004[0] 0 +pfd_polarity 0x010[7] 0 +cp_current 0x010[6:4] 7 +cp_mode 0x010[3:2] 3 +pll_power_down 0x010[1:0] 1 +r_counter_lsb 0x011[7:0] 1 +r_counter_msb 0x012[5:0] 0 +a_counter 0x013[5:0] 0 +b_counter_lsb 0x014[7:0] 3 +b_counter_msb 0x015[4:0] 0 +set_cp_pin_to_vcp_2 0x016[7] 0 +reset_r_counter 0x016[6] 0 +reset_a_and_b_counters 0x016[5] 0 +reset_all_counters 0x016[4] 0 +b_counter_bypass 0x016[3] 0 +prescaler_p 0x016[2:0] 6 +status_pin_control 0x017[7:2] 0 +antibacklash_pulse_width 0x017[1:0] 0 +enb_cmos_ref_input_dc_off 0x018[7] 0 +lock_detect_counter 0x018[6:5] 0 +digital_lock_detect_window 0x018[4] 0 +disable_digital_lock_detect 0x018[3] 0 +vco_calibration_divider 0x018[2:1] 3 +vco_calibration_now 0x018[0] 0 +r_a_b_counters_sync_pin_rst 0x019[7:6] 0 +r_path_delay 0x019[5:3] 0 +n_path_delay 0x019[2:0] 0 +enable_status_pin_divider 0x01A[7] 0 +ref_freq_monitor_threshold 0x01A[6] 0 +ld_pin_control 0x01A[5:0] 0 +enable_vco_freq_monitor 0x01B[7] 0 +enable_ref2_freq_monitor 0x01B[6] 0 +enable_ref1_freq_monitor 0x01B[5] 0 +refmon_pin_control 0x01B[4:0] 0 +disable_switchover_deglitch 0x01C[7] 0 +select_ref2 0x01C[6] 0 +use_ref_sel_pin 0x01C[5] 0 +enb_auto_ref_switchover 0x01C[4] 0 +stay_on_ref2 0x01C[3] 0 +enable_ref2 0x01C[2] 0 +enable_ref1 0x01C[1] 0 +enable_differential_ref 0x01C[0] 0 +enb_stat_eeprom_at_stat_pin 0x01D[7] 1 +enable_xtal_osc 0x01D[6] 0 +enable_clock_doubler 0x01D[5] 0 +disable_pll_status_reg 0x01D[4] 0 +enable_ld_pin_comparator 0x01D[3] 0 +enable_external_holdover 0x01D[1] 0 +enable_holdover 0x01D[0] 0 +external_zero_delay_fcds 0x01E[4:3] 0 +enable_external_zero_delay 0x01E[2] 0 +enable_zero_delay 0x01E[1] 0 +######################################################################## +#for $i in range(12) +#set $addr = ($i + 0x0F0) +out$(i)_format $(addr)[7] 0 +out$(i)_cmos_configuration $(addr)[6:5] 3 +out$(i)_polarity $(addr)[4:3] 0 +out$(i)_lvds_diff_voltage $(addr)[2:1] 1 +out$(i)_lvds_power_down $(addr)[0] 0 +#end for +######################################################################## +#for $i in reversed(range(8)) +csdld_en_out_$i 0x0FC[$i] 0 +#end for +######################################################################## +#for $i in reversed(range(4)) +csdld_en_out_$(8 + $i) 0x0FD[$i] 0 +#end for +######################################################################## +#set $default_val = 0x7 +#for $i in range(4) +#set $addr0 = hex($i*3 + 0x190) +#set $addr1 = hex($i*3 + 0x191) +#set $addr2 = hex($i*3 + 0x192) +divider$(i)_low_cycles $(addr0)[7:4] $default_val +divider$(i)_high_cycles $(addr0)[3:0] $default_val +divider$(i)_bypass $(addr1)[7] 0 +divider$(i)_ignore_sync $(addr1)[6] 0 +divider$(i)_force_high $(addr1)[5] 0 +divider$(i)_start_high $(addr1)[4] 0 +divider$(i)_phase_offset $(addr1)[3:0] 0 +channel$(i)_power_down $(addr2)[2] 0 +disable_divider$(i)_ddc $(addr2)[0] 0 +#set $default_val /= 2 +#end for +######################################################################## +vco_divider 0x1E0[2:0] 2 +power_down_clock_input_sel 0x1E1[4] 0 +power_down_vco_clock_ifc 0x1E1[3] 0 +power_down_vco_and_clock 0x1E1[2] 0 +select_vco_or_clock 0x1E1[1] 0 +bypass_vco_divider 0x1E1[0] 0 +disable_power_on_sync 0x230[3] 0 +power_down_sync 0x230[2] 0 +power_down_dist_ref 0x230[1] 0 +soft_sync 0x230[0] 0 +io_update 0x232[0] 0 +soft_eeprom 0xB02[1] 0 +enable_eeprom_write 0xB02[0] 0 +reg2eeprom 0xB03[0] 0 +""" + +######################################################################## +# Template for methods in the body of the struct +######################################################################## +BODY_TMPL="""\ +boost::uint8_t get_reg(boost::uint16_t addr){ + boost::uint8_t reg = 0; + switch(addr){ + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + reg |= (boost::uint8_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); + #end for + break; + #end for + } + return reg; +} + +void set_reg(boost::uint8_t addr, boost::uint32_t reg){ + switch(addr){ + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) + case $addr: + #for $reg in filter(lambda r: r.get_addr() == addr, $regs) + $reg.get_name() = $(reg.get_type())((reg >> $reg.get_shift()) & $reg.get_mask()); + #end for + break; + #end for + } +} + +boost::uint32_t get_write_reg(boost::uint16_t addr){ + return (boost::uint32_t(addr) << 8) | get_reg(addr); +} + +boost::uint32_t get_read_reg(boost::uint16_t addr){ + return (boost::uint32_t(addr) << 8) | (1 << 23); +} + +""" + +if __name__ == '__main__': + import common; common.generate( + name='ad9522_regs', + regs_tmpl=REGS_TMPL, + body_tmpl=BODY_TMPL, + file=__file__, + ) diff --git a/host/lib/ic_reg_maps/gen_ad9862_regs.py b/host/lib/ic_reg_maps/gen_ad9862_regs.py index c912403ef..fdbea5828 100755 --- a/host/lib/ic_reg_maps/gen_ad9862_regs.py +++ b/host/lib/ic_reg_maps/gen_ad9862_regs.py @@ -216,18 +216,12 @@ boost::uint8_t get_reg(boost::uint8_t addr){ return reg; } -void set_reg(boost::uint16_t reg_word){ - boost::uint8_t addr = (reg_word >> 8) & 0x1f; - boost::uint8_t reg = (reg_word >> 0) & 0xff; +void set_reg(boost::uint8_t addr, boost::uint16_t reg){ switch(addr){ - #for $addr in range(0, 63+1) + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) case $addr: #for $reg in filter(lambda r: r.get_addr() == addr, $regs) - #if $reg.get_enums() $reg.get_name() = $(reg.get_type())((reg >> $reg.get_shift()) & $reg.get_mask()); - #else - $reg.get_name() = (reg >> $reg.get_shift()) & $reg.get_mask(); - #end if #end for break; #end for diff --git a/host/lib/ic_reg_maps/gen_adf4360_regs.py b/host/lib/ic_reg_maps/gen_adf4360_regs.py index 2a88dad8a..3fd8707a7 100755 --- a/host/lib/ic_reg_maps/gen_adf4360_regs.py +++ b/host/lib/ic_reg_maps/gen_adf4360_regs.py @@ -68,7 +68,7 @@ enum addr_t{ boost::uint32_t get_reg(addr_t addr){ boost::uint32_t reg = addr & 0x3; switch(addr){ - #for $addr in (0, 1, 2) + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) case $addr: #for $reg in filter(lambda r: r.get_addr() == addr, $regs) reg |= (boost::uint32_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); diff --git a/host/lib/ic_reg_maps/gen_max2829_regs.py b/host/lib/ic_reg_maps/gen_max2829_regs.py index 7f9f08daa..383131c18 100755 --- a/host/lib/ic_reg_maps/gen_max2829_regs.py +++ b/host/lib/ic_reg_maps/gen_max2829_regs.py @@ -112,7 +112,7 @@ BODY_TMPL="""\ boost::uint32_t get_reg(boost::uint8_t addr){ boost::uint16_t reg = 0; switch(addr){ - #for $addr in range(2, 12+1) + #for $addr in sorted(set(map(lambda r: r.get_addr(), $regs))) case $addr: #for $reg in filter(lambda r: r.get_addr() == addr, $regs) reg |= (boost::uint16_t($reg.get_name()) & $reg.get_mask()) << $reg.get_shift(); |