diff options
| -rw-r--r-- | timing/time_64bit.v | 33 | ||||
| -rw-r--r-- | top/u2_core/u2_core.v | 2 |
2 files changed, 30 insertions, 5 deletions
diff --git a/timing/time_64bit.v b/timing/time_64bit.v index ab0c12be6..84f79645c 100644 --- a/timing/time_64bit.v +++ b/timing/time_64bit.v @@ -6,11 +6,13 @@ module time_64bit (input clk, input rst, input set_stb, input [7:0] set_addr, input [31:0] set_data, input pps, - output [63:0] vita_time + output [63:0] vita_time, output pps_int ); - localparam NEXT_TICKS = 1; localparam NEXT_SECS = 0; + localparam NEXT_TICKS = 1; + localparam PPS_POL = 2; + localparam ROLLOVER = TICKS_PER_SEC - 1; reg [31:0] seconds; @@ -22,6 +24,7 @@ module time_64bit wire [31:0] next_seconds_preset; wire set_on_pps_trig; reg set_on_next_pps; + wire pps_polarity; setting_reg #(.my_addr(BASE+NEXT_TICKS)) sr_next_ticks (.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr), @@ -30,13 +33,33 @@ module time_64bit setting_reg #(.my_addr(BASE+NEXT_SECS)) sr_next_secs (.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr), .in(set_data),.out(next_seconds_preset),.changed(set_on_pps_trig)); + + setting_reg #(.my_addr(BASE+PPS_POL)) sr_pps_pol + (.clk(clk),.rst(rst),.strobe(set_stb),.addr(set_addr), + .in(set_data),.out(pps_polarity),.changed()); + + reg [1:0] pps_del; + reg pps_reg_p, pps_reg_n, pps_reg; + wire pps_edge; + + always @(posedge clk) pps_reg_p <= pps; + always @(negedge clk) pps_reg_n <= pps; + always @* pps_reg <= pps_polarity ? pps_reg_p : pps_reg_n; + + always @(posedge clk) + if(rst) + pps_del <= 2'b00; + else + pps_del <= {pps_del[0],pps_reg}; + + assign pps_edge = pps_del[0] & ~pps_del[1]; always @(posedge clk) if(rst) set_on_next_pps <= 0; else if(set_on_pps_trig) set_on_next_pps <= 1; - else if(pps) + else if(pps_edge) set_on_next_pps <= 0; always @(posedge clk) @@ -45,7 +68,7 @@ module time_64bit seconds <= 32'd0; ticks <= 32'd0; end - else if(pps & set_on_next_pps) + else if(pps_edge & set_on_next_pps) begin seconds <= next_seconds_preset; ticks <= next_ticks_preset; @@ -57,5 +80,7 @@ module time_64bit end else ticks <= ticks + 1; + + assign pps_int = pps_edge; endmodule // time_64bit diff --git a/top/u2_core/u2_core.v b/top/u2_core/u2_core.v index f9ac07a55..2fa490d26 100644 --- a/top/u2_core/u2_core.v +++ b/top/u2_core/u2_core.v @@ -678,7 +678,7 @@ module u2_core time_64bit #(.TICKS_PER_SEC(32'd100000000),.BASE(SR_TIME64)) time_64bit (.clk(dsp_clk), .rst(dsp_rst), .set_stb(set_stb), .set_addr(set_addr), .set_data(set_data), - .pps(pps_o), .vita_time(vita_time)); + .pps(pps_o), .vita_time(vita_time), .pps_int()); // ///////////////////////////////////////////////////////////////////////////////////////// // Debug Pins |