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-rw-r--r--firmware/zpu/apps/txrx_uhd.c39
-rw-r--r--firmware/zpu/lib/net_common.c25
-rw-r--r--host/lib/usrp/usrp2/fw_common.h6
-rw-r--r--host/lib/usrp/usrp2/usrp2_iface.cpp9
-rw-r--r--host/lib/usrp/usrp2/usrp2_iface.hpp3
-rw-r--r--host/lib/usrp/usrp2/usrp2_impl.cpp1
6 files changed, 51 insertions, 32 deletions
diff --git a/firmware/zpu/apps/txrx_uhd.c b/firmware/zpu/apps/txrx_uhd.c
index 37aa43b58..5bf8ca725 100644
--- a/firmware/zpu/apps/txrx_uhd.c
+++ b/firmware/zpu/apps/txrx_uhd.c
@@ -46,27 +46,47 @@
//virtual registers in the firmware to store persistent values
static uint32_t fw_regs[8];
-extern uint16_t dsp0_dst_port, err0_dst_port, dsp1_dst_port;
-
static void handle_udp_data_packet(
struct socket_address src, struct socket_address dst,
unsigned char *payload, int payload_len
){
- size_t which;
- switch(dst.port){
+ //handle ICMP destination unreachable
+ if (payload == NULL) switch(src.port){
+ case USRP2_UDP_RX_DSP0_PORT:
+ //the end continuous streaming command
+ sr_rx_ctrl0->cmd = 1 << 31; //no samples now
+ sr_rx_ctrl0->time_secs = 0;
+ sr_rx_ctrl0->time_ticks = 0; //latch the command
+ break;
+
+ case USRP2_UDP_RX_DSP1_PORT:
+ //the end continuous streaming command
+ sr_rx_ctrl1->cmd = 1 << 31; //no samples now
+ sr_rx_ctrl1->time_secs = 0;
+ sr_rx_ctrl1->time_ticks = 0; //latch the command
+ break;
+
+ case USRP2_UDP_TX_DSP0_PORT:
+ //end async update packets per second
+ sr_tx_ctrl->cyc_per_up = 0;
+ break;
+
+ default: return;
+ }
+
+ //handle an incoming UDP packet
+ size_t which = 0;
+ if (payload != 0) switch(dst.port){
case USRP2_UDP_RX_DSP0_PORT:
which = 0;
- dsp0_dst_port = src.port;
break;
case USRP2_UDP_RX_DSP1_PORT:
which = 2;
- dsp1_dst_port = src.port;
break;
case USRP2_UDP_TX_DSP0_PORT:
which = 1;
- err0_dst_port = src.port;
break;
default: return;
@@ -291,7 +311,10 @@ main(void)
#endif
printf("FPGA compatibility number: %d\n", USRP2_FPGA_COMPAT_NUM);
printf("Firmware compatibility number: %d\n", USRP2_FW_COMPAT_NUM);
-
+
+ //init readback for firmware minor version number
+ fw_regs[U2_FW_REG_VER_MINOR] = USRP2_FW_VER_MINOR;
+
#ifdef BOOTLOADER
//load the production FPGA image or firmware if appropriate
do_the_bootload_thing();
diff --git a/firmware/zpu/lib/net_common.c b/firmware/zpu/lib/net_common.c
index 2e3257b35..9a3f8c5a5 100644
--- a/firmware/zpu/lib/net_common.c
+++ b/firmware/zpu/lib/net_common.c
@@ -44,9 +44,6 @@ static const size_t out_buff_size = 2048;
static const eth_mac_addr_t BCAST_MAC_ADDR = {{0xff, 0xff, 0xff, 0xff, 0xff, 0xff}};
#define MAX_UDP_LISTENERS 6
-//used in the top level application...
-uint16_t dsp0_dst_port, err0_dst_port, dsp1_dst_port;
-
/***********************************************************************
* 16-bit one's complement sum
**********************************************************************/
@@ -312,25 +309,13 @@ handle_icmp_packet(struct ip_addr src, struct ip_addr dst,
struct udp_hdr *udp = (struct udp_hdr *)(((char *)ip) + IP_HLEN);
if (IPH_PROTO(ip) != IP_PROTO_UDP) break;
- if (udp->dest == dsp0_dst_port){
- //the end continuous streaming command
- sr_rx_ctrl0->cmd = 1 << 31; //no samples now
- sr_rx_ctrl0->time_secs = 0;
- sr_rx_ctrl0->time_ticks = 0; //latch the command
- }
- else if (udp->dest == dsp1_dst_port){
- //the end continuous streaming command
- sr_rx_ctrl1->cmd = 1 << 31; //no samples now
- sr_rx_ctrl1->time_secs = 0;
- sr_rx_ctrl1->time_ticks = 0; //latch the command
- }
- else if (udp->dest == err0_dst_port){
- //end async update packets per second
- sr_tx_ctrl->cyc_per_up = 0;
+ struct listener_entry *lx = find_listener_by_port(udp->src);
+ if (lx){
+ struct socket_address src = make_socket_address(ip->src, udp->src);
+ struct socket_address dst = make_socket_address(ip->dest, udp->dest);
+ lx->rcvr(src, dst, NULL, 0);
}
- //struct udp_hdr *udp = (struct udp_hdr *)((char *)icmp + 28);
- //printf("icmp port unr %d\n", udp->dest);
putchar('i');
}
else {
diff --git a/host/lib/usrp/usrp2/fw_common.h b/host/lib/usrp/usrp2/fw_common.h
index d47725e1f..83f4a1048 100644
--- a/host/lib/usrp/usrp2/fw_common.h
+++ b/host/lib/usrp/usrp2/fw_common.h
@@ -32,6 +32,7 @@ extern "C" {
//fpga and firmware compatibility numbers
#define USRP2_FPGA_COMPAT_NUM 7
#define USRP2_FW_COMPAT_NUM 10
+#define USRP2_FW_VER_MINOR 1
//used to differentiate control packets over data port
#define USRP2_INVALID_VRT_HEADER 0
@@ -44,6 +45,11 @@ extern "C" {
#define USRP2_UDP_TX_DSP0_PORT 49157
#define USRP2_UDP_RX_DSP1_PORT 49158
+// Map for virtual firmware regs (not very big so we can keep it here for now)
+#define U2_FW_REG_LOCK_TIME 0
+#define U2_FW_REG_LOCK_GPID 1
+#define U2_FW_REG_VER_MINOR 7
+
////////////////////////////////////////////////////////////////////////
// I2C addresses
////////////////////////////////////////////////////////////////////////
diff --git a/host/lib/usrp/usrp2/usrp2_iface.cpp b/host/lib/usrp/usrp2/usrp2_iface.cpp
index b1347119b..aaa5acbd5 100644
--- a/host/lib/usrp/usrp2/usrp2_iface.cpp
+++ b/host/lib/usrp/usrp2/usrp2_iface.cpp
@@ -46,10 +46,6 @@ static const boost::uint32_t MIN_PROTO_COMPAT_I2C = 7;
static const boost::uint32_t MIN_PROTO_COMPAT_REG = USRP2_FW_COMPAT_NUM;
static const boost::uint32_t MIN_PROTO_COMPAT_UART = 7;
-// Map for virtual firmware regs (not very big so we can keep it here for now)
-#define U2_FW_REG_LOCK_TIME 0
-#define U2_FW_REG_LOCK_GPID 1
-
//Define get_gpid() to get a globally unique identifier for this process.
//The gpid is implemented as a hash of the pid and a unique machine identifier.
#ifdef UHD_PLATFORM_WIN32
@@ -372,6 +368,11 @@ public:
UHD_THROW_INVALID_CODE_PATH();
}
+ const std::string get_fw_version_string(void){
+ boost::uint32_t minor = this->get_reg<boost::uint32_t, USRP2_REG_ACTION_FW_PEEK32>(U2_FW_REG_VER_MINOR);
+ return str(boost::format("%u.%u") % _protocol_compat % minor);
+ }
+
private:
//this lovely lady makes it all possible
udp_simple::sptr _ctrl_transport;
diff --git a/host/lib/usrp/usrp2/usrp2_iface.hpp b/host/lib/usrp/usrp2/usrp2_iface.hpp
index f36febce4..b3c3ef4a2 100644
--- a/host/lib/usrp/usrp2/usrp2_iface.hpp
+++ b/host/lib/usrp/usrp2/usrp2_iface.hpp
@@ -73,6 +73,9 @@ public:
//! Is this device locked?
virtual bool is_device_locked(void) = 0;
+ //! A version string for firmware
+ virtual const std::string get_fw_version_string(void) = 0;
+
//motherboard eeprom map structure
uhd::usrp::mboard_eeprom_t mb_eeprom;
};
diff --git a/host/lib/usrp/usrp2/usrp2_impl.cpp b/host/lib/usrp/usrp2/usrp2_impl.cpp
index 058a8f9aa..45db0d081 100644
--- a/host/lib/usrp/usrp2/usrp2_impl.cpp
+++ b/host/lib/usrp/usrp2/usrp2_impl.cpp
@@ -325,6 +325,7 @@ usrp2_impl::usrp2_impl(const device_addr_t &_device_addr){
addr, BOOST_STRINGIZE(USRP2_UDP_CTRL_PORT)
));
_tree->create<std::string>(mb_path / "name").set(_mbc[mb].iface->get_cname());
+ _tree->create<std::string>(mb_path / "fw_version").set(_mbc[mb].iface->get_fw_version_string());
//check the fpga compatibility number
const boost::uint32_t fpga_compat_num = _mbc[mb].iface->peek32(U2_REG_COMPAT_NUM_RB);
generated by cgit v1.2.3 (git 2.46.0) at 2025-10-31 02:43:13 +0000