diff options
| -rw-r--r-- | firmware/fx2/b100/fpga_load.c | 18 | ||||
| -rw-r--r-- | firmware/fx2/b100/usrp_regs.h | 15 |
2 files changed, 14 insertions, 19 deletions
diff --git a/firmware/fx2/b100/fpga_load.c b/firmware/fx2/b100/fpga_load.c index 54ef54ab3..394c9f50e 100644 --- a/firmware/fx2/b100/fpga_load.c +++ b/firmware/fx2/b100/fpga_load.c @@ -40,13 +40,6 @@ fpga_load_begin (void) udelay (40); // wait 40 us USRP_ALTERA_CONFIG |= bmALTERA_NCONFIG; // set NCONFIG high - if (UC_BOARD_HAS_FPGA){ - // FIXME should really cap this loop with a counter so we - // don't hang forever on a hardware failure. - while ((USRP_ALTERA_CONFIG & bmALTERA_NSTATUS) == 0) // wait for NSTATUS to go high - ; - } - // ready to xfer now return 1; @@ -78,9 +71,9 @@ clock_out_config_byte (unsigned char bits) for (i = 0; i < 8; i++){ - USRP_ALTERA_CONFIG = ((USRP_ALTERA_CONFIG & ~bmALTERA_DATA0) | ((bits & 1) ? bmALTERA_DATA0 : 0)); - USRP_ALTERA_CONFIG |= bmALTERA_DCLK; /* set DCLK to 1 */ - USRP_ALTERA_CONFIG &= ~bmALTERA_DCLK; /* set DCLK to 0 */ + bitALTERA_DATA0 = bits & 1; + bitALTERA_DCLK = 1; /* set DCLK to 1 */ + bitALTERA_DCLK = 0; /* set DCLK to 0 */ bits = bits >> 1; } @@ -180,10 +173,7 @@ fpga_load_end (void) if (!UC_BOARD_HAS_FPGA) // always true if we don't have FPGA return 1; - if ((status & bmALTERA_NSTATUS) == 0) // failed to program - return 0; - - if ((status & bmALTERA_CONF_DONE) == bmALTERA_CONF_DONE) + if (bitALTERA_CONF_DONE) return 1; // everything's cool // I don't think this should happen. It indicates that diff --git a/firmware/fx2/b100/usrp_regs.h b/firmware/fx2/b100/usrp_regs.h index 775b5dfd3..493a0c3de 100644 --- a/firmware/fx2/b100/usrp_regs.h +++ b/firmware/fx2/b100/usrp_regs.h @@ -41,7 +41,6 @@ #define bmALTERA_NCONFIG bmBIT1 #define bmALTERA_DATA0 bmBIT3 #define bmALTERA_NSTATUS bmBIT4 -#define bmALTERA_CONF_DONE bmBIT5 #define bmRESET_FPGA_FIFOS bmBIT7 @@ -49,7 +48,6 @@ | bmALTERA_NCONFIG \ | bmALTERA_DATA0 \ | bmALTERA_NSTATUS \ - | bmALTERA_CONF_DONE \ ) @@ -60,9 +58,16 @@ #define bmPORT_A_INITIAL 0 -sbit at 0x80+0 bitALTERA_DCLK; // 0x80 is the bit address of PORT A -sbit at 0x80+2 bitSHORT_PACKET_SIGNAL; -sbit at 0x80+3 bitALTERA_DATA0; +#define PORT_A_ADDR 0x80 +#define PORT_C_ADDR 0xA0 + +sbit at PORT_A_ADDR+0 bitALTERA_DCLK; // 0x80 is the bit address of PORT A +sbit at PORT_A_ADDR+1 bitALTERA_NCONFIG; +sbit at PORT_A_ADDR+2 bitSHORT_PACKET_SIGNAL; +sbit at PORT_A_ADDR+3 bitALTERA_DATA0; +sbit at PORT_A_ADDR+4 bitALTERA_NSTATUS; + +sbit at PORT_C_ADDR+7 bitALTERA_CONF_DONE; /* Port B: GPIF FD[7:0] */ |