diff options
| -rw-r--r-- | usrp2/gpif/gpif.v | 6 | ||||
| -rw-r--r-- | usrp2/top/u1plus/u1plus_core.v | 3 | ||||
| -rw-r--r-- | usrp2/vrt/Makefile.srcs | 1 | ||||
| -rw-r--r-- | usrp2/vrt/vita_pkt_gen.v | 42 | 
4 files changed, 48 insertions, 4 deletions
| diff --git a/usrp2/gpif/gpif.v b/usrp2/gpif/gpif.v index 2a9fd901e..007bb41b3 100644 --- a/usrp2/gpif/gpif.v +++ b/usrp2/gpif/gpif.v @@ -20,7 +20,7 @@ module gpif      input [35:0] tx_err_data_i, input tx_err_src_rdy_i, output tx_err_dst_rdy_o,      output tx_underrun, output rx_overrun, -    input [7:0] test_rate, input [3:0] test_ctrl, +    input [15:0] test_len, input [7:0] test_rate, input [3:0] test_ctrl,      output [31:0] debug0, output [31:0] debug1      ); @@ -211,9 +211,9 @@ module gpif        .total(total), .crc_err(crc_err), .seq_err(seq_err), .len_err(len_err));     // Fixed rate RX traffic generator -   packet_generator32 pktgen32 +   vita_pkt_gen pktgen       (.clk(fifo_clk), .reset(fifo_rst), .clear(clear_rx), -      .header({len_err,seq_err,crc_err,total}), +      .len(test_len),        .data_o(timedrx_data), .src_rdy_o(timedrx_src_rdy_int), .dst_rdy_i(timedrx_dst_rdy_int));     fifo_pacer rx_pacer diff --git a/usrp2/top/u1plus/u1plus_core.v b/usrp2/top/u1plus/u1plus_core.v index a3755b722..6d6fa878c 100644 --- a/usrp2/top/u1plus/u1plus_core.v +++ b/usrp2/top/u1plus/u1plus_core.v @@ -108,7 +108,7 @@ module u1plus_core  	 .tx_underrun(tx_underrun_gpmc), .rx_overrun(rx_overrun_gpmc), -	 .test_rate(test_rate), .test_ctrl(test_ctrl), +	 .test_len(test_len), .test_rate(test_rate), .test_ctrl(test_ctrl),  	 .debug0(debug0), .debug1(debug1));     // ///////////////////////////////////////////////////////////////////////// @@ -258,6 +258,7 @@ module u1plus_core     assign test_ctrl = xfer_rate[11:8];     assign test_rate = xfer_rate[7:0]; +   assign test_len = reg_test[15:0];     assign { debug_led[2],debug_led[0],debug_led[1] } = reg_leds;  // LEDs are arranged funny on board     assign { cgen_sync_b, cgen_ref_sel } = reg_cgen_ctrl; diff --git a/usrp2/vrt/Makefile.srcs b/usrp2/vrt/Makefile.srcs index 4851bc924..166ed44ef 100644 --- a/usrp2/vrt/Makefile.srcs +++ b/usrp2/vrt/Makefile.srcs @@ -14,4 +14,5 @@ vita_tx_deframer.v \  vita_tx_chain.v \  gen_context_pkt.v \  trigger_context_pkt.v \ +vita_pkt_gen.v \  )) diff --git a/usrp2/vrt/vita_pkt_gen.v b/usrp2/vrt/vita_pkt_gen.v new file mode 100644 index 000000000..fea312188 --- /dev/null +++ b/usrp2/vrt/vita_pkt_gen.v @@ -0,0 +1,42 @@ + + +module vita_pkt_gen +  (input clk, input reset, input clear, +   input [15:0] len, +   output [35:0] data_o, output src_rdy_o, input dst_rdy_i); + +   reg [15:0] 	     state; +   reg [31:0] 	     seq, data; +    +   wire 	     sof = (state == 0); +   wire 	     eof = (state == (len-1)); +   wire 	     consume = src_rdy_o & dst_rdy_i; +    +   assign src_rdy_o = 1; + +   always @(posedge clk) +     if(reset | clear) +       begin +	  state <= 0; +	  seq <= 0; +       end +     else +       if(consume) +	 if(eof) +	   begin +	      state <= 0; +	      seq <= seq + 1; +	   end +	 else +	   state <= state + 1; + +   always @* +     case(state) +       0 :   data <= {24'h000,seq[3:0],len}; +       1 :   data <= seq; +       default : data <= {~state,state}; +     endcase // case (state) + +   assign data_o = {2'b00, eof, sof, data}; +    +endmodule // vita_pkt_gen | 
