diff options
| -rw-r--r-- | host/docs/transport.rst | 2 | ||||
| -rw-r--r-- | host/lib/usrp/usrp2/mboard_impl.cpp | 23 |
2 files changed, 14 insertions, 11 deletions
diff --git a/host/docs/transport.rst b/host/docs/transport.rst index 2f730f8e4..d9abd4923 100644 --- a/host/docs/transport.rst +++ b/host/docs/transport.rst @@ -48,7 +48,7 @@ which allows the host to determine throttling conditions for the transmission of The following mechanisms affect the transmission of periodic update packets: * **ups_per_fifo:** The number of update packets for each FIFO's worth of bytes sent into the device -* **ups_per_sec:** The number of update packets per second +* **ups_per_sec:** The number of update packets per second (disabled by default) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Resize socket buffers diff --git a/host/lib/usrp/usrp2/mboard_impl.cpp b/host/lib/usrp/usrp2/mboard_impl.cpp index 6f1184ad7..766ea993c 100644 --- a/host/lib/usrp/usrp2/mboard_impl.cpp +++ b/host/lib/usrp/usrp2/mboard_impl.cpp @@ -97,16 +97,19 @@ usrp2_mboard_impl::usrp2_mboard_impl( _iface->poke32(_iface->regs.tx_ctrl_report_sid, usrp2_impl::ASYNC_SID); _iface->poke32(_iface->regs.tx_ctrl_policy, U2_FLAG_TX_CTRL_POLICY_NEXT_PACKET); - //setting the cycles per update - const double ups_per_sec = flow_control_hints.cast<double>("ups_per_sec", 100); - const size_t cycles_per_up = size_t(_clock_ctrl->get_master_clock_rate()/ups_per_sec); - _iface->poke32(_iface->regs.tx_ctrl_cycles_per_up, U2_FLAG_TX_CTRL_UP_ENB | cycles_per_up); - _iface->poke32(_iface->regs.tx_ctrl_cycles_per_up, 0); //cycles per update is disabled - - //setting the packets per update - const double ups_per_fifo = flow_control_hints.cast<double>("ups_per_fifo", 8); - const size_t packets_per_up = size_t(usrp2_impl::sram_bytes/ups_per_fifo/data_transport->get_send_frame_size()); - _iface->poke32(_iface->regs.tx_ctrl_packets_per_up, U2_FLAG_TX_CTRL_UP_ENB | packets_per_up); + //setting the cycles per update (disabled by default) + const double ups_per_sec = flow_control_hints.cast<double>("ups_per_sec", 0.0); + if (ups_per_sec > 0.0){ + const size_t cycles_per_up = size_t(_clock_ctrl->get_master_clock_rate()/ups_per_sec); + _iface->poke32(_iface->regs.tx_ctrl_cycles_per_up, U2_FLAG_TX_CTRL_UP_ENB | cycles_per_up); + } + + //setting the packets per update (enabled by default) + const double ups_per_fifo = flow_control_hints.cast<double>("ups_per_fifo", 8.0); + if (ups_per_fifo > 0.0){ + const size_t packets_per_up = size_t(usrp2_impl::sram_bytes/ups_per_fifo/data_transport->get_send_frame_size()); + _iface->poke32(_iface->regs.tx_ctrl_packets_per_up, U2_FLAG_TX_CTRL_UP_ENB | packets_per_up); + } //init the ddc init_ddc_config(); |