diff options
| -rw-r--r-- | host/lib/usrp/usrp_e/clock_ctrl.cpp | 18 | ||||
| -rw-r--r-- | host/lib/usrp/usrp_e/codec_ctrl.cpp | 20 | ||||
| -rw-r--r-- | host/lib/usrp/usrp_e/dsp_impl.cpp | 24 | ||||
| -rw-r--r-- | host/lib/usrp/usrp_e/io_impl.cpp | 16 |
4 files changed, 55 insertions, 23 deletions
diff --git a/host/lib/usrp/usrp_e/clock_ctrl.cpp b/host/lib/usrp/usrp_e/clock_ctrl.cpp index 5f7269412..7947930a0 100644 --- a/host/lib/usrp/usrp_e/clock_ctrl.cpp +++ b/host/lib/usrp/usrp_e/clock_ctrl.cpp @@ -29,11 +29,11 @@ using namespace uhd; /*********************************************************************** * Clock Control Implementation **********************************************************************/ -class clock_ctrl_impl : public clock_ctrl{ +class usrp_e_clock_ctrl_impl : public clock_ctrl{ public: //structors - clock_ctrl_impl(usrp_e_iface::sptr iface); - ~clock_ctrl_impl(void); + usrp_e_clock_ctrl_impl(usrp_e_iface::sptr iface); + ~usrp_e_clock_ctrl_impl(void); void enable_rx_dboard_clock(bool enb); void enable_tx_dboard_clock(bool enb); @@ -56,7 +56,7 @@ private: /*********************************************************************** * Clock Control Methods **********************************************************************/ -clock_ctrl_impl::clock_ctrl_impl(usrp_e_iface::sptr iface){ +usrp_e_clock_ctrl_impl::usrp_e_clock_ctrl_impl(usrp_e_iface::sptr iface){ _iface = iface; //init the clock gen registers @@ -126,12 +126,12 @@ clock_ctrl_impl::clock_ctrl_impl(usrp_e_iface::sptr iface){ this->enable_tx_dboard_clock(false); } -clock_ctrl_impl::~clock_ctrl_impl(void){ +usrp_e_clock_ctrl_impl::~usrp_e_clock_ctrl_impl(void){ this->enable_rx_dboard_clock(false); this->enable_tx_dboard_clock(false); } -void clock_ctrl_impl::enable_rx_dboard_clock(bool enb){ +void usrp_e_clock_ctrl_impl::enable_rx_dboard_clock(bool enb){ _ad9522_regs.out9_format = ad9522_regs_t::OUT9_FORMAT_CMOS; _ad9522_regs.out9_cmos_configuration = (enb)? ad9522_regs_t::OUT9_CMOS_CONFIGURATION_B_ON : @@ -144,7 +144,7 @@ void clock_ctrl_impl::enable_rx_dboard_clock(bool enb){ this->latch_regs(); } -void clock_ctrl_impl::enable_tx_dboard_clock(bool enb){ +void usrp_e_clock_ctrl_impl::enable_tx_dboard_clock(bool enb){ _ad9522_regs.out6_format = ad9522_regs_t::OUT6_FORMAT_CMOS; _ad9522_regs.out6_cmos_configuration = (enb)? ad9522_regs_t::OUT6_CMOS_CONFIGURATION_B_ON : @@ -157,7 +157,7 @@ void clock_ctrl_impl::enable_tx_dboard_clock(bool enb){ this->latch_regs(); } -void clock_ctrl_impl::send_reg(boost::uint16_t addr){ +void usrp_e_clock_ctrl_impl::send_reg(boost::uint16_t addr){ boost::uint32_t reg = _ad9522_regs.get_write_reg(addr); //std::cout << "clock control write reg: " << std::hex << reg << std::endl; _iface->transact_spi( @@ -171,5 +171,5 @@ void clock_ctrl_impl::send_reg(boost::uint16_t addr){ * Clock Control Make **********************************************************************/ clock_ctrl::sptr clock_ctrl::make(usrp_e_iface::sptr iface){ - return sptr(new clock_ctrl_impl(iface)); + return sptr(new usrp_e_clock_ctrl_impl(iface)); } diff --git a/host/lib/usrp/usrp_e/codec_ctrl.cpp b/host/lib/usrp/usrp_e/codec_ctrl.cpp index ce05ac9eb..e86fde346 100644 --- a/host/lib/usrp/usrp_e/codec_ctrl.cpp +++ b/host/lib/usrp/usrp_e/codec_ctrl.cpp @@ -34,11 +34,11 @@ static const bool codec_debug = true; /*********************************************************************** * Codec Control Implementation **********************************************************************/ -class codec_ctrl_impl : public codec_ctrl{ +class usrp_e_codec_ctrl_impl : public codec_ctrl{ public: //structors - codec_ctrl_impl(usrp_e_iface::sptr iface); - ~codec_ctrl_impl(void); + usrp_e_codec_ctrl_impl(usrp_e_iface::sptr iface); + ~usrp_e_codec_ctrl_impl(void); //aux adc and dac control float read_aux_adc(aux_adc_t which); @@ -55,7 +55,7 @@ private: /*********************************************************************** * Codec Control Structors **********************************************************************/ -codec_ctrl_impl::codec_ctrl_impl(usrp_e_iface::sptr iface){ +usrp_e_codec_ctrl_impl::usrp_e_codec_ctrl_impl(usrp_e_iface::sptr iface){ _iface = iface; //FIXME temp poke !!! @@ -107,7 +107,7 @@ codec_ctrl_impl::codec_ctrl_impl(usrp_e_iface::sptr iface){ this->send_reg(34); } -codec_ctrl_impl::~codec_ctrl_impl(void){ +usrp_e_codec_ctrl_impl::~usrp_e_codec_ctrl_impl(void){ return; //FIXME remove this later //set aux dacs to zero @@ -131,7 +131,7 @@ static float aux_adc_to_volts(boost::uint8_t high, boost::uint8_t low){ return float((boost::uint16_t(high) << 2) | low)*3.3/0x3ff; } -float codec_ctrl_impl::read_aux_adc(aux_adc_t which){ +float usrp_e_codec_ctrl_impl::read_aux_adc(aux_adc_t which){ //check to see if the switch needs to be set bool write_switch = false; switch(which){ @@ -184,7 +184,7 @@ float codec_ctrl_impl::read_aux_adc(aux_adc_t which){ /*********************************************************************** * Codec Control AUX DAC Methods **********************************************************************/ -void codec_ctrl_impl::write_aux_dac(aux_dac_t which, float volts){ +void usrp_e_codec_ctrl_impl::write_aux_dac(aux_dac_t which, float volts){ //special case for aux dac d (aka sigma delta word) if (which == AUX_DAC_D){ boost::uint16_t dac_word = std::clip(boost::math::iround(volts*0xfff/3.3), 0, 0xfff); @@ -217,7 +217,7 @@ void codec_ctrl_impl::write_aux_dac(aux_dac_t which, float volts){ /*********************************************************************** * Codec Control SPI Methods **********************************************************************/ -void codec_ctrl_impl::send_reg(boost::uint8_t addr){ +void usrp_e_codec_ctrl_impl::send_reg(boost::uint8_t addr){ boost::uint32_t reg = _ad9862_regs.get_write_reg(addr); if (codec_debug) std::cout << "codec control write reg: " << std::hex << reg << std::endl; _iface->transact_spi( @@ -227,7 +227,7 @@ void codec_ctrl_impl::send_reg(boost::uint8_t addr){ ); } -void codec_ctrl_impl::recv_reg(boost::uint8_t addr){ +void usrp_e_codec_ctrl_impl::recv_reg(boost::uint8_t addr){ boost::uint32_t reg = _ad9862_regs.get_read_reg(addr); if (codec_debug) std::cout << "codec control read reg: " << std::hex << reg << std::endl; boost::uint32_t ret = _iface->transact_spi( @@ -243,5 +243,5 @@ void codec_ctrl_impl::recv_reg(boost::uint8_t addr){ * Codec Control Make **********************************************************************/ codec_ctrl::sptr codec_ctrl::make(usrp_e_iface::sptr iface){ - return sptr(new codec_ctrl_impl(iface)); + return sptr(new usrp_e_codec_ctrl_impl(iface)); } diff --git a/host/lib/usrp/usrp_e/dsp_impl.cpp b/host/lib/usrp/usrp_e/dsp_impl.cpp index 272ac71b3..e61f529ab 100644 --- a/host/lib/usrp/usrp_e/dsp_impl.cpp +++ b/host/lib/usrp/usrp_e/dsp_impl.cpp @@ -21,6 +21,30 @@ using namespace uhd::usrp; /*********************************************************************** + * Helper Functions + **********************************************************************/ +// Check if requested decim/interp rate is: +// multiple of 4, enable two halfband filters +// multiple of 2, enable one halfband filter +// handle remainder in CIC +static boost::uint32_t calculate_cic_word(size_t rate){ + int hb0 = 0, hb1 = 0; + if (not (rate & 0x1)){ + hb0 = 1; + rate /= 2; + } + if (not (rate & 0x1)){ + hb1 = 1; + rate /= 2; + } + return (hb1 << 9) | (hb0 << 8) | (rate & 0xff); +} + +static boost::uint32_t calculate_iq_scale_word(boost::int16_t i, boost::int16_t q){ + return (boost::uint16_t(i) << 16) | (boost::uint16_t(q) << 0); +} + +/*********************************************************************** * RX DDC Initialization **********************************************************************/ void usrp_e_impl::rx_ddc_init(void){ diff --git a/host/lib/usrp/usrp_e/io_impl.cpp b/host/lib/usrp/usrp_e/io_impl.cpp index 5bb40723e..f83829cb8 100644 --- a/host/lib/usrp/usrp_e/io_impl.cpp +++ b/host/lib/usrp/usrp_e/io_impl.cpp @@ -24,6 +24,8 @@ using namespace uhd; +static const size_t MAX_BUFF_SIZE = 2048; + /*********************************************************************** * Data Transport (phony zero-copy with read/write) **********************************************************************/ @@ -33,8 +35,8 @@ class data_transport: { public: data_transport(int fd): - transport::phony_zero_copy_recv_if(2048), //FIXME magic # - transport::phony_zero_copy_send_if(2048), //FIXME magic # + transport::phony_zero_copy_recv_if(MAX_BUFF_SIZE), + transport::phony_zero_copy_send_if(MAX_BUFF_SIZE), _fd(fd) { /* NOP */ @@ -51,6 +53,13 @@ public: private: int _fd; size_t send(const boost::asio::const_buffer &buff){ + //Set the frame length in the frame header. + //This is technically bad to write to a const buffer, + //but this will go away when the ring gets implemented, + //and the send buffer commit method will set the length. + const_cast<usrp_transfer_frame *>( + boost::asio::buffer_cast<const usrp_transfer_frame *>(buff) + )->len = boost::asio::buffer_size(buff); return write( _fd, boost::asio::buffer_cast<const void *>(buff), @@ -103,9 +112,8 @@ size_t usrp_e_impl::send( send_otw_type, //TODO 64e6, //TODO boost::bind(&data_transport::get_send_buff, &_io_impl->transport), - _max_num_samples, //TODO + (MAX_BUFF_SIZE - sizeof(usrp_transfer_frame))/send_otw_type.get_sample_size(), offsetof(usrp_transfer_frame, buf) - //TODO probably need callback to fill in frame size ); } |