diff options
| -rw-r--r-- | usrp2/fifo/packet_router.v | 1 | ||||
| -rw-r--r-- | usrp2/top/u2_rev3/u2_core_udp.v | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/usrp2/fifo/packet_router.v b/usrp2/fifo/packet_router.v index 09ded1c03..6cf022b11 100644 --- a/usrp2/fifo/packet_router.v +++ b/usrp2/fifo/packet_router.v @@ -122,6 +122,7 @@ module packet_router assign status[BUF_SIZE-1+16:0+16] = cpu_out_line_count; wire cpu_inp_hs_stat; assign status[1] = cpu_inp_hs_stat; + assign status[8] = master_mode_flag; //for the host to readback //////////////////////////////////////////////////////////////////// // Communication input source crossbar diff --git a/usrp2/top/u2_rev3/u2_core_udp.v b/usrp2/top/u2_rev3/u2_core_udp.v index 01a7b324d..c85e81140 100644 --- a/usrp2/top/u2_rev3/u2_core_udp.v +++ b/usrp2/top/u2_rev3/u2_core_udp.v @@ -426,7 +426,7 @@ module u2_core cycle_count <= cycle_count + 1; //compatibility number -> increment when the fpga has been sufficiently altered - localparam compat_num = 32'd3; + localparam compat_num = 32'd4; wb_readback_mux buff_pool_status (.wb_clk_i(wb_clk), .wb_rst_i(wb_rst), .wb_stb_i(s5_stb), |