diff options
| -rw-r--r-- | usrp2/top/u2_rev3/u2_core_udp.v | 4 | ||||
| -rw-r--r-- | usrp2/top/u2_rev3/u2_rev3.ucf | 8 | ||||
| -rw-r--r-- | usrp2/top/u2_rev3/u2_rev3.v | 24 | ||||
| -rw-r--r-- | usrp2/top/u2plus/u2plus.v | 4 | ||||
| -rw-r--r-- | usrp2/top/u2plus/u2plus_core.v | 4 |
5 files changed, 22 insertions, 22 deletions
diff --git a/usrp2/top/u2_rev3/u2_core_udp.v b/usrp2/top/u2_rev3/u2_core_udp.v index 9e62ee1cc..c2d473650 100644 --- a/usrp2/top/u2_rev3/u2_core_udp.v +++ b/usrp2/top/u2_rev3/u2_core_udp.v @@ -17,8 +17,8 @@ module u2_core output [1:0] debug_clk, // Expansion - input exp_pps_in, - output exp_pps_out, + input exp_time_in, + output exp_time_out, // GMII // GMII-CTRL diff --git a/usrp2/top/u2_rev3/u2_rev3.ucf b/usrp2/top/u2_rev3/u2_rev3.ucf index 6e0caedd5..8017f61ff 100644 --- a/usrp2/top/u2_rev3/u2_rev3.ucf +++ b/usrp2/top/u2_rev3/u2_rev3.ucf @@ -40,10 +40,10 @@ NET "debug_clk[0]" LOC = "N4" ; NET "debug_clk[1]" LOC = "M1" ; NET "uart_tx_o" LOC = "C7" ; NET "uart_rx_i" LOC = "A3" ; -NET "exp_pps_in_p" LOC = "V3" ; -NET "exp_pps_in_n" LOC = "V4" ; -NET "exp_pps_out_p" LOC = "V1" ; -NET "exp_pps_out_n" LOC = "V2" ; +NET "exp_time_in_p" LOC = "V3" ; +NET "exp_time_in_n" LOC = "V4" ; +NET "exp_time_out_p" LOC = "V1" ; +NET "exp_time_out_n" LOC = "V2" ; NET "GMII_COL" LOC = "U16" ; NET "GMII_CRS" LOC = "U17" ; NET "GMII_TXD[0]" LOC = "W14" |IOSTANDARD = LVCMOS25 |DRIVE = 12 |SLEW = FAST ; diff --git a/usrp2/top/u2_rev3/u2_rev3.v b/usrp2/top/u2_rev3/u2_rev3.v index 4f7f9bf1a..f2bba6c50 100644 --- a/usrp2/top/u2_rev3/u2_rev3.v +++ b/usrp2/top/u2_rev3/u2_rev3.v @@ -11,10 +11,10 @@ module u2_rev3 input uart_rx_i, // Expansion - input exp_pps_in_p, // Diff - input exp_pps_in_n, // Diff - output exp_pps_out_p, // Diff - output exp_pps_out_n, // Diff + input exp_time_in_p, // Diff + input exp_time_in_n, // Diff + output exp_time_out_p, // Diff + output exp_time_out_n, // Diff // GMII // GMII-CTRL @@ -181,13 +181,13 @@ module u2_rev3 wire cpld_clock_buf; BUFG cpld_clock_BUF (.O(cpld_clock_buf),.I(cpld_clock)); - wire exp_pps_in; - IBUFDS exp_pps_in_pin (.O(exp_pps_in),.I(exp_pps_in_p),.IB(exp_pps_in_n)); - defparam exp_pps_in_pin.IOSTANDARD = "LVDS_25"; + wire exp_time_in; + IBUFDS exp_time_in_pin (.O(exp_time_in),.I(exp_time_in_p),.IB(exp_time_in_n)); + defparam exp_time_in_pin.IOSTANDARD = "LVDS_25"; - wire exp_pps_out; - OBUFDS exp_pps_out_pin (.O(exp_pps_out_p),.OB(exp_pps_out_n),.I(exp_pps_out)); - defparam exp_pps_out_pin.IOSTANDARD = "LVDS_25"; + wire exp_time_out; + OBUFDS exp_time_out_pin (.O(exp_time_out_p),.OB(exp_time_out_n),.I(exp_time_out)); + defparam exp_time_out_pin.IOSTANDARD = "LVDS_25"; reg [5:0] clock_ready_d; always @(posedge clk_fpga) @@ -480,8 +480,8 @@ module u2_rev3 .leds (leds_int), .debug (debug[31:0]), .debug_clk (debug_clk[1:0]), - .exp_pps_in (exp_pps_in), - .exp_pps_out (exp_pps_out), + .exp_time_in (exp_time_in), + .exp_time_out (exp_time_out), .GMII_COL (GMII_COL), .GMII_CRS (GMII_CRS), .GMII_TXD (GMII_TXD_unreg[7:0]), diff --git a/usrp2/top/u2plus/u2plus.v b/usrp2/top/u2plus/u2plus.v index 5facca298..c0140e989 100644 --- a/usrp2/top/u2plus/u2plus.v +++ b/usrp2/top/u2plus/u2plus.v @@ -357,8 +357,8 @@ module u2plus .leds (leds_int), .debug (debug[31:0]), .debug_clk (debug_clk[1:0]), - .exp_pps_in (exp_time_in), - .exp_pps_out (exp_time_out), + .exp_time_in (exp_time_in), + .exp_time_out (exp_time_out), .GMII_COL (GMII_COL), .GMII_CRS (GMII_CRS), .GMII_TXD (GMII_TXD_unreg[7:0]), diff --git a/usrp2/top/u2plus/u2plus_core.v b/usrp2/top/u2plus/u2plus_core.v index 8426826e2..bce38fc73 100644 --- a/usrp2/top/u2plus/u2plus_core.v +++ b/usrp2/top/u2plus/u2plus_core.v @@ -16,8 +16,8 @@ module u2plus_core output [1:0] debug_clk, // Expansion - input exp_pps_in, - output exp_pps_out, + input exp_time_in, + output exp_time_out, // GMII // GMII-CTRL |