diff options
| -rw-r--r-- | control_lib/cascadefifo.v | 50 | ||||
| -rw-r--r-- | control_lib/fifo_tb.v | 8 | ||||
| -rw-r--r-- | control_lib/newfifo/fifo_2clock.v | 0 | ||||
| -rw-r--r-- | control_lib/newfifo/fifo_2clock_casc.v | 0 |
4 files changed, 2 insertions, 56 deletions
diff --git a/control_lib/cascadefifo.v b/control_lib/cascadefifo.v deleted file mode 100644 index c1a4ab335..000000000 --- a/control_lib/cascadefifo.v +++ /dev/null @@ -1,50 +0,0 @@ - - -// This FIFO exists to provide an intermediate point for the data on its -// long trek from one RAM (in the buffer pool) to another (in the longfifo) -// The shortfifo is more flexible in its placement since it is based on -// distributed RAM -// This one should only be used on transmit side applications. I.e. tx_mac, tx_dsp, etc. -// Spartan 3's have slow routing.... -// If we REALLY need to, we could also do this on the output side, -// with for the receive side stuff - -module cascadefifo - #(parameter WIDTH=32, SIZE=9) - (input clk, input rst, - input [WIDTH-1:0] datain, - output [WIDTH-1:0] dataout, - input read, - input write, - input clear, - output full, - output empty, - output [15:0] space, - output [15:0] occupied); - - wire [WIDTH-1:0] data_int; - wire empty_int, full_int, transfer; - wire [4:0] short_space, short_occupied; - wire [15:0] long_space, long_occupied; - - shortfifo #(.WIDTH(WIDTH)) shortfifo - (.clk(clk),.rst(rst),.clear(clear), - .datain(datain), .write(write), .full(full), - .dataout(data_int), .read(transfer), .empty(empty_int), - .space(short_space),.occupied(short_occupied) ); - - longfifo #(.WIDTH(WIDTH),.SIZE(SIZE)) longfifo - (.clk(clk),.rst(rst),.clear(clear), - .datain(data_int), .write(transfer), .full(full_int), - .dataout(dataout), .read(read), .empty(empty), - .space(long_space),.occupied(long_occupied) ); - - assign transfer = ~empty_int & ~full_int; - - assign space = {11'b0,short_space} + long_space; - assign occupied = {11'b0,short_occupied} + long_occupied; - -endmodule // cascadefifo - - - diff --git a/control_lib/fifo_tb.v b/control_lib/fifo_tb.v index 98fd63f8d..616fe4ee7 100644 --- a/control_lib/fifo_tb.v +++ b/control_lib/fifo_tb.v @@ -2,11 +2,11 @@ module fifo_tb(); reg clk, rst; wire short_full, short_empty, long_full, long_empty; - wire casc_full, casc_empty, casc2_full, casc2_empty; + wire casc2_full, casc2_empty; reg read, write; wire [7:0] short_do, long_do; - wire [7:0] casc_do, casc2_do; + wire [7:0] casc2_do; reg [7:0] di; reg clear = 0; @@ -19,10 +19,6 @@ module fifo_tb(); (.clk(clk),.rst(rst),.datain(di),.dataout(long_do),.clear(clear), .read(read),.write(write),.full(long_full),.empty(long_empty)); - cascadefifo #(.WIDTH(8), .SIZE(4)) cascadefifo - (.clk(clk),.rst(rst),.datain(di),.dataout(casc_do),.clear(clear), - .read(read),.write(write),.full(casc_full),.empty(casc_empty)); - cascadefifo2 #(.WIDTH(8), .SIZE(4)) cascadefifo2 (.clk(clk),.rst(rst),.datain(di),.dataout(casc2_do),.clear(clear), .read(read),.write(write),.full(casc2_full),.empty(casc2_empty)); diff --git a/control_lib/newfifo/fifo_2clock.v b/control_lib/newfifo/fifo_2clock.v deleted file mode 100644 index e69de29bb..000000000 --- a/control_lib/newfifo/fifo_2clock.v +++ /dev/null diff --git a/control_lib/newfifo/fifo_2clock_casc.v b/control_lib/newfifo/fifo_2clock_casc.v deleted file mode 100644 index e69de29bb..000000000 --- a/control_lib/newfifo/fifo_2clock_casc.v +++ /dev/null |