summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--host/include/uhd/types/CMakeLists.txt1
-rw-r--r--host/include/uhd/types/io_type.hpp1
-rw-r--r--host/include/uhd/types/serial.hpp61
-rw-r--r--host/include/uhd/usrp/dboard_iface.hpp30
-rw-r--r--host/lib/ic_reg_maps/.gitignore1
-rw-r--r--host/lib/ic_reg_maps/common.py67
-rwxr-xr-xhost/lib/ic_reg_maps/gen_ad9510_regs.py48
-rwxr-xr-x[-rw-r--r--]host/lib/ic_reg_maps/gen_ad9777_regs.py48
-rwxr-xr-xhost/lib/ic_reg_maps/gen_adf4360_regs.py48
-rw-r--r--host/lib/types.cpp9
-rw-r--r--host/lib/usrp/usrp2/clock_control.cpp1
-rw-r--r--host/lib/usrp/usrp2/dboard_iface.cpp6
-rw-r--r--host/lib/usrp/usrp2/usrp2_iface.cpp1
-rw-r--r--host/lib/usrp/usrp2/usrp2_iface.hpp4
14 files changed, 151 insertions, 175 deletions
diff --git a/host/include/uhd/types/CMakeLists.txt b/host/include/uhd/types/CMakeLists.txt
index e4cdf2cef..dbce21c98 100644
--- a/host/include/uhd/types/CMakeLists.txt
+++ b/host/include/uhd/types/CMakeLists.txt
@@ -25,6 +25,7 @@ INSTALL(FILES
metadata.hpp
otw_type.hpp
ranges.hpp
+ serial.hpp
stream_cmd.hpp
time_spec.hpp
tune_result.hpp
diff --git a/host/include/uhd/types/io_type.hpp b/host/include/uhd/types/io_type.hpp
index 930394d1b..5176374d6 100644
--- a/host/include/uhd/types/io_type.hpp
+++ b/host/include/uhd/types/io_type.hpp
@@ -23,6 +23,7 @@
namespace uhd{
/*!
+ * The Input/Output configuration struct:
* Used to specify the IO type with device send/recv.
*/
class UHD_API io_type_t{
diff --git a/host/include/uhd/types/serial.hpp b/host/include/uhd/types/serial.hpp
new file mode 100644
index 000000000..b0fe5d7bd
--- /dev/null
+++ b/host/include/uhd/types/serial.hpp
@@ -0,0 +1,61 @@
+//
+// Copyright 2010 Ettus Research LLC
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program. If not, see <http://www.gnu.org/licenses/>.
+//
+
+#ifndef INCLUDED_UHD_TYPES_SERIAL_HPP
+#define INCLUDED_UHD_TYPES_SERIAL_HPP
+
+#include <uhd/config.hpp>
+#include <boost/cstdint.hpp>
+#include <vector>
+
+namespace uhd{
+
+ /*!
+ * Byte vector typedef for passing data in and out of I2C interfaces.
+ */
+ typedef std::vector<boost::uint8_t> byte_vector_t;
+
+ /*!
+ * The SPI configuration struct:
+ * Used to configure a SPI transaction interface.
+ */
+ struct UHD_API spi_config_t{
+ /*!
+ * The edge type specifies when data is valid
+ * relative to the edge of the serial clock.
+ */
+ enum edge_t{
+ EDGE_RISE = 'r',
+ EDGE_FALL = 'f'
+ };
+
+ //! on what edge is the mosi data valid?
+ edge_t mosi_edge;
+
+ //! on what edge is the miso data valid?
+ edge_t miso_edge;
+
+ /*!
+ * Create a new spi config.
+ * \param edge the default edge for mosi and miso
+ */
+ spi_config_t(edge_t edge = EDGE_RISE);
+ };
+
+} //namespace uhd
+
+#endif /* INCLUDED_UHD_TYPES_SERIAL_HPP */
diff --git a/host/include/uhd/usrp/dboard_iface.hpp b/host/include/uhd/usrp/dboard_iface.hpp
index 71c7be200..79b8ee664 100644
--- a/host/include/uhd/usrp/dboard_iface.hpp
+++ b/host/include/uhd/usrp/dboard_iface.hpp
@@ -19,39 +19,12 @@
#define INCLUDED_UHD_USRP_DBOARD_IFACE_HPP
#include <uhd/config.hpp>
+#include <uhd/types/serial.hpp>
#include <boost/shared_ptr.hpp>
#include <boost/cstdint.hpp>
-#include <vector>
namespace uhd{ namespace usrp{
-//spi configuration struct
-struct UHD_API spi_config_t{
- /*!
- * The edge type specifies when data is valid
- * relative to the edge of the serial clock.
- */
- enum edge_t{
- EDGE_RISE = 'r',
- EDGE_FALL = 'f'
- };
-
- //! on what edge is the mosi data valid?
- edge_t mosi_edge;
-
- //! on what edge is the miso data valid?
- edge_t miso_edge;
-
- /*!
- * Create a new spi config.
- * \param edge the default edge for mosi and miso
- */
- spi_config_t(edge_t edge = EDGE_RISE){
- mosi_edge = edge;
- miso_edge = edge;
- }
-};
-
/*!
* The daughter board dboard interface to be subclassed.
* A dboard instance interfaces with the mboard though this api.
@@ -61,7 +34,6 @@ struct UHD_API spi_config_t{
class UHD_API dboard_iface{
public:
typedef boost::shared_ptr<dboard_iface> sptr;
- typedef std::vector<boost::uint8_t> byte_vector_t;
//tells the host which unit to use
enum unit_t{
diff --git a/host/lib/ic_reg_maps/.gitignore b/host/lib/ic_reg_maps/.gitignore
new file mode 100644
index 000000000..a74b07aee
--- /dev/null
+++ b/host/lib/ic_reg_maps/.gitignore
@@ -0,0 +1 @@
+/*.pyc
diff --git a/host/lib/ic_reg_maps/common.py b/host/lib/ic_reg_maps/common.py
new file mode 100644
index 000000000..b7fa27bbe
--- /dev/null
+++ b/host/lib/ic_reg_maps/common.py
@@ -0,0 +1,67 @@
+#
+# Copyright 2008,2009 Free Software Foundation, Inc.
+#
+# This file is part of GNU Radio
+#
+# GNU Radio is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either asversion 3, or (at your option)
+# any later version.
+#
+# GNU Radio is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GNU Radio; see the file COPYING. If not, write to
+# the Free Software Foundation, Inc., 51 Franklin Street,
+# Boston, MA 02110-1301, USA.
+
+import re
+import os
+import math
+from Cheetah.Template import Template
+
+def parse_tmpl(_tmpl_text, **kwargs):
+ return str(Template(_tmpl_text, kwargs))
+
+def safe_makedirs(path):
+ not os.path.isdir(path) and os.makedirs(path)
+
+class reg:
+ def __init__(self, reg_des):
+ x = re.match('^(\w*)\s*(\w*)\[(.*)\]\s*(\w*)\s*(.*)$', reg_des)
+ name, addr, bit_range, default, enums = x.groups()
+
+ #store variables
+ self._name = name
+ self._addr = int(addr, 16)
+ if ':' in bit_range: self._addr_spec = sorted(map(int, bit_range.split(':')))
+ else: self._addr_spec = int(bit_range), int(bit_range)
+ self._default = int(default, 16)
+
+ #extract enum
+ self._enums = list()
+ if enums:
+ enum_val = 0
+ for enum_str in map(str.strip, enums.split(',')):
+ if '=' in enum_str:
+ enum_name, enum_val = enum_str.split('=')
+ enum_val = int(enum_val)
+ else: enum_name = enum_str
+ self._enums.append((enum_name, enum_val))
+ enum_val += 1
+
+ def get_addr(self): return self._addr
+ def get_enums(self): return self._enums
+ def get_name(self): return self._name
+ def get_default(self):
+ for key, val in self.get_enums():
+ if val == self._default: return str.upper('%s_%s'%(self.get_name(), key))
+ return self._default
+ def get_stdint_type(self):\
+ return 'uint%d_t'%max(2**math.ceil(math.log(self.get_bit_width(), 2)), 8)
+ def get_shift(self): return self._addr_spec[0]
+ def get_mask(self): return hex(int('1'*self.get_bit_width(), 2))
+ def get_bit_width(self): return self._addr_spec[1] - self._addr_spec[0] + 1
diff --git a/host/lib/ic_reg_maps/gen_ad9510_regs.py b/host/lib/ic_reg_maps/gen_ad9510_regs.py
index 90230b8f9..32a8a04c6 100755
--- a/host/lib/ic_reg_maps/gen_ad9510_regs.py
+++ b/host/lib/ic_reg_maps/gen_ad9510_regs.py
@@ -19,14 +19,9 @@
# the Free Software Foundation, Inc., 51 Franklin Street,
# Boston, MA 02110-1301, USA.
-import re
import os
import sys
-from Cheetah.Template import Template
-def parse_tmpl(_tmpl_text, **kwargs):
- return str(Template(_tmpl_text, kwargs))
-def safe_makedirs(path):
- not os.path.isdir(path) and os.makedirs(path)
+from common import *
########################################################################
# Template for raw text data describing registers
@@ -177,47 +172,6 @@ struct ad9510_regs_t{
\#endif /* INCLUDED_AD9510_REGS_HPP */
"""
-class reg:
- def __init__(self, reg_des):
- x = re.match('^(\w*)\s*(\w*)\[(.*)\]\s*(\w*)\s*(.*)$', reg_des)
- name, addr, bit_range, default, enums = x.groups()
-
- #store variables
- self._name = name
- self._addr = int(addr, 16)
- if ':' in bit_range: self._addr_spec = map(int, bit_range.split(':'))
- else: self._addr_spec = int(bit_range), int(bit_range)
- self._default = int(default, 16)
-
- #extract enum
- self._enums = list()
- if enums:
- enum_val = 0
- for enum_str in map(str.strip, enums.split(',')):
- if '=' in enum_str:
- enum_name, enum_val = enum_str.split('=')
- enum_val = int(enum_val)
- else: enum_name = enum_str
- self._enums.append((enum_name, enum_val))
- enum_val += 1
-
- def get_addr(self): return self._addr
- def get_enums(self): return self._enums
- def get_name(self): return self._name
- def get_default(self):
- for key, val in self.get_enums():
- if val == self._default: return str.upper('%s_%s'%(self.get_name(), key))
- return self._default
- def get_stdint_type(self):
- if self.get_bit_width() <= 8: return 'uint8_t'
- if self.get_bit_width() <= 16: return 'uint16_t'
- if self.get_bit_width() <= 32: return 'uint32_t'
- if self.get_bit_width() <= 64: return 'uint64_t'
- raise Exception, 'too damn big'
- def get_shift(self): return self._addr_spec[0]
- def get_mask(self): return hex(int('1'*self.get_bit_width(), 2))
- def get_bit_width(self): return self._addr_spec[1] - self._addr_spec[0] + 1
-
if __name__ == '__main__':
regs = map(reg, parse_tmpl(REGS_DATA_TMPL).splitlines())
safe_makedirs(os.path.dirname(sys.argv[1]))
diff --git a/host/lib/ic_reg_maps/gen_ad9777_regs.py b/host/lib/ic_reg_maps/gen_ad9777_regs.py
index 6077b61b6..e4369291a 100644..100755
--- a/host/lib/ic_reg_maps/gen_ad9777_regs.py
+++ b/host/lib/ic_reg_maps/gen_ad9777_regs.py
@@ -19,14 +19,9 @@
# the Free Software Foundation, Inc., 51 Franklin Street,
# Boston, MA 02110-1301, USA.
-import re
import os
import sys
-from Cheetah.Template import Template
-def parse_tmpl(_tmpl_text, **kwargs):
- return str(Template(_tmpl_text, kwargs))
-def safe_makedirs(path):
- not os.path.isdir(path) and os.makedirs(path)
+from common import *
########################################################################
# Template for raw text data describing registers
@@ -155,47 +150,6 @@ struct ad9777_regs_t{
\#endif /* INCLUDED_AD9777_REGS_HPP */
"""
-class reg:
- def __init__(self, reg_des):
- x = re.match('^(\w*)\s*(\w*)\[(.*)\]\s*(\w*)\s*(.*)$', reg_des)
- name, addr, bit_range, default, enums = x.groups()
-
- #store variables
- self._name = name
- self._addr = int(addr, 16)
- if ':' in bit_range: self._addr_spec = sorted(map(int, bit_range.split(':')))
- else: self._addr_spec = int(bit_range), int(bit_range)
- self._default = int(default, 16)
-
- #extract enum
- self._enums = list()
- if enums:
- enum_val = 0
- for enum_str in map(str.strip, enums.split(',')):
- if '=' in enum_str:
- enum_name, enum_val = enum_str.split('=')
- enum_val = int(enum_val)
- else: enum_name = enum_str
- self._enums.append((enum_name, enum_val))
- enum_val += 1
-
- def get_addr(self): return self._addr
- def get_enums(self): return self._enums
- def get_name(self): return self._name
- def get_default(self):
- for key, val in self.get_enums():
- if val == self._default: return str.upper('%s_%s'%(self.get_name(), key))
- return self._default
- def get_stdint_type(self):
- if self.get_bit_width() <= 8: return 'uint8_t'
- if self.get_bit_width() <= 16: return 'uint16_t'
- if self.get_bit_width() <= 32: return 'uint32_t'
- if self.get_bit_width() <= 64: return 'uint64_t'
- raise Exception, 'too damn big'
- def get_shift(self): return self._addr_spec[0]
- def get_mask(self): return hex(int('1'*self.get_bit_width(), 2))
- def get_bit_width(self): return self._addr_spec[1] - self._addr_spec[0] + 1
-
if __name__ == '__main__':
regs = map(reg, parse_tmpl(REGS_DATA_TMPL).splitlines())
safe_makedirs(os.path.dirname(sys.argv[1]))
diff --git a/host/lib/ic_reg_maps/gen_adf4360_regs.py b/host/lib/ic_reg_maps/gen_adf4360_regs.py
index bcad1ffd3..f82e8c7c5 100755
--- a/host/lib/ic_reg_maps/gen_adf4360_regs.py
+++ b/host/lib/ic_reg_maps/gen_adf4360_regs.py
@@ -19,14 +19,9 @@
# the Free Software Foundation, Inc., 51 Franklin Street,
# Boston, MA 02110-1301, USA.
-import re
import os
import sys
-from Cheetah.Template import Template
-def parse_tmpl(_tmpl_text, **kwargs):
- return str(Template(_tmpl_text, kwargs))
-def safe_makedirs(path):
- not os.path.isdir(path) and os.makedirs(path)
+from common import *
########################################################################
# Template for raw text data describing registers
@@ -126,47 +121,6 @@ struct adf4360_regs_t{
\#endif /* INCLUDED_ADF4360_REGS_HPP */
"""
-class reg:
- def __init__(self, reg_des):
- x = re.match('^(\w*)\s*(\w*)\[(.*)\]\s*(\w*)\s*(.*)$', reg_des)
- name, addr, bit_range, default, enums = x.groups()
-
- #store variables
- self._name = name
- self._addr = int(addr)
- if ':' in bit_range: self._addr_spec = map(int, bit_range.split(':'))
- else: self._addr_spec = int(bit_range), int(bit_range)
- self._default = int(default)
-
- #extract enum
- self._enums = list()
- if enums:
- enum_val = 0
- for enum_str in map(str.strip, enums.split(',')):
- if '=' in enum_str:
- enum_name, enum_val = enum_str.split('=')
- enum_val = int(enum_val)
- else: enum_name = enum_str
- self._enums.append((enum_name, enum_val))
- enum_val += 1
-
- def get_addr(self): return self._addr
- def get_enums(self): return self._enums
- def get_name(self): return self._name
- def get_default(self):
- for key, val in self.get_enums():
- if val == self._default: return str.upper('%s_%s'%(self.get_name(), key))
- return self._default
- def get_stdint_type(self):
- if self.get_bit_width() <= 8: return 'uint8_t'
- if self.get_bit_width() <= 16: return 'uint16_t'
- if self.get_bit_width() <= 32: return 'uint32_t'
- if self.get_bit_width() <= 64: return 'uint64_t'
- raise Exception, 'too damn big'
- def get_shift(self): return self._addr_spec[0]
- def get_mask(self): return hex(int('1'*self.get_bit_width(), 2))
- def get_bit_width(self): return self._addr_spec[1] - self._addr_spec[0] + 1
-
if __name__ == '__main__':
regs = map(reg, parse_tmpl(REGS_DATA_TMPL).splitlines())
safe_makedirs(os.path.dirname(sys.argv[1]))
diff --git a/host/lib/types.cpp b/host/lib/types.cpp
index 0fd2522cf..2a687f34f 100644
--- a/host/lib/types.cpp
+++ b/host/lib/types.cpp
@@ -25,6 +25,7 @@
#include <uhd/types/mac_addr.hpp>
#include <uhd/types/otw_type.hpp>
#include <uhd/types/io_type.hpp>
+#include <uhd/types/serial.hpp>
#include <boost/algorithm/string.hpp>
#include <boost/math/special_functions/round.hpp>
#include <boost/foreach.hpp>
@@ -243,3 +244,11 @@ io_type_t::io_type_t(size_t size)
: size(size), tid(CUSTOM_TYPE){
/* NOP */
}
+
+/***********************************************************************
+ * serial
+ **********************************************************************/
+spi_config_t::spi_config_t(edge_t edge){
+ mosi_edge = edge;
+ miso_edge = edge;
+}
diff --git a/host/lib/usrp/usrp2/clock_control.cpp b/host/lib/usrp/usrp2/clock_control.cpp
index dcd7ce9da..72f1f1c7a 100644
--- a/host/lib/usrp/usrp2/clock_control.cpp
+++ b/host/lib/usrp/usrp2/clock_control.cpp
@@ -21,6 +21,7 @@
#include "usrp2_regs.hpp" //spi slave constants
#include <boost/cstdint.hpp>
+using namespace uhd;
using namespace uhd::usrp;
/*!
diff --git a/host/lib/usrp/usrp2/dboard_iface.cpp b/host/lib/usrp/usrp2/dboard_iface.cpp
index 2859a7981..5ccb6fa47 100644
--- a/host/lib/usrp/usrp2/dboard_iface.cpp
+++ b/host/lib/usrp/usrp2/dboard_iface.cpp
@@ -17,7 +17,8 @@
#include "usrp2_iface.hpp"
#include "clock_control.hpp"
-#include "usrp2_regs.hpp"
+#include "usrp2_regs.hpp" //wishbone address constants
+#include <uhd/usrp/dboard_iface.hpp>
#include <uhd/types/dict.hpp>
#include <uhd/utils/assert.hpp>
#include <boost/assign/list_of.hpp>
@@ -25,6 +26,7 @@
#include <boost/math/special_functions/round.hpp>
#include <algorithm>
+using namespace uhd;
using namespace uhd::usrp;
class usrp2_dboard_iface : public dboard_iface{
@@ -214,7 +216,7 @@ void usrp2_dboard_iface::write_i2c(int i2c_addr, const byte_vector_t &buf){
ASSERT_THROW(htonl(in_data.id) == USRP2_CTRL_ID_COOL_IM_DONE_I2C_WRITE_DUDE);
}
-dboard_iface::byte_vector_t usrp2_dboard_iface::read_i2c(int i2c_addr, size_t num_bytes){
+byte_vector_t usrp2_dboard_iface::read_i2c(int i2c_addr, size_t num_bytes){
//setup the out data
usrp2_ctrl_data_t out_data;
out_data.id = htonl(USRP2_CTRL_ID_DO_AN_I2C_READ_FOR_ME_BRO);
diff --git a/host/lib/usrp/usrp2/usrp2_iface.cpp b/host/lib/usrp/usrp2/usrp2_iface.cpp
index 5c84fd8d3..742c53a14 100644
--- a/host/lib/usrp/usrp2/usrp2_iface.cpp
+++ b/host/lib/usrp/usrp2/usrp2_iface.cpp
@@ -24,7 +24,6 @@
#include <stdexcept>
using namespace uhd;
-using namespace uhd::usrp;
class usrp2_iface_impl : public usrp2_iface{
public:
diff --git a/host/lib/usrp/usrp2/usrp2_iface.hpp b/host/lib/usrp/usrp2/usrp2_iface.hpp
index 1298d87f1..6667c8998 100644
--- a/host/lib/usrp/usrp2/usrp2_iface.hpp
+++ b/host/lib/usrp/usrp2/usrp2_iface.hpp
@@ -19,7 +19,7 @@
#define INCLUDED_USRP2_IFACE_HPP
#include <uhd/transport/udp_simple.hpp>
-#include <uhd/usrp/dboard_iface.hpp> //spi config
+#include <uhd/types/serial.hpp>
#include <boost/shared_ptr.hpp>
#include <boost/utility.hpp>
#include <boost/cstdint.hpp>
@@ -87,7 +87,7 @@ public:
*/
virtual boost::uint32_t transact_spi(
int which_slave,
- const uhd::usrp::spi_config_t &config,
+ const uhd::spi_config_t &config,
boost::uint32_t data,
size_t num_bits,
bool readback
generated by cgit v1.2.3 (git 2.46.0) at 2025-10-31 16:20:22 +0000