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-rw-r--r--firmware/zpu/usrp2p/bootloader/init_bootloader.c11
-rw-r--r--fpga/usrp2/top/u2plus/Makefile.N20098
-rw-r--r--host/AUTHORS.txt (renamed from host/AUTHORS)16
-rw-r--r--host/CMakeLists.txt6
-rw-r--r--host/LICENSE.txt (renamed from host/LICENSE)0
-rw-r--r--host/Modules/UHDPackage.cmake12
-rw-r--r--host/README37
-rw-r--r--host/README.txt37
-rw-r--r--images/Makefile32
9 files changed, 194 insertions, 55 deletions
diff --git a/firmware/zpu/usrp2p/bootloader/init_bootloader.c b/firmware/zpu/usrp2p/bootloader/init_bootloader.c
index f8b432c46..66481eb25 100644
--- a/firmware/zpu/usrp2p/bootloader/init_bootloader.c
+++ b/firmware/zpu/usrp2p/bootloader/init_bootloader.c
@@ -37,15 +37,16 @@ void load_ihex(void) { //simple IHEX parser to load proper records into RAM. loa
gets(buf);
if(!ihex_parse(buf, &ihex_record)) { //RAM data record is valid
- if(ihex_record.addr >= RAM_BASE) { //it's expecting to see FULLY RELOCATED IHX RECORDS. every address referenced to 0x8000, including vectors.
- memcpy((void *) (ihex_record.addr), ihex_record.data, ihex_record.length);
- puts("OK");
- } else if(ihex_record.type == 1) { //end of record
+ if(ihex_record.type == 1) { //end of record
puts("OK");
//load main firmware
start_program();
puts("ERROR: main image returned! Back in IHEX load mode.");
- } else puts("NOK"); //RAM loads do not support extended segment address records (04) -- upper 16 bits are always "0".
+ } else {
+ const uint8_t *destination = (uint8_t *)ihex_record.addr + RAM_BASE;
+ memcpy((void *) destination, ihex_record.data, ihex_record.length);
+ puts("OK");
+ }
} else puts("NOK");
}
}
diff --git a/fpga/usrp2/top/u2plus/Makefile.N200 b/fpga/usrp2/top/u2plus/Makefile.N200
new file mode 100644
index 000000000..9175f9304
--- /dev/null
+++ b/fpga/usrp2/top/u2plus/Makefile.N200
@@ -0,0 +1,98 @@
+#
+# Copyright 2008 Ettus Research LLC
+#
+
+##################################################
+# Project Setup
+##################################################
+TOP_MODULE = u2plus
+BUILD_DIR = $(abspath build$(ISE)-N200)
+
+##################################################
+# Include other makefiles
+##################################################
+
+include ../Makefile.common
+include ../../fifo/Makefile.srcs
+include ../../control_lib/Makefile.srcs
+include ../../sdr_lib/Makefile.srcs
+include ../../serdes/Makefile.srcs
+include ../../simple_gemac/Makefile.srcs
+include ../../timing/Makefile.srcs
+include ../../opencores/Makefile.srcs
+include ../../vrt/Makefile.srcs
+include ../../udp/Makefile.srcs
+include ../../coregen/Makefile.srcs
+include ../../extramfifo/Makefile.srcs
+
+
+##################################################
+# Project Properties
+##################################################
+export PROJECT_PROPERTIES := \
+family "Spartan-3A DSP" \
+device xc3sd1800a \
+package fg676 \
+speed -5 \
+top_level_module_type "HDL" \
+synthesis_tool "XST (VHDL/Verilog)" \
+simulator "ISE Simulator (VHDL/Verilog)" \
+"Preferred Language" "Verilog" \
+"Enable Message Filtering" FALSE \
+"Display Incremental Messages" FALSE
+
+##################################################
+# Sources
+##################################################
+TOP_SRCS = \
+u2plus_core.v \
+u2plus.v \
+u2plus.ucf
+
+SOURCES = $(abspath $(TOP_SRCS)) $(FIFO_SRCS) \
+$(CONTROL_LIB_SRCS) $(SDR_LIB_SRCS) $(SERDES_SRCS) \
+$(SIMPLE_GEMAC_SRCS) $(TIMING_SRCS) $(OPENCORES_SRCS) \
+$(VRT_SRCS) $(UDP_SRCS) $(COREGEN_SRCS) $(EXTRAM_SRCS)
+
+##################################################
+# Process Properties
+##################################################
+SYNTHESIZE_PROPERTIES = \
+"Number of Clock Buffers" 8 \
+"Pack I/O Registers into IOBs" Yes \
+"Optimization Effort" High \
+"Optimize Instantiated Primitives" TRUE \
+"Register Balancing" Yes \
+"Use Clock Enable" Auto \
+"Use Synchronous Reset" Auto \
+"Use Synchronous Set" Auto
+
+TRANSLATE_PROPERTIES = \
+"Macro Search Path" "$(shell pwd)/../../coregen/"
+
+MAP_PROPERTIES = \
+"Allow Logic Optimization Across Hierarchy" TRUE \
+"Map to Input Functions" 4 \
+"Optimization Strategy (Cover Mode)" Speed \
+"Pack I/O Registers/Latches into IOBs" "For Inputs and Outputs" \
+"Perform Timing-Driven Packing and Placement" TRUE \
+"Map Effort Level" High \
+"Extra Effort" Normal \
+"Combinatorial Logic Optimization" TRUE \
+"Register Duplication" TRUE
+
+PLACE_ROUTE_PROPERTIES = \
+"Place & Route Effort Level (Overall)" High
+
+STATIC_TIMING_PROPERTIES = \
+"Number of Paths in Error/Verbose Report" 10 \
+"Report Type" "Error Report"
+
+GEN_PROG_FILE_PROPERTIES = \
+"Configuration Rate" 6 \
+"Create Binary Configuration File" TRUE \
+"Done (Output Events)" 5 \
+"Enable Bitstream Compression" TRUE \
+"Enable Outputs (Output Events)" 6
+
+SIM_MODEL_PROPERTIES = ""
diff --git a/host/AUTHORS b/host/AUTHORS.txt
index 512d4752e..44b7516cd 100644
--- a/host/AUTHORS
+++ b/host/AUTHORS.txt
@@ -1,11 +1,13 @@
Matt Ettus - matt@ettus.com
USRP1 FPGA code
- USRP2 FPGA code
+ USRP2/N200 FPGA code
+ USRP-E100 FPGA code
Josh Blum - josh@ettus.com
driver framework
- USRP2 firmware
- USRP2 host code
+ USRP2/N200 firmware
+ USRP2/N200 host code
+ USRP-E100 host code
Basic/LF host code
XCVR2450 host code
RFX Series host code
@@ -13,6 +15,8 @@ Josh Blum - josh@ettus.com
Jason Abele - jason@ettus.com
RFX Series host code
WBX host code
+ DBSRX host code
+ DBSRX2 host code
Eric Blossom - eb@comsec.com
USRP1 firmware
@@ -28,3 +32,9 @@ Nick Foster - nick@ettus.com
LIBUSB host code
USRP1 host code
TVRX host code
+ USRP-N200 firmware
+ USRP-N200 host code
+
+Philip Balister - philip@opensdr.com
+ USRP-E100 kernel module
+ USRP-E100 utilities
diff --git a/host/CMakeLists.txt b/host/CMakeLists.txt
index 4160e8186..8516da401 100644
--- a/host/CMakeLists.txt
+++ b/host/CMakeLists.txt
@@ -163,9 +163,9 @@ INSTALL(
# Install Package Docs
########################################################################
INSTALL(FILES
- ${CMAKE_CURRENT_SOURCE_DIR}/README
- ${CMAKE_CURRENT_SOURCE_DIR}/LICENSE
- ${CMAKE_CURRENT_SOURCE_DIR}/AUTHORS
+ ${CMAKE_CURRENT_SOURCE_DIR}/README.txt
+ ${CMAKE_CURRENT_SOURCE_DIR}/LICENSE.txt
+ ${CMAKE_CURRENT_SOURCE_DIR}/AUTHORS.txt
DESTINATION ${PKG_DOC_DIR}
COMPONENT libraries
)
diff --git a/host/LICENSE b/host/LICENSE.txt
index 9aa03b39b..9aa03b39b 100644
--- a/host/LICENSE
+++ b/host/LICENSE.txt
diff --git a/host/Modules/UHDPackage.cmake b/host/Modules/UHDPackage.cmake
index 8ca8995cd..65897ceef 100644
--- a/host/Modules/UHDPackage.cmake
+++ b/host/Modules/UHDPackage.cmake
@@ -52,6 +52,13 @@ IF(UHD_PACKAGE_MODE STREQUAL AUTO)
SET(CPACK_PACKAGE_FILE_NAME "UHD-${UHD_VERSION}-${_os_name}-${_os_version}-${_machine}")
ENDIF(LSB_RELEASE_EXECUTABLE AND UNAME_EXECUTABLE)
+
+ IF(APPLE)
+ SET(CPACK_GENERATOR PackageMaker)
+ ELSEIF(WIN32)
+ SET(CPACK_GENERATOR NSIS)
+ ENDIF()
+
ENDIF(UHD_PACKAGE_MODE STREQUAL AUTO)
########################################################################
@@ -63,8 +70,9 @@ SET(CPACK_PACKAGE_CONTACT "support@ettus.com")
SET(CPACK_PACKAGE_VERSION_MAJOR ${UHD_VERSION_MAJOR})
SET(CPACK_PACKAGE_VERSION_MINOR ${UHD_VERSION_MINOR})
SET(CPACK_PACKAGE_VERSION_PATCH ${UHD_VERSION_PATCH})
-SET(CPACK_RESOURCE_FILE_README ${CMAKE_SOURCE_DIR}/README)
-SET(CPACK_RESOURCE_FILE_LICENSE ${CMAKE_SOURCE_DIR}/LICENSE)
+SET(CPACK_RESOURCE_FILE_WELCOME ${CMAKE_SOURCE_DIR}/README.txt)
+SET(CPACK_RESOURCE_FILE_README ${CMAKE_SOURCE_DIR}/AUTHORS.txt)
+SET(CPACK_RESOURCE_FILE_LICENSE ${CMAKE_SOURCE_DIR}/LICENSE.txt)
########################################################################
# Setup CPack Components
diff --git a/host/README b/host/README
deleted file mode 100644
index f3dcde53d..000000000
--- a/host/README
+++ /dev/null
@@ -1,37 +0,0 @@
-########################################################################
-# Ettus Research - Universal Hardware Driver
-########################################################################
-The hardware driver for Ettus Research products.
-
-########################################################################
-# Supported USRP Motherboards
-########################################################################
-USRP1
-USRP2
-USRP-N200
-USRP-N210
-USRP-E100
-
-########################################################################
-# Supported USRP Daughterboards
-########################################################################
-Basic RX
-Basic TX
-LF RX
-LF TX
-RFX Series
-XCVR 2450
-WBX Series
-DBSRX
-DBSRX2
-TVRX
-
-########################################################################
-# Documentation
-########################################################################
-Online documentation available at:
-http://ettus-apps.sourcerepo.com/redmine/ettus/projects/uhd/wiki/
-
-The build system can generate the html for the manual and Doxygen.
-Docutils and Doxygen are required to build the html docs.
-See the docs directory for the manual source (reStructuredText).
diff --git a/host/README.txt b/host/README.txt
new file mode 100644
index 000000000..b510493d5
--- /dev/null
+++ b/host/README.txt
@@ -0,0 +1,37 @@
+###############################################
+# Ettus Research - Universal Hardware Driver
+###############################################
+The hardware driver for Ettus Research products.
+
+###############################################
+# Supported USRP Motherboards
+###############################################
+USRP1
+USRP2
+USRP-N200
+USRP-N210
+USRP-E100
+
+###############################################
+# Supported USRP Daughterboards
+###############################################
+Basic RX
+Basic TX
+LF RX
+LF TX
+RFX Series
+XCVR 2450
+WBX Series
+DBSRX
+DBSRX2
+TVRX
+
+###############################################
+# Documentation
+###############################################
+Online documentation available at:
+http://code.ettus.com/redmine/ettus/projects/uhd/wiki
+
+The build system can generate the html for the manual and Doxygen.
+Docutils and Doxygen are required to build the html docs.
+See the docs directory for the manual source (reStructuredText).
diff --git a/images/Makefile b/images/Makefile
index cfc783ee4..74b1cd6e4 100644
--- a/images/Makefile
+++ b/images/Makefile
@@ -90,16 +90,22 @@ ifdef HAS_ZPU_GCC
_usrp2_fw_dir = $(TOP_FW_DIR)/zpu
_usrp2_fw_bin = $(BUILT_IMAGES_DIR)/usrp2_fw.bin
-_usrp_n2xx_fw_bin = $(BUILT_IMAGES_DIR)/usrp_n2xx_fw.bin
-IMAGES_LIST += $(_usrp2_fw_bin)
+_usrp_n200_fw_bin = $(BUILT_IMAGES_DIR)/usrp_n200_fw.bin
+_usrp_n210_fw_bin = $(BUILT_IMAGES_DIR)/usrp_n210_fw.bin
+IMAGES_LIST += $(_usrp2_fw_bin) $(_usrp_n200_fw_bin) $(_usrp_n210_fw_bin)
-$(_usrp2_fw_bin) $(_usrp_n2xx_fw_bin): $(GLOBAL_DEPS)
+$(_usrp2_fw_bin): $(GLOBAL_DEPS)
cd $(_usrp2_fw_dir) && rm -rf build
cd $(_usrp2_fw_dir) && mkdir build
cd $(_usrp2_fw_dir)/build && cmake ../
cd $(_usrp2_fw_dir)/build && make
- cp $(_usrp2_fw_dir)/build/usrp2/usrp2_txrx_uhd.bin $(_usrp2_fw_bin)
- cp $(_usrp2_fw_dir)/build/usrp2p/usrp2p_txrx_uhd.bin $(_usrp_n2xx_fw_bin)
+ cp $(_usrp2_fw_dir)/build/usrp2/usrp2_txrx_uhd.bin $@
+
+$(_usrp_n200_fw_bin): $(_usrp2_fw_bin)
+ cp $(_usrp2_fw_dir)/build/usrp2p/usrp2p_txrx_uhd.bin $@
+
+$(_usrp_n210_fw_bin): $(_usrp2_fw_bin)
+ cp $(_usrp2_fw_dir)/build/usrp2p/usrp2p_txrx_uhd.bin $@
endif
@@ -120,6 +126,22 @@ $(_usrp2_fpga_bin): $(GLOBAL_DEPS)
endif
########################################################################
+# USRP-N200 fpga
+########################################################################
+ifdef HAS_XTCLSH
+
+_usrp_n200_fpga_dir = $(TOP_FPGA_DIR)/usrp2/top/u2plus
+_usrp_n200_fpga_bin = $(BUILT_IMAGES_DIR)/usrp_n200_fpga.bin
+IMAGES_LIST += $(_usrp_n200_fpga_bin)
+
+$(_usrp_n200_fpga_bin): $(GLOBAL_DEPS)
+ cd $(_usrp_n200_fpga_dir) && make -f Makefile.N200 clean
+ cd $(_usrp_n200_fpga_dir) && make -f Makefile.N200 bin
+ cp $(_usrp_n200_fpga_dir)/build-N200/u2plus.bin $@
+
+endif
+
+########################################################################
# USRP-N210 fpga
########################################################################
ifdef HAS_XTCLSH
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-17 16:21:21 +0000