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| -rw-r--r-- | host/docs/usrp_e3x0.dox | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/host/docs/usrp_e3x0.dox b/host/docs/usrp_e3x0.dox index 2965f4dad..717e864da 100644 --- a/host/docs/usrp_e3x0.dox +++ b/host/docs/usrp_e3x0.dox @@ -21,7 +21,6 @@ - Timed commands in FPGA - Timed sampling in FPGA - 16-bit fixed point sample mode (sc16) - - Up to 10 MHz of RF bandwidth with 16-bit samples \section e3x0_getting_started Getting started |