diff options
| -rw-r--r-- | CHANGELOG | 190 | ||||
| m--------- | fpga-src | 0 | ||||
| -rw-r--r-- | host/cmake/Modules/UHDVersion.cmake | 2 | ||||
| -rw-r--r-- | images/manifest.txt | 26 |
4 files changed, 203 insertions, 15 deletions
@@ -1,6 +1,194 @@ Change Log for Releases ============================== +## 003.014.000.000 +* N320: Add N320 and N321 +* Test: Add Python API test +* Device3: Move from packet-based to byte-based flow control +* X300: Reduce default send_frame_size to 4000 over Ethernet +* UHD: Release recv buffers earlier in rx_streamer +* Device3: Constrain send_buff_size to input fifo size +* X300: Change Ethernet buffering +* MPMD: Parallelize broadcast-finding +* Device: Parallelize device discovery +* Docs: Fix Doxygen warnings +* B100: Move fifo_ctrl_excelsior to b100 subdir +* B100: Fix fifo_ctrl_excelsior not exiting +* B100: Remove all Boostisms from fifo_ctrl_excelsior +* B100: Demote some clocking-related log messages to trace +* X300: Log git hash and compat number as debug message +* N310: Modify AD9371 reset function to keep it in reset +* N3xx: clocking API changes for transitioning clock and time sources +* E320: bist: Fix ref_clock lock test implementation +* UHD: Fix ADF400x driver for ref counter and charge pump mode +* E320: bist: Add link_up test +* MPM: Get list of temperatures from all thermal zones +* E320: Add all 5 temp sensors, fan sensor and rssi sensors per channel +* E320: Fix tx/rx atr - antenna and frequency settings +* E320: Enable devtest for E320 +* X300: Move defaults to their own header +* UHD: Improve constrained_device_args_t +* X300: Use constrained_args +* X300: Enable clock_source and time_source device args +* Test: Integrate Python API Tester into Devtest +* N3xx: Bump max rev to G/6 +* N3xx: Improve error messages for invalid clock/time settings +* E320: images: Separate images package for Aurora image +* B200: Remove superfluous fake lambda +* B200: Add support for user regs +* Docs: Add info on how to implement user regs on B200 +* UHD API: Add multi_usrp::get_user_settings_iface() +* N310: move init_rf_cal before JESD de/framer bringup +* UHD: Remove usage of time_t (except when required) +* NIRIO: Demote RPC client cancel/abort to TRACE +* RFNoC: Convert SR_READBACK_REG_FIFOSIZE to bytes +* Utils: Add Zip test to downloader +* Utils: Factor wait_for_lo_lock() out of cal utils +* DPDK: Add DPDK-based sockets-like library +* MPMD: add option to enum rfnoc blocks from args +* E320: Get RFNoC crossbar baseport from FPGA +* N3xx: Get RFNoC crossbar baseport from FPGA +* UHD: add default xport params to udp_zero_copy +* MPM: add link_speed xport_info +* MPMD: add link speed to xport udp +* Device3: remove tx_hint[send_buff_size] +* X300: remove default_buff_args properties +* RFNoC: Add ability to enable/disable RX timestamp +* RFNoC: add async message handler +* Examples: add rfnoc_radio_loopback example +* UHD: Update rx_frontend_gen3.v controls for 1/4-rate mixer +* UHD API: Move definition of ALL_MBOARDS and ALL_CHANS constants to + CPP file. +* MPM: Add __mpm_device__ as usrp_hwd module variable +* MPM: Add usrp_update_fs +* UHD: Add traffic counter to null source sink +* Examples: Add benchmark_streamer example +* Tools: Add tool to analyze settling time of gain and freq changes +* UHD API: Add multi_usrp::set_sync_source() API +* UHD: Improve documentation for the UHD exception types +* Examples: Add dual measurements to benchmark_streamer +* MPM: Add i2c APIs for simple transfers +* MPM: Add vector-based transfer function for i2c +* UHD: Improve documentation for set_{time,clock,sync}_source +* CMake: Bump CMake minimum version to 2.8.12 +* MPM: Add variable configuration support to nijesdcore +* MPM: Add eyescan utility to nijesdcore +* MPM: Add PRBS-31 testing to nijesdcore +* CMake: Change SOVERSION and VERSION for the library files +* Test: Add graph impl test to device3_test +* RFNoC: Changes to traffic counter register names +* X300: Remove 120 MHz master_clock_rate option +* MPM: Add convenience function to pull i2c bus from device tree +* UHD: add .clang-format file +* MPM: Open and close i2c file descriptor on every access +* UHD: Add device arg to enable dual ethernet for tx +* Test: Retrofit sph test to use new mock transport +* X300: Set minimum master clock rate to 184.32 MHz +* RFNoC: Fix replay example port args +* RFNoC: Fix default SPP for replay +* RFNoC: Add halt to replay API +* UHD API: Add sync source to Python API +* Examples: Clean up rfnoc_radio_loopback example +* UHD: Improve compatibility of abs() calls +* UHD: include <stdint.h> for int64_t for time_spec +* USRP-2974: Add support for USRP-2974 +* UHD API: Add support for Tx LO control to C API +* E310: Fix initialization of antenna and frequency values +* Test: Enable rx_samples_to_file in devtest for X300 +* Examples: Add keyboard controls to rx_ascii_art_dft +* Examples: Add benchmark_streamer support for multi-channel streamer +* MPM: Multiprocessing instead of threading for claimer loop +* MPM: Factor out user EEPROM code into own module +* RFNoC: Fix late packet errors +* X300: Factor our PID -> MB type and MB type -> product name mapping +* X300: Remove usage of boost::bind +* Docs: Add manual page on compat numbers +* UHD: Updates to coding guidelines +* Examples: Optimize benchmark_rate start time +* Examples: Improve formatting and comments in tx_waveforms +* Examples: Optimize tx_waveforms memory allocations +* UHD: Fix MSVC warnings by changing a size_t to unsigned int or + uint32_t +* Test: Fix CMake `endif` warning for devtest +* MPM: Add gpgga sensor function to GPSd iface +* Test: Fix compiler warning about unused timestamp +* X300: Fix compiler warnings related to type conversions +* B200: Fix compiler warnings related to type conversions +* Test: Add #include <thread> in system time test +* Examples: change boost to std for time commands +* UHD: Add potentially missing but sometimes inferred include for + experts +* UHD: Add default xport params to udp_wsa_zero_copy +* Examples: Add LO Offset to rx_samples_to_file +* Examples: update lo-offset naming in tx from file +* Examples: Add lo-offset to tx_waveforms +* UHD: Move device3 flow control functions to header for benchmark + utility +* Test: Add benchmark of streaming code paths +* MPMD: Add API to set RPC timeout atomically +* MPMD: Move timeout constants to header +* MPMD: Use new RPC API with timeout +* MPMD: Increase claim_rpc call timeout +* Examples: Improved error message in tx_waveforms +* UHD: Make sure BOOST_VERSION is always available +* Docs: Add comments for TwinRX and MCR +* DPDK: Add ARP responder, set MTU, and clean up API +* DPDK: Add blocking recv calls to uhd-dpdk +* DPDK: Add dpdk_zero_copy transport +* Test: Add unit test for DPDK transport +* Test: Add arguments to dpdk_test to control core mapping +* DPDK: Move uhd-dpdk header to uhdlib +* UHD: Make clang-format skip formatting for some data structures +* UHD: Remove vim hints in headers +* Examples: Move ascii_art_dft main function within include guard +* UHD/MPM: Apply clang-format to all files +* UHD: Add modified clang-format for headers +* MPM: Add bridge mode support +* RFNoC: Fix detection of outstanding acks by ctrl_iface +* UHD: Replace uhd::math::log2 with std::log2 +* UHD: Replace boost::*::{lcm,gcd}() with portable versions +* UHD API: Change get_{tx/rx}_dc_offset_range default from ALL_CHANS + to 0 +* UHD: Revert to boost instead of std for sleep in some instances +* UHD: Replace Boost macros with custom ones for endianness +* MPMD: implement get_*x_hints +* MPMD: honor user supplied send/recv_frame_size args +* UHD: muxed_zero_copy_if fixes +* Examples: Fix boundary condition in ascii_art_dft plotting +* CMake: Extend list of additional Boost versions +* Device3: Replace NULL with 0 for empty function pointers +* RFNoC: Add some missing virtual destructors +* Test: replace has_key by using 'in' +* Test: Add universal_newlines to subprocess call in devtest +* MPMD: Use 4096 bytes for frame size for liberio transport +* DPDK: Add xport_mgr for dpdk_zero_copy +* DPDK: Cover all paths to request TX offloads +* Test: Fix up dpdk_test to use current APIs +* MPM: Parameterize max UDP link allocation +* UHD: Replace Boost lock & mutex with std variety for AD9361 code +* CPack: Fix RPM generation +* Utils: Add check for gdb_eeprom before accessing +* RFNoC: Update FIFO XML definition +* MPMD: Use init timeout for update_component +* Docs: Add manual page for DPDK +* Docs: Add information about what dpdk_zero_copy is doing +* Tools: Make the UHD source gen a plugin for the phase alignment test +* CMake: fix variable usage +* RFNoC: Prevent unnecessary FC ACK packets +* RFNoC: More graph traversal fixes +* Device3: Remove redundant function call +* RFNoC: Fix scaling of M and N values in DDC/DUC +* X300: Fix tick and sample rate setting +* RFNoC: Fix typos in legacy_compat +* RFNoC: Limit number of control packets in flight +* Device3: Fix flow control window and interval +* E3xx: Increase spp limit for E3xx radio +* E31x: Destruct RFNoC before loading idle image +* N3xx: init peripherals before loading FPGA (to fix SFP0 init issues) +* N3xx: Move Linux kernel to 4.15 +* N3xx/E320: Prepend SDK filename with device name +* N310: Fix sporadic power on failures (requires firmware update) + ## 003.013.001.000 * E320: Fix front panel GPIO readback * E320: Fix master_clock_rate setting @@ -40,7 +228,7 @@ Change Log for Releases * BasicRX/LFRX: Fix real mode in rx_frontend_core_3000 * UHD: Define UHD_API as empty string when building static lib * UHD: Changed to 'all_matching' endpoint resolution for udp_simple transport -* UHD: Add support for NEON SIMD +* UHD: Add CMake flag for NEON SIMD * UHD: Fix usb_dummy_impl compilation in MSVC * UHD: Reconcile time_spec operators with boost concepts * UHD: Fix rounding in ddc/duc rate calculation diff --git a/fpga-src b/fpga-src -Subproject f2151e8101bee4ae21680ab90065d3549ab721c +Subproject e57dfe075c8056a5afe5528c1bc21e92b514937 diff --git a/host/cmake/Modules/UHDVersion.cmake b/host/cmake/Modules/UHDVersion.cmake index 0021ddec9..780fb686e 100644 --- a/host/cmake/Modules/UHDVersion.cmake +++ b/host/cmake/Modules/UHDVersion.cmake @@ -21,7 +21,7 @@ set(UHD_VERSION_MAJOR 3) set(UHD_VERSION_API 14) set(UHD_VERSION_ABI 0) set(UHD_VERSION_PATCH 0) -set(UHD_VERSION_DEVEL TRUE) +set(UHD_VERSION_DEVEL FALSE) ######################################################################## # If we're on a development branch, we skip the patch version diff --git a/images/manifest.txt b/images/manifest.txt index 60b0f8bc2..17077078b 100644 --- a/images/manifest.txt +++ b/images/manifest.txt @@ -1,24 +1,24 @@ # UHD Image Manifest File # Target hash url SHA256 # X300-Series -x3xx_x310_fpga_default fpga-f2151e8 x3xx/fpga-f2151e8/x3xx_x310_fpga_default-gf2151e8.zip 8b29c780d9d6d2f4ab438b407d833eafdadc48c0fc6ef9916d1d34a21f6e8712 -x3xx_x300_fpga_default fpga-f2151e8 x3xx/fpga-f2151e8/x3xx_x300_fpga_default-gf2151e8.zip fb1c1462a75b9dde43d6772337b24cb3dc72f8473aa15a01fc8339a0db557547 +x3xx_x310_fpga_default fpga-e57dfe0 x3xx/fpga-e57dfe0/x3xx_x310_fpga_default-ge57dfe0.zip 97d225bbe686179aa674caf25ecdd8198c7b4301b1e0368ab9f40f09d69e6169 +x3xx_x300_fpga_default fpga-e57dfe0 x3xx/fpga-e57dfe0/x3xx_x300_fpga_default-ge57dfe0.zip 37db8ecbcb20a1d11323e0f68b78fd8443ff4006da6add9090f53b71e5464989 # Example daughterboard targets (none currently exist) #x3xx_twinrx_cpld_default example_target #dboard_ubx_cpld_default example_target # E-Series -e3xx_e310_fpga_default fpga-f2151e8 e3xx/fpga-f2151e8/e3xx_e310_fpga_default-gf2151e8.zip 1da1be4c8d0fb852a57340d453dbe35c69badadc756d7394ed8c8e82616a2212 +e3xx_e310_fpga_default fpga-e57dfe0 e3xx/fpga-e57dfe0/e3xx_e310_fpga_default-ge57dfe0.zip 4cd3444c99681dbe3da4f2466c11f9572324a733eb4fddc3293db16a63e4e4a7 e3xx_e310_fpga_rfnoc fpga-d6a878b e3xx/fpga-d6a878b/e3xx_e310_fpga_rfnoc-gd6a878b.zip 5c9b89fb6293423644868c22e914de386a9af39ff031da6800a1cf39a90ea73b -e3xx_e320_fpga_default fpga-f2151e8 e3xx/fpga-f2151e8/e3xx_e320_fpga_default-gf2151e8.zip 2fe87708364936b6f0f7cd8b186c1382739699dd0f646d4055c3b3fc11a31f99 +e3xx_e320_fpga_default fpga-e57dfe0 e3xx/fpga-e57dfe0/e3xx_e320_fpga_default-ge57dfe0.zip 5d263e734e55658c1cee01717d45e6a26c03f73a221d1babc93937a9e1cc10cb # E320 Filesystems, etc e3xx_e320_sdk_default meta-ettus-v3.13.0.2 e3xx/meta-ettus-v3.13.0.2/e3xx_e320_sdk_default-v3.13.0.2.zip 0 e3xx_e320_mender_default meta-ettus-v3.13.0.2 e3xx/meta-ettus-v3.13.0.2/e3xx_e320_mender_default-v3.13.0.2.zip 0 e3xx_e320_sdimg_default meta-ettus-v3.13.0.2 e3xx/meta-ettus-v3.13.0.2/e3xx_e320_sdimg_default-v3.13.0.2.zip 0 # N300-Series -n3xx_n310_fpga_default fpga-f2151e8 n3xx/fpga-f2151e8/n3xx_n310_fpga_default-gf2151e8.zip 21747c046cd63ef5e4f3a425af22da0e502e67fb6685f32381125c5f5e1a59c2 -n3xx_n300_fpga_default fpga-f2151e8 n3xx/fpga-f2151e8/n3xx_n300_fpga_default-gf2151e8.zip 436978bb4d68f560348b6d612acabbb3c76b37846b4fa6e43411f4a29b913826 -n3xx_n320_fpga_default fpga-c41506b n3xx/fpga-c41506b/n3xx_n320_fpga_default-gc41506b.zip af6b4fcf28caee9de96e865f705541657d04a8abf2cf383dacf1640e1bbfaafb +n3xx_n310_fpga_default fpga-e57dfe0 n3xx/fpga-e57dfe0/n3xx_n310_fpga_default-ge57dfe0.zip 70d7af1261a77545b611f6ffd00e4c3507791ee07e0e6a7ec0e92f98be64c419 +n3xx_n300_fpga_default fpga-e57dfe0 n3xx/fpga-e57dfe0/n3xx_n300_fpga_default-ge57dfe0.zip 13f81bf7c22763fe814fee3d2c592d1c11360a42bfe9b133d0f5f3f4c5f9edad +n3xx_n320_fpga_default fpga-e57dfe0 n3xx/fpga-e57dfe0/n3xx_n320_fpga_default-ge57dfe0.zip f39f9ad15457a34b4329c528db61495aeac652a3eccf0e8061a294a238ab3979 n3xx_n310_cpld_default fpga-6bea23d n3xx/fpga-6bea23d/n3xx_n310_cpld_default-g6bea23d.zip ef128dcd265ee8615b673021d4ee84c39357012ffe8b28c8ad7f893f9dcb94cb # N3XX Mykonos firmware #n3xx_n310_fw_default fpga-6bea23d n3xx/fpga-6bea23d/n3xx_n310_fw_default-g6bea23d.zip 0 @@ -28,11 +28,11 @@ n3xx_common_mender_default meta-ettus-v3.13.0.2 n3xx/meta-ettus-v3.13.0.2/ n3xx_common_sdimg_default meta-ettus-v3.13.0.2 n3xx/meta-ettus-v3.13.0.2/n3xx_common_sdimg_default-v3.13.0.2.zip 0 # B200-Series -b2xx_b200_fpga_default fpga-f2151e8 b2xx/fpga-f2151e8/b2xx_b200_fpga_default-gf2151e8.zip 0d3f693b8a567a4b098ac4fd0a57fe1bb94205b2f1d181079158cb04714384a7 -b2xx_b200mini_fpga_default fpga-f2151e8 b2xx/fpga-f2151e8/b2xx_b200mini_fpga_default-gf2151e8.zip db3bd2776053c388b20e0731641372af6b005834b40ddf7076477b808225a05a -b2xx_b210_fpga_default fpga-f2151e8 b2xx/fpga-f2151e8/b2xx_b210_fpga_default-gf2151e8.zip be9637ffeaa067a3a8719639dfd62a9e1106f50a772abcc74e5d8c7728d0ee89 -b2xx_b205mini_fpga_default fpga-f2151e8 b2xx/fpga-f2151e8/b2xx_b205mini_fpga_default-gf2151e8.zip e1413d27c10b56d1427e364b0931799300e7e6c2749ba20d5dcef5c9892341a1 -b2xx_common_fw_default uhd-455a288 b2xx/uhd-455a288/b2xx_common_fw_default-g455a288.zip ac53d8bf9cda7508cb3ee09d190de08495ba9e519279e77f9927eccc953144f6 +b2xx_b200_fpga_default fpga-e57dfe0 b2xx/fpga-e57dfe0/b2xx_b200_fpga_default-ge57dfe0.zip ea5cec1dd1909bf52fb269eb1e25790bf75027595a957689233f8191917cbea7 +b2xx_b200mini_fpga_default fpga-e57dfe0 b2xx/fpga-e57dfe0/b2xx_b200mini_fpga_default-ge57dfe0.zip 2fda5cadb4b682296430f3458a51da8bab6d78992fa3f4f7c7a863fe78dfb6dd +b2xx_b210_fpga_default fpga-e57dfe0 b2xx/fpga-e57dfe0/b2xx_b210_fpga_default-ge57dfe0.zip b6badaa782b6240cfa9cf21f2c816787f059ce2a6177976e0cc9f9c23c95d9ef +b2xx_b205mini_fpga_default fpga-e57dfe0 b2xx/fpga-e57dfe0/b2xx_b205mini_fpga_default-ge57dfe0.zip 72d4349041b32e1f071dfae613953c84bb2249f9f05241e2283b767f25d6e486 +b2xx_common_fw_default uhd-a69ab0c b2xx/uhd-a69ab0c/b2xx_common_fw_default-ga69ab0c.zip 4c791308be0a66c28c77bc45941b22de5142861b6adefb33b333fc33d035382f # USRP2 Devices usrp2_usrp2_fw_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_usrp2_fw_default-g6bea23d.zip d523a18318cb6a7637be40484bf03a6f54766410fee2c1a1f72e8971ea9a9cb6 @@ -41,7 +41,7 @@ usrp2_n200_fpga_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n20 usrp2_n200_fw_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n200_fw_default-g6bea23d.zip 3eee2a6195caafe814912167fccf2dfc369f706446f8ecee36e97d2c0830116f usrp2_n210_fpga_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n210_fpga_default-g6bea23d.zip 5ce68ac539ee6eeb7d04fb3127c1fabcaff442a8edfaaa2f3746590f9df909bd usrp2_n210_fw_default fpga-6bea23d usrp2/fpga-6bea23d/usrp2_n210_fw_default-g6bea23d.zip 3646fcd3fc974d18c621cb10dfe97c4dad6d282036dc63b7379995dfad95fb98 -n230_n230_fpga_default fpga-f2151e8 n230/fpga-f2151e8/n230_n230_fpga_default-gf2151e8.zip 2ad7a86959692a95a2c9023a091f24e3a6eadc5f11537ae7b77c0a547ce91c28 +n230_n230_fpga_default fpga-e57dfe0 n230/fpga-e57dfe0/n230_n230_fpga_default-ge57dfe0.zip f115b78a1893da0c2a481257351b834721f8a5468dfae6a34e3a68a3bc0065cd # USRP1 Devices usrp1_usrp1_fpga_default fpga-6bea23d usrp1/fpga-6bea23d/usrp1_usrp1_fpga_default-g6bea23d.zip 03bf72868c900dd0853bf48e2ede91058d579829b0e70c021e51b0e282d1d5be |