diff options
| -rw-r--r-- | mpm/python/usrp_mpm/dboard_manager/CMakeLists.txt | 1 | ||||
| -rw-r--r-- | mpm/python/usrp_mpm/dboard_manager/__init__.py | 1 | ||||
| -rwxr-xr-x | mpm/python/usrp_mpm/dboard_manager/dboard_iface.py | 101 | ||||
| -rw-r--r-- | mpm/python/usrp_mpm/periph_manager/base.py | 8 |
4 files changed, 111 insertions, 0 deletions
diff --git a/mpm/python/usrp_mpm/dboard_manager/CMakeLists.txt b/mpm/python/usrp_mpm/dboard_manager/CMakeLists.txt index 3e4f6ba76..dfac467d0 100644 --- a/mpm/python/usrp_mpm/dboard_manager/CMakeLists.txt +++ b/mpm/python/usrp_mpm/dboard_manager/CMakeLists.txt @@ -30,6 +30,7 @@ set(USRP_MPM_DBMGR_FILES ${CMAKE_CURRENT_SOURCE_DIR}/mg_periphs.py ${CMAKE_CURRENT_SOURCE_DIR}/test.py ${CMAKE_CURRENT_SOURCE_DIR}/unknown.py + ${CMAKE_CURRENT_SOURCE_DIR}/dboard_iface.py ) list(APPEND USRP_MPM_FILES ${USRP_MPM_DBMGR_FILES}) set(USRP_MPM_FILES ${USRP_MPM_FILES} PARENT_SCOPE) diff --git a/mpm/python/usrp_mpm/dboard_manager/__init__.py b/mpm/python/usrp_mpm/dboard_manager/__init__.py index 3677394fc..58262025e 100644 --- a/mpm/python/usrp_mpm/dboard_manager/__init__.py +++ b/mpm/python/usrp_mpm/dboard_manager/__init__.py @@ -16,3 +16,4 @@ if not __simulated__: from .eiscat import EISCAT from .test import test from .unknown import unknown + from .dboard_iface import DboardIface diff --git a/mpm/python/usrp_mpm/dboard_manager/dboard_iface.py b/mpm/python/usrp_mpm/dboard_manager/dboard_iface.py new file mode 100755 index 000000000..87bff846b --- /dev/null +++ b/mpm/python/usrp_mpm/dboard_manager/dboard_iface.py @@ -0,0 +1,101 @@ +# +# Copyright 2019 Ettus Research, a National Instruments Brand +# +# SPDX-License-Identifier: GPL-3.0-or-later +# + +class DboardIface(object): + """ + An interface through which Motherboard drivers can expose certain + functionality to Daughterboard drivers within MPM. + + Each Motherboard should have its own instance of this interface, + implementing the relevant methods. + + slot_idx - The numerical ID of the daughterboard slot using this + interface (e.g. 0, 1) + motherboard - The instance of the motherboard class which implements + these controls + """ + # The device tree label for the bus to the DB's Management EEPROM + MGMT_EEPROM_DEVICE_LABEL = None + + def __init__(self, slot_idx, motherboard): + self.slot_idx = slot_idx + self.mboard = motherboard + self.db_name = "db_{}".format(self.slot_idx) + + if hasattr(self.mboard, 'log'): + self.log = self.mboard.log.getChild("DboardIface") + + #################################################################### + # CTRL SPI + # CTRL SPI lines are connected to the CPLD of the DB if it exists + #################################################################### + def peek_db_cpld(self, addr): + raise NotImplementedError('DboardIface::peek_db_cpld() not supported!') + + def poke_db_cpld(self, addr, val): + raise NotImplementedError('DboardIface::poke_db_cpld() not supported!') + + def ctrl_spi_reset(self): + raise NotImplementedError('DboardIface::ctrl_spi_reset() not supported!') + + #################################################################### + # GPIO + # GPIO lines are used for high speed control of the DB + #################################################################### + def get_high_speed_gpio_ctrl_core(self): + """ + Return a GpioAtrCore4000 instance that controls the GPIO lines + interfacing the MB and DB + """ + raise NotImplementedError('DboardIface::get_high_speed_gpio_ctrl_core()' + ' not supported!') + + #################################################################### + # Management Bus + #################################################################### + + #################################################################### + # Calibration SPI + # The SPI/QSPI node used to interact with the DB + # Calibration EEPROM if it exists + #################################################################### + def get_cal_eeprom_spi_node(self, addr): + raise NotImplementedError('DboardIface::get_cal_eeprom_spi_node()' + ' not supported!') + + #################################################################### + # MB Control + # Some of the MB settings may be controlled from the DB Driver + #################################################################### + def set_reference_clock(self, freq): + raise NotImplementedError('DboardIface::set_reference_clock() not supported!') + + def set_if_freq(self, freq, direction='both', channel='both'): + """ + Set the IF frequency of the ADCs and DACs corresponding + to the specified channels of the DB. + By default, all channels and directions will be set. + Returns true if the IF frequency was successfully set. + """ + raise NotImplementedError('DboardIface::set_if_freq() not supported!') + + def get_prc_rate(self): + """ + Returns the rate of the PLL Reference Clock (PRC) which is + routed to the daughterboard. + """ + raise NotImplementedError('DboardIface::get_pll_ref_clock() not supported!') + + #################################################################### + # SPCC MPCC Control + #################################################################### + def get_protocol_cores(self): + """ + Returns all discovered protocols in SPCC and MPCC blocks on the + Daughterboard's CPLD in the form of SpiCore4000, I2cCore4000, + UartCore4000, and GpioAtrCore4000 + """ + raise NotImplementedError('DboardIface::get_protocol_cores() not supported!') diff --git a/mpm/python/usrp_mpm/periph_manager/base.py b/mpm/python/usrp_mpm/periph_manager/base.py index c2da31b8f..2b4b297ed 100644 --- a/mpm/python/usrp_mpm/periph_manager/base.py +++ b/mpm/python/usrp_mpm/periph_manager/base.py @@ -117,6 +117,10 @@ class PeriphManagerBase(object): # The index of the first port of the RFNoC crossbar which is connected to # an RFNoC block crossbar_base_port = 0 + # A DboardIface class which will be passed to the discovered DB + # constructors. + # If None, the MB does not support the DB Iface architecture. + db_iface = None # Address of the daughterboard EEPROMs. This could be something like # "e0004000.i2c". This value will be passed to get_eeprom_paths() to # determine a full path to an EEPROM device. @@ -488,6 +492,10 @@ class PeriphManagerBase(object): 'spi_nodes': spi_nodes, 'default_args': default_args, }) + # If the MB supports the DB Iface architecture, pass + # the corresponding DB Iface to the dboard class + if self.db_iface is not None: + dboard_info['db_iface'] = self.db_iface(dboard_idx, self) # This will actually instantiate the dboard class: self.dboards.append(db_class(dboard_idx, **dboard_info)) self.log.info("Initialized %d daughterboard(s).", len(self.dboards)) |