aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
m---------fpga-src0
-rw-r--r--host/CMakeLists.txt4
-rw-r--r--host/docs/dboards.dox28
-rw-r--r--host/docs/usrp_x3x0.dox15
-rw-r--r--host/examples/rx_samples_c.c4
-rw-r--r--host/examples/tx_samples_c.c2
-rw-r--r--host/include/uhd/rfnoc/node_ctrl_base.hpp16
-rw-r--r--host/lib/rfnoc/node_ctrl_base.cpp47
-rw-r--r--host/lib/rfnoc/radio_ctrl_impl.hpp2
-rw-r--r--host/lib/usrp/x300/x300_impl.cpp10
-rw-r--r--host/utils/uhd_cal_rx_iq_balance.cpp2
-rw-r--r--host/utils/uhd_cal_tx_dc_offset.cpp2
-rw-r--r--host/utils/uhd_cal_tx_iq_balance.cpp2
13 files changed, 122 insertions, 12 deletions
diff --git a/fpga-src b/fpga-src
-Subproject 275be08783b6d57dfbf5471ac151b984f1cd2e2
+Subproject 3cf54867b7acb73d0fd885f3ede13739cbc231a
diff --git a/host/CMakeLists.txt b/host/CMakeLists.txt
index 36705731d..0c1c44844 100644
--- a/host/CMakeLists.txt
+++ b/host/CMakeLists.txt
@@ -338,8 +338,8 @@ UHD_INSTALL(FILES
#{{{IMG_SECTION
# This section is written automatically by /images/create_imgs_package.py
# Any manual changes in here will be overwritten.
-SET(UHD_IMAGES_MD5SUM "4f4a6c229f5a3906dc63533d3a505feb")
-SET(UHD_IMAGES_DOWNLOAD_SRC "uhd-images_003.010.000.000-36-g967897e0.zip")
+SET(UHD_IMAGES_MD5SUM "326cad67a75e60f365c3249f9fb3626a")
+SET(UHD_IMAGES_DOWNLOAD_SRC "uhd-images_003.010.000.000-84-g006c321c.zip")
#}}}
########################################################################
diff --git a/host/docs/dboards.dox b/host/docs/dboards.dox
index 2ce6c4563..4f2b22825 100644
--- a/host/docs/dboards.dox
+++ b/host/docs/dboards.dox
@@ -101,6 +101,9 @@ Sensors:
- **lo_locked**: boolean for LO lock state
+Notes:
+- When used in the X3x0, set the daughterboard clock rate to 100 MHz (see \ref config_devaddr)
+
\subsection dboards_rfx RFX Series
The RFX Series boards have 2 quadrature frontends: Transmit and Receive.
@@ -343,6 +346,12 @@ LEDs:
- **TX/RX RXD**: Receiving on TX/RX antenna port
- **RX2 RXD**: Receiving on RX2 antenna port
+
+Notes:
+- When used in the X300/X310 at frequencies below 1 GHz, it is necessary to
+ reduce the daughterboard clock rate to 20 MHz to achieve phase
+ synchronization and best RF performance (see \ref config_devaddr).
+
\subsection dboards_tvrx TVRX
The TVRX board has 1 real-mode frontend. It is operated at a low IF.
@@ -384,10 +393,29 @@ Sensors:
- **rssi**: float for measured RSSI in dBm
- **temperature**: float for measured temperature in degC
+Notes:
+
+- The TVRX2 requires a 64 MHz, 100 MHz or 200 MHz reference clock. On the X3x0,
+ set the daughterboard clock rate accordingly (see \ref config_devaddr), typically
+ to 100 MHz.
+
\subsection dboards_e300 E310 MIMO XCVR board
Please refer to \ref e3x0_dboard_e310.
+
+\subsection dboards_clock_rate Daughterboard reference clock
+
+The USRP motherboard provides a reference clock to the daughterboards, which
+the daughterboards will use to generate LO signals or anything else that
+requires a reference clock.
+
+The X3x0 has a programmable reference clock, which might have to be changed
+depending on various applications (see the daughterboard sections above).
+However, it can provide only one daughterboard clock per device, which can
+lead to conflicts. It might not be possible to use a specific daughterboard
+together with all others.
+
\subsection dboards_dbsrxmod DBSRX - Modifying for other boards that USRP1
Due to different clocking capabilities, the DBSRX will require
diff --git a/host/docs/usrp_x3x0.dox b/host/docs/usrp_x3x0.dox
index db19ca551..5f7284a09 100644
--- a/host/docs/usrp_x3x0.dox
+++ b/host/docs/usrp_x3x0.dox
@@ -18,6 +18,7 @@ More information:
- External 10 MHz input & output
- Expandable via 2nd SFP+ interface
- Supported master clock rates: 200 MHz and 184.32 MHz
+ - Variable daughterboard clock rates
- External GPIO Connector with UHD API control
- External USB Connection for built-in JTAG debugger
- Internal GPSDO option
@@ -430,6 +431,20 @@ Run the following commands:
You must power-cycle the device before you can use this new address.
+\section x3x0_setup_clocking Setup Clocking
+
+\subsection x3x0_set_clocking_dboard Daughterboard clock
+
+The X3x0 provides a clock signal to the daughterboards which is used as a
+reference clock for synthesizers and other components that require clocks.
+There are daughterboards that require non-default clock values. See
+Section \ref config_devaddr on how to change the clock value, and \ref page_dboards
+for information specific to certain daughterboards.
+
+Not all combinations of daughterboards work within the same device, if
+daughterboard clock requirements conflict. Note that some daughterboards
+(e.g. the UBX) will try and set the daughterboard clock rate themself.
+
\section x3x0_addressing Addressing the Device
\subsection x3x0_addressing_singledev Single device configuration
diff --git a/host/examples/rx_samples_c.c b/host/examples/rx_samples_c.c
index 0ecb89153..d269e29b7 100644
--- a/host/examples/rx_samples_c.c
+++ b/host/examples/rx_samples_c.c
@@ -233,9 +233,9 @@ int main(int argc, char* argv[])
time_t full_secs;
double frac_secs;
uhd_rx_metadata_time_spec(md, &full_secs, &frac_secs);
- fprintf(stderr, "Received packet: %zu samples, %zu full secs, %f frac secs\n",
+ fprintf(stderr, "Received packet: %zu samples, %.f full secs, %f frac secs\n",
num_rx_samps,
- full_secs,
+ difftime(full_secs, (time_t) 0),
frac_secs);
}
diff --git a/host/examples/tx_samples_c.c b/host/examples/tx_samples_c.c
index 3c3fcc8fe..f04d4b26c 100644
--- a/host/examples/tx_samples_c.c
+++ b/host/examples/tx_samples_c.c
@@ -206,7 +206,7 @@ int main(int argc, char* argv[]){
// Actual streaming
uint64_t num_acc_samps = 0;
- uint64_t num_samps_sent = 0;
+ size_t num_samps_sent = 0;
while(1) {
if (stop_signal_called) break;
diff --git a/host/include/uhd/rfnoc/node_ctrl_base.hpp b/host/include/uhd/rfnoc/node_ctrl_base.hpp
index 82e095b1d..071de803c 100644
--- a/host/include/uhd/rfnoc/node_ctrl_base.hpp
+++ b/host/include/uhd/rfnoc/node_ctrl_base.hpp
@@ -65,6 +65,18 @@ public:
node_map_t list_downstream_nodes() { return _downstream_nodes; };
node_map_t list_upstream_nodes() { return _upstream_nodes; };
+ /*! Disconnect this node from all neighbouring nodes.
+ */
+ void disconnect();
+
+ /*! Identify \p output_port as unconnected
+ */
+ void disconnect_output_port(const size_t output_port);
+
+ /*! Identify \p input_port as unconnected
+ */
+ void disconnect_input_port(const size_t input_port);
+
// TODO we need a more atomic connect procedure, this is too error-prone.
/*! For an existing connection, store the remote port number.
@@ -156,8 +168,8 @@ protected:
/***********************************************************************
* Structors
**********************************************************************/
- node_ctrl_base(void) {};
- virtual ~node_ctrl_base() {};
+ node_ctrl_base(void) {}
+ virtual ~node_ctrl_base() { disconnect(); }
/***********************************************************************
* Protected members
diff --git a/host/lib/rfnoc/node_ctrl_base.cpp b/host/lib/rfnoc/node_ctrl_base.cpp
index 6e19d276a..b4d0a30ff 100644
--- a/host/lib/rfnoc/node_ctrl_base.cpp
+++ b/host/lib/rfnoc/node_ctrl_base.cpp
@@ -17,6 +17,7 @@
#include <uhd/rfnoc/node_ctrl_base.hpp>
#include <uhd/utils/msg.hpp>
+#include <boost/range/adaptor/map.hpp>
using namespace uhd::rfnoc;
@@ -101,3 +102,49 @@ size_t node_ctrl_base::get_upstream_port(const size_t this_port)
return _upstream_ports[this_port];
}
+void node_ctrl_base::disconnect()
+{
+ // Notify neighbours:
+ for (node_map_t::iterator i = _downstream_nodes.begin(); i != _downstream_nodes.end(); ++i) {
+ sptr downstream_node = i->second.lock();
+ if (not downstream_node) {
+ // Actually this is not OK
+ continue;
+ }
+ downstream_node->disconnect_input_port(_downstream_ports[i->first]);
+ }
+ for (node_map_t::iterator i = _upstream_nodes.begin(); i != _upstream_nodes.end(); ++i) {
+ sptr upstream_node = i->second.lock();
+ if (not upstream_node) {
+ // Actually this is not OK
+ continue;
+ }
+ upstream_node->disconnect_output_port(_upstream_ports[i->first]);
+ }
+ // Clear own maps:
+ _downstream_nodes.clear();
+ _downstream_ports.clear();
+ _upstream_nodes.clear();
+ _upstream_ports.clear();
+}
+
+void node_ctrl_base::disconnect_output_port(const size_t output_port)
+{
+ if (_downstream_nodes.count(output_port) == 0 or
+ _downstream_ports.count(output_port) == 0) {
+ throw uhd::assertion_error(str(boost::format("[%s] Attempting to disconnect output port %u, which is not registered as connected!") % unique_id() % output_port));
+ }
+ _downstream_nodes.erase(output_port);
+ _downstream_ports.erase(output_port);
+}
+
+void node_ctrl_base::disconnect_input_port(const size_t input_port)
+{
+ if (_upstream_nodes.count(input_port) == 0 or
+ _upstream_ports.count(input_port) == 0) {
+ throw uhd::assertion_error(str(boost::format("[%s] Attempting to disconnect input port %u, which is not registered as connected!") % unique_id() % input_port));
+ }
+ _upstream_nodes.erase(input_port);
+ _upstream_ports.erase(input_port);
+}
+
diff --git a/host/lib/rfnoc/radio_ctrl_impl.hpp b/host/lib/rfnoc/radio_ctrl_impl.hpp
index 4224ec5c4..881cce3b4 100644
--- a/host/lib/rfnoc/radio_ctrl_impl.hpp
+++ b/host/lib/rfnoc/radio_ctrl_impl.hpp
@@ -60,7 +60,6 @@ public:
virtual double set_rx_frequency(const double freq, const size_t chan);
virtual double set_tx_gain(const double gain, const size_t chan);
virtual double set_rx_gain(const double gain, const size_t chan);
- virtual void set_time_sync(const uhd::time_spec_t &time);
virtual double get_rate() const;
virtual std::string get_tx_antenna(const size_t chan) /* const */;
@@ -72,6 +71,7 @@ public:
void set_time_now(const time_spec_t &time_spec);
void set_time_next_pps(const time_spec_t &time_spec);
+ void set_time_sync(const uhd::time_spec_t &time);
time_spec_t get_time_now();
time_spec_t get_time_last_pps();
diff --git a/host/lib/usrp/x300/x300_impl.cpp b/host/lib/usrp/x300/x300_impl.cpp
index e4f6d6fb8..776fac928 100644
--- a/host/lib/usrp/x300/x300_impl.cpp
+++ b/host/lib/usrp/x300/x300_impl.cpp
@@ -986,9 +986,17 @@ void x300_impl::setup_mb(const size_t mb_i, const uhd::device_addr_t &dev_addr)
mb.radios.at(i)->self_test_adc();
}
}
+
+ ////////////////////////////////////////////////////////////////////
+ // Synchronize times (dboard initialization can desynchronize them)
+ ////////////////////////////////////////////////////////////////////
+ if (radio_ids.size() == 2) {
+ this->sync_times(mb, mb.radios[0]->get_time_now());
+ }
+
} else {
UHD_MSG(status) << "No Radio Block found. Assuming radio-less operation." << std::endl;
- }
+ } /* end of radio block(s) initialization */
mb.initialization_done = true;
}
diff --git a/host/utils/uhd_cal_rx_iq_balance.cpp b/host/utils/uhd_cal_rx_iq_balance.cpp
index 2414ef007..99a5abdda 100644
--- a/host/utils/uhd_cal_rx_iq_balance.cpp
+++ b/host/utils/uhd_cal_rx_iq_balance.cpp
@@ -116,7 +116,7 @@ int UHD_SAFE_MAIN(int argc, char *argv[])
("verbose", "enable some verbose")
("args", po::value<std::string>(&args)->default_value(""), "Device address args [default = \"\"]")
("subdev", po::value<std::string>(&subdev), "Subdevice specification (default: first subdevice, often 'A')")
- ("tx_wave_ampl", po::value<double>(&tx_wave_ampl)->default_value(0.7), "Transmit wave amplitude in counts")
+ ("tx_wave_ampl", po::value<double>(&tx_wave_ampl)->default_value(0.7), "Transmit wave amplitude")
("tx_offset", po::value<double>(&tx_offset)->default_value(.9344e6), "TX LO offset from the RX LO in Hz")
("freq_start", po::value<double>(&freq_start), "Frequency start in Hz (do not specify for default)")
("freq_stop", po::value<double>(&freq_stop), "Frequency stop in Hz (do not specify for default)")
diff --git a/host/utils/uhd_cal_tx_dc_offset.cpp b/host/utils/uhd_cal_tx_dc_offset.cpp
index 8aa505010..8b12f7e95 100644
--- a/host/utils/uhd_cal_tx_dc_offset.cpp
+++ b/host/utils/uhd_cal_tx_dc_offset.cpp
@@ -124,7 +124,7 @@ int UHD_SAFE_MAIN(int argc, char *argv[])
("args", po::value<std::string>(&args)->default_value(""), "device address args [default = \"\"]")
("subdev", po::value<std::string>(&subdev), "Subdevice specification (default: first subdevice, often 'A')")
("tx_wave_freq", po::value<double>(&tx_wave_freq)->default_value(507.123e3), "Transmit wave frequency in Hz")
- ("tx_wave_ampl", po::value<double>(&tx_wave_ampl)->default_value(0.7), "Transmit wave amplitude in counts")
+ ("tx_wave_ampl", po::value<double>(&tx_wave_ampl)->default_value(0.7), "Transmit wave amplitude")
("rx_offset", po::value<double>(&rx_offset)->default_value(.9344e6), "RX LO offset from the TX LO in Hz")
("freq_start", po::value<double>(&freq_start), "Frequency start in Hz (do not specify for default)")
("freq_stop", po::value<double>(&freq_stop), "Frequency stop in Hz (do not specify for default)")
diff --git a/host/utils/uhd_cal_tx_iq_balance.cpp b/host/utils/uhd_cal_tx_iq_balance.cpp
index 5952cccc4..f08f8c9d1 100644
--- a/host/utils/uhd_cal_tx_iq_balance.cpp
+++ b/host/utils/uhd_cal_tx_iq_balance.cpp
@@ -120,7 +120,7 @@ int UHD_SAFE_MAIN(int argc, char *argv[])
("args", po::value<std::string>(&args)->default_value(""), "device address args [default = \"\"]")
("subdev", po::value<std::string>(&subdev), "Subdevice specification (default: first subdevice, often 'A')")
("tx_wave_freq", po::value<double>(&tx_wave_freq)->default_value(507.123e3), "Transmit wave frequency in Hz")
- ("tx_wave_ampl", po::value<double>(&tx_wave_ampl)->default_value(0.7), "Transmit wave amplitude in counts")
+ ("tx_wave_ampl", po::value<double>(&tx_wave_ampl)->default_value(0.7), "Transmit wave amplitude")
("rx_offset", po::value<double>(&rx_offset)->default_value(.9344e6), "RX LO offset from the TX LO in Hz")
("freq_start", po::value<double>(&freq_start), "Frequency start in Hz (do not specify for default)")
("freq_stop", po::value<double>(&freq_stop), "Frequency stop in Hz (do not specify for default)")