diff options
| -rw-r--r-- | CHANGELOG | 4 | ||||
| m--------- | fpga-src | 0 | ||||
| -rw-r--r-- | host/CMakeLists.txt | 4 |
3 files changed, 4 insertions, 4 deletions
@@ -9,7 +9,7 @@ Change Log for Releases now properly written. ignore-cal-file no longer ignored. Fixed case where too large recv_frame_size settings could break things. Reduced ZPU clock speed (helps FPGA timing). Added area constraints for AXI interconnect. Improved - halfband scaling in rx_frontend. + halfband scaling in rx_frontend. Improved PCIe streaming reliability - B2xx: Clear sequence numbers in idle state. - RFNoC: Nodes disconnect on destruction. Fixed setting of correct bits on sr_error_policy. DDC does no longer clear timed commands on EOB. DUC fixed @@ -17,7 +17,7 @@ Change Log for Releases commands on multiple channels). - UBX: Changed default performance parameters - TwinRX: LEDs properly light up depending on channels. Fixed issue of multiple - (redundant) writes. + (redundant) writes. Simplified API steps for phase synchronization - XCVR: Query dboard clock instead of DAC clock. Helps in X3x0s. - GPS: Fixed message for case when no GPS is present. Fixed multiple GPS-related issues. diff --git a/fpga-src b/fpga-src -Subproject 93808e8d5b182c0eb00aabd4ca1030cf46777ac +Subproject a32119007d7fff31aace083eed94b6a4979e9c0 diff --git a/host/CMakeLists.txt b/host/CMakeLists.txt index 1d3a6f5fc..4947b3fa0 100644 --- a/host/CMakeLists.txt +++ b/host/CMakeLists.txt @@ -338,8 +338,8 @@ UHD_INSTALL(FILES #{{{IMG_SECTION # This section is written automatically by /images/create_imgs_package.py # Any manual changes in here will be overwritten. -SET(UHD_IMAGES_MD5SUM "586c6f48f65ecfaeec3403a8b2780d72") -SET(UHD_IMAGES_DOWNLOAD_SRC "uhd-images_003.010.001.000-rc1.zip") +SET(UHD_IMAGES_MD5SUM "078b883192ef8d68465e4681537c1a8a") +SET(UHD_IMAGES_DOWNLOAD_SRC "uhd-images_003.010.001.000-rc2.zip") #}}} ######################################################################## |