diff options
| -rw-r--r-- | host/docs/usrp_b200.rst | 2 | ||||
| -rw-r--r-- | host/lib/usrp/common/ad9361_ctrl.hpp | 3 |
2 files changed, 3 insertions, 2 deletions
diff --git a/host/docs/usrp_b200.rst b/host/docs/usrp_b200.rst index 96bf9b5bc..bb2a2876a 100644 --- a/host/docs/usrp_b200.rst +++ b/host/docs/usrp_b200.rst @@ -53,7 +53,7 @@ Changing the Master Clock Rate ------------------------------------------------------------------------ The master clock rate feeds the RF frontends and the DSP chains. Users may select non-default clock rates to acheive integer decimations or interpolations in the DSP chains. -The default master clock rate defaults to 32 MHz, but can be set to any rate between 220 kHz and 61.44 MHz. +The default master clock rate defaults to 32 MHz, but can be set to any rate between 5 MHz and 61.44 MHz. The user can set the master clock rate through the usrp API call set_master_clock_rate(), or the clock rate can be set through the device arguments, which many applications take: diff --git a/host/lib/usrp/common/ad9361_ctrl.hpp b/host/lib/usrp/common/ad9361_ctrl.hpp index e678ba3b0..fd8012764 100644 --- a/host/lib/usrp/common/ad9361_ctrl.hpp +++ b/host/lib/usrp/common/ad9361_ctrl.hpp @@ -99,7 +99,8 @@ public: //! get the clock rate range for the frontend static uhd::meta_range_t get_clock_rate_range(void) { - return uhd::meta_range_t(220e3, 61.44e6); + //return uhd::meta_range_t(220e3, 61.44e6); + return uhd::meta_range_t(5e6, 61.44e6); //5 MHz DCM low end } //! set the filter bandwidth for the frontend |