diff options
| -rw-r--r-- | host/include/uhd/types/clock_config.hpp | 2 | ||||
| -rw-r--r-- | host/lib/usrp/usrp2/clock_ctrl.cpp | 4 | ||||
| -rw-r--r-- | host/lib/usrp/usrp2/clock_ctrl.hpp | 4 | ||||
| -rw-r--r-- | host/lib/usrp/usrp2/mboard_impl.cpp | 13 | ||||
| -rw-r--r-- | host/lib/usrp/usrp2/usrp2_regs.cpp | 1 | ||||
| -rw-r--r-- | host/lib/usrp/usrp2/usrp2_regs.hpp | 1 |
6 files changed, 16 insertions, 9 deletions
diff --git a/host/include/uhd/types/clock_config.hpp b/host/include/uhd/types/clock_config.hpp index 9342fbb7b..5966dcf3a 100644 --- a/host/include/uhd/types/clock_config.hpp +++ b/host/include/uhd/types/clock_config.hpp @@ -32,12 +32,10 @@ namespace uhd{ REF_AUTO = 'a', //automatic (device specific) REF_INT = 'i', //internal reference REF_SMA = 's', //external sma port - REF_MIMO = 'm' //mimo cable (usrp2 only) } ref_source; enum pps_source_t { PPS_INT = 'i', //there is no internal PPS_SMA = 's', //external sma port - PPS_MIMO = 'm' //mimo cable (usrp2 only) } pps_source; enum pps_polarity_t { PPS_NEG = 'n', //negative edge diff --git a/host/lib/usrp/usrp2/clock_ctrl.cpp b/host/lib/usrp/usrp2/clock_ctrl.cpp index 428d5539b..7dde88027 100644 --- a/host/lib/usrp/usrp2/clock_ctrl.cpp +++ b/host/lib/usrp/usrp2/clock_ctrl.cpp @@ -66,13 +66,11 @@ public: this->enable_external_ref(false); this->enable_rx_dboard_clock(false); this->enable_tx_dboard_clock(false); + this->enable_mimo_clock_out(false); /* private clock enables, must be set here */ this->enable_dac_clock(true); this->enable_adc_clock(true); - - /* always driving the mimo reference */ - this->enable_mimo_clock_out(true); } ~usrp2_clock_ctrl_impl(void){ diff --git a/host/lib/usrp/usrp2/clock_ctrl.hpp b/host/lib/usrp/usrp2/clock_ctrl.hpp index db6c52c83..10523fa6b 100644 --- a/host/lib/usrp/usrp2/clock_ctrl.hpp +++ b/host/lib/usrp/usrp2/clock_ctrl.hpp @@ -91,8 +91,10 @@ public: virtual void enable_test_clock(bool enb) = 0; /*! - * TODO other clock control api here.... + * Enable/disable the ref clock output over the serdes cable. + * \param enb true to enable */ + virtual void enable_mimo_clock_out(bool enb) = 0; }; diff --git a/host/lib/usrp/usrp2/mboard_impl.cpp b/host/lib/usrp/usrp2/mboard_impl.cpp index deb43bb13..20404635a 100644 --- a/host/lib/usrp/usrp2/mboard_impl.cpp +++ b/host/lib/usrp/usrp2/mboard_impl.cpp @@ -154,7 +154,6 @@ void usrp2_mboard_impl::update_clock_config(void){ //translate pps source enums switch(_clock_config.pps_source){ case clock_config_t::PPS_SMA: pps_flags |= U2_FLAG_TIME64_PPS_SMA; break; - case clock_config_t::PPS_MIMO: pps_flags |= U2_FLAG_TIME64_PPS_MIMO; break; default: throw std::runtime_error("unhandled clock configuration pps source"); } @@ -175,7 +174,6 @@ void usrp2_mboard_impl::update_clock_config(void){ switch(_clock_config.ref_source){ case clock_config_t::REF_INT : _iface->poke32(_iface->regs.misc_ctrl_clock, 0x12); break; case clock_config_t::REF_SMA : _iface->poke32(_iface->regs.misc_ctrl_clock, 0x1C); break; - case clock_config_t::REF_MIMO: _iface->poke32(_iface->regs.misc_ctrl_clock, 0x15); break; default: throw std::runtime_error("unhandled clock configuration reference source"); } _clock_ctrl->enable_external_ref(true); //USRP2P has an internal 10MHz TCXO @@ -186,7 +184,6 @@ void usrp2_mboard_impl::update_clock_config(void){ switch(_clock_config.ref_source){ case clock_config_t::REF_INT : _iface->poke32(_iface->regs.misc_ctrl_clock, 0x10); break; case clock_config_t::REF_SMA : _iface->poke32(_iface->regs.misc_ctrl_clock, 0x1C); break; - case clock_config_t::REF_MIMO: _iface->poke32(_iface->regs.misc_ctrl_clock, 0x15); break; default: throw std::runtime_error("unhandled clock configuration reference source"); } _clock_ctrl->enable_external_ref(_clock_config.ref_source != clock_config_t::REF_INT); @@ -194,6 +191,16 @@ void usrp2_mboard_impl::update_clock_config(void){ case usrp2_iface::USRP_NXXX: break; } + + //Handle the serdes clocking based on master/slave mode: + // - Masters always drive the clock over serdes. + // - Slaves always lock to this serdes clock. + // - Slaves lock their time over the serdes. + const bool master_mode = bool(_iface->peek32(_iface->regs.status) & (1 << 8)); + _clock_ctrl->enable_mimo_clock_out(master_mode); + if (not master_mode) _iface->poke32(_iface->regs.misc_ctrl_clock, 0x15); + //TODO slaves lock time over the serdes... + } void usrp2_mboard_impl::set_time_spec(const time_spec_t &time_spec, bool now){ diff --git a/host/lib/usrp/usrp2/usrp2_regs.cpp b/host/lib/usrp/usrp2/usrp2_regs.cpp index dd0433816..0590082f6 100644 --- a/host/lib/usrp/usrp2/usrp2_regs.cpp +++ b/host/lib/usrp/usrp2/usrp2_regs.cpp @@ -57,6 +57,7 @@ usrp2_regs_t usrp2_get_regs(bool use_n2xx_map) { x.time64_flags = sr_addr(misc_output_base, x.sr_time64 + 2); x.time64_imm = sr_addr(misc_output_base, x.sr_time64 + 3); x.time64_tps = sr_addr(misc_output_base, x.sr_time64 + 4); + x.status = bp_base + 4*8; x.time64_secs_rb = bp_base + 4*10; x.time64_ticks_rb = bp_base + 4*11; x.compat_num_rb = bp_base + 4*12; diff --git a/host/lib/usrp/usrp2/usrp2_regs.hpp b/host/lib/usrp/usrp2/usrp2_regs.hpp index 9936d634a..40c3635fb 100644 --- a/host/lib/usrp/usrp2/usrp2_regs.hpp +++ b/host/lib/usrp/usrp2/usrp2_regs.hpp @@ -57,6 +57,7 @@ typedef struct { int time64_flags; // flags -- see chart below int time64_imm; // set immediate (0=latch on next pps, 1=latch immediate, default=0) int time64_tps; // ticks per second rollover count + int status; int time64_secs_rb; int time64_ticks_rb; int compat_num_rb; |