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-rw-r--r--firmware/microblaze/lib/Makefile.am3
-rw-r--r--firmware/microblaze/lib/ad9777.c47
-rw-r--r--firmware/microblaze/lib/ad9777.h31
-rw-r--r--firmware/microblaze/lib/ad9777_regs.h71
-rw-r--r--firmware/microblaze/lib/u2_init.c16
-rw-r--r--host/lib/ic_reg_maps/gen_ad9777_regs.py8
-rw-r--r--host/lib/usrp/usrp2/mboard_impl.cpp25
7 files changed, 29 insertions, 172 deletions
diff --git a/firmware/microblaze/lib/Makefile.am b/firmware/microblaze/lib/Makefile.am
index 4ca05739c..3d02cfe8b 100644
--- a/firmware/microblaze/lib/Makefile.am
+++ b/firmware/microblaze/lib/Makefile.am
@@ -25,7 +25,6 @@ noinst_LIBRARIES = \
libu2fw_a_SOURCES = \
abort.c \
ad9510.c \
- ad9777.c \
bsm12.c \
buffer_pool.c \
clocks.c \
@@ -60,8 +59,6 @@ libu2fw_a_SOURCES = \
noinst_HEADERS = \
ad9510.h \
- ad9777.h \
- ad9777_regs.h \
bsm12.h \
buffer_pool.h \
clocks.h \
diff --git a/firmware/microblaze/lib/ad9777.c b/firmware/microblaze/lib/ad9777.c
deleted file mode 100644
index 734ccd7e5..000000000
--- a/firmware/microblaze/lib/ad9777.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2007 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include "ad9777.h"
-#include "memory_map.h"
-#include "spi.h"
-
-#define IB_RD 0x80
-#define IB_WR 0x00
-#define IB_XFER_1 0x00
-#define IB_XFER_2 0x20
-#define IB_XFER_3 0x40
-#define IB_XFER_4 0x60
-#define IB_ADDR_MASK 0x1f
-
-void
-ad9777_write_reg(int regno, uint8_t value)
-{
- uint8_t instr = IB_WR | IB_XFER_1 | (regno & IB_ADDR_MASK);
- spi_transact(SPI_TXONLY, SPI_SS_AD9777,
- (instr << 8) | (value & 0xff), 16, SPIF_PUSH_FALL);
-}
-
-int
-ad9777_read_reg(int regno)
-{
- uint8_t instr = IB_RD | IB_XFER_1 | (regno & IB_ADDR_MASK);
- uint32_t r = spi_transact(SPI_TXRX, SPI_SS_AD9777,
- (instr << 8) | 0, 16,
- SPIF_PUSH_FALL | SPIF_LATCH_RISE);
- return r & 0xff;
-}
diff --git a/firmware/microblaze/lib/ad9777.h b/firmware/microblaze/lib/ad9777.h
deleted file mode 100644
index d4d104910..000000000
--- a/firmware/microblaze/lib/ad9777.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2007,2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-#ifndef INCLUDED_AD9777_H
-#define INCLUDED_AD9777_H
-
-#include <stdint.h>
-#include "ad9777_regs.h"
-
-/*
- * Analog Devices AD9777 16-bit, 160 MS/s, Dual Interpolating TxDAC
- */
-
-void ad9777_write_reg(int regno, uint8_t value);
-int ad9777_read_reg(int regno);
-
-#endif /* INCLUDED_AD9777_H */
diff --git a/firmware/microblaze/lib/ad9777_regs.h b/firmware/microblaze/lib/ad9777_regs.h
deleted file mode 100644
index de2936c15..000000000
--- a/firmware/microblaze/lib/ad9777_regs.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2007 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-#ifndef INCLUDED_AD9777_REGS_H
-#define INCLUDED_AD9777_REGS_H
-
-#define R0_SW_RESET (1 << 5)
-#define R0_SLEEP (1 << 4)
-#define R0_POWER_DN (1 << 3)
-#define R0_1R (1 << 2)
-#define R0_2R (0 << 2)
-#define R0_PLL_LOCKED (1 << 1)
-
-#define R1_INTERP_1X 0x00
-#define R1_INTERP_2X 0x40
-#define R1_INTERP_4X 0x80
-#define R1_INTERP_8X 0xC0
-#define R1_MOD_NONE 0x00
-#define R1_MOD_FS_2 0x10 // Fs/2
-#define R1_MOD_FS_4 0x20 // Fs/4
-#define R1_MOD_FS_8 0x30 // Fs/8
-#define R1_ZERO_STUFF (1 << 3) // N.B., doubles output rate
-#define R1_REAL_MIX (1 << 2)
-#define R1_CMPLX_MIX (0 << 2)
-#define R1_POS_EXP (1 << 1) // exp(+jwt)
-#define R1_NEG_EXP (0 << 1) // exp(-jwt)
-#define R1_DATACLK_OUT (1 << 0)
-
-#define R2_2S_COMP (0 << 7)
-#define R2_2PORT_MODE (0 << 6)
-#define R2_1PORT_MODE (1 << 6)
-
-#define R3_PLL_DIV_1 0x00
-#define R3_PLL_DIV_2 0x01
-#define R3_PLL_DIV_4 0x02
-#define R3_PLL_DIV_8 0x03
-
-#define R4_PLL_ON (1 << 7)
-#define R4_CP_MANUAL (1 << 6)
-#define R4_CP_AUTO (0 << 6)
-#define R4_CP_50uA (0x00 | R4_CP_MANUAL)
-#define R4_CP_100uA (0x01 | R4_CP_MANUAL)
-#define R4_CP_200uA (0x02 | R4_CP_MANUAL)
-#define R4_CP_400uA (0x03 | R4_CP_MANUAL)
-#define R4_CP_800uA (0x07 | R4_CP_MANUAL)
-
-#define R5_I_FINE_GAIN(g) (g) // 8-bits
-#define R6_I_COARSE_GAIN(g) ((g) & 0xf) // low 4-bits
-
-#define R9_Q_FINE_GAIN(g) (g) // 8-bits
-#define R10_Q_COARSE_GAIN(g) ((g) & 0xf) // low 4-bits
-
-
-// FIXME more registers for offset and gain control...
-
-
-#endif /* INCLUDED_AD9777_REGS_H */
diff --git a/firmware/microblaze/lib/u2_init.c b/firmware/microblaze/lib/u2_init.c
index 2e2e6a0fb..c56468c08 100644
--- a/firmware/microblaze/lib/u2_init.c
+++ b/firmware/microblaze/lib/u2_init.c
@@ -26,7 +26,6 @@
#include "hal_uart.h"
#include "i2c.h"
#include "mdelay.h"
-#include "ad9777.h"
#include "clocks.h"
#include "db.h"
#include "usrp2_i2c_addr.h"
@@ -75,21 +74,6 @@ u2_init(void)
// Enable ADCs
output_regs->adc_ctrl = ADC_CTRL_ON;
-
- // Set up AD9777 DAC
- ad9777_write_reg(0, R0_1R);
- ad9777_write_reg(1, R1_INTERP_4X | R1_REAL_MIX);
- ad9777_write_reg(2, 0);
- ad9777_write_reg(3, R3_PLL_DIV_1);
- ad9777_write_reg(4, R4_PLL_ON | R4_CP_AUTO);
- ad9777_write_reg(5, R5_I_FINE_GAIN(0));
- ad9777_write_reg(6, R6_I_COARSE_GAIN(0xf));
- ad9777_write_reg(7, 0); // I dac offset
- ad9777_write_reg(8, 0);
- ad9777_write_reg(9, R9_Q_FINE_GAIN(0));
- ad9777_write_reg(10, R10_Q_COARSE_GAIN(0xf));
- ad9777_write_reg(11, 0); // Q dac offset
- ad9777_write_reg(12, 0);
// Initial values for tx and rx mux registers
dsp_tx_regs->tx_mux = 0x10;
diff --git a/host/lib/ic_reg_maps/gen_ad9777_regs.py b/host/lib/ic_reg_maps/gen_ad9777_regs.py
index 5bfd404c2..135d5c724 100644
--- a/host/lib/ic_reg_maps/gen_ad9777_regs.py
+++ b/host/lib/ic_reg_maps/gen_ad9777_regs.py
@@ -49,7 +49,7 @@ pll_lock_indicator 0[1] 0
filter_interp_rate 1[6:7] 0 1x, 2x, 4x, 8x
modulation_mode 1[4:5] 0 none, fs_2, fs_4, fs_8
zero_stuff_mode 1[3] 0
-real_mix_mode 1[2] 0
+mix_mode 1[2] 1 complex, real
modulation_form 1[1] 0 e_minus_jwt, e_plus_jwt
data_clk_pll_lock_sel 1[0] 0 pll_lock, data_clk
########################################################################
@@ -70,7 +70,7 @@ pll_divide_ratio 3[0:1] 0 div1, div2, div4, div8
########################################################################
## address 4
########################################################################
-pll_off 4[7] 0 off, on
+pll_state 4[7] 0 off, on
auto_cp_control 4[6] 0 dis, enb
pll_cp_control 4[0:2] 0 50ua=0, 100ua=1, 200ua=2, 400ua=3, 800ua=7
########################################################################
@@ -81,8 +81,8 @@ qdac_fine_gain_adjust 9[0:7] 0
########################################################################
## address 6 and A
########################################################################
-idac_fine_coarse_adjust 6[0:3] 0
-qdac_fine_coarse_adjust A[0:3] 0
+idac_coarse_gain_adjust 6[0:3] 0
+qdac_coarse_gain_adjust A[0:3] 0
########################################################################
## address 7, 8 and B, C
########################################################################
diff --git a/host/lib/usrp/usrp2/mboard_impl.cpp b/host/lib/usrp/usrp2/mboard_impl.cpp
index 4361e45cd..ea268651a 100644
--- a/host/lib/usrp/usrp2/mboard_impl.cpp
+++ b/host/lib/usrp/usrp2/mboard_impl.cpp
@@ -17,6 +17,7 @@
#include "usrp2_impl.hpp"
#include "usrp2_regs.hpp"
+#include "ad9777_regs.hpp"
#include <uhd/usrp/mboard_props.hpp>
#include <uhd/utils/assert.hpp>
#include <uhd/types/mac_addr.hpp>
@@ -35,6 +36,30 @@ void usrp2_impl::mboard_init(void){
);
_clock_control = clock_control::make_ad9510(this);
+
+ //setup the ad9777 dac
+ ad9777_regs_t ad9777_regs;
+ ad9777_regs.x_1r_2r_mode = ad9777_regs_t::X_1R_2R_MODE_1R;
+ ad9777_regs.filter_interp_rate = ad9777_regs_t::FILTER_INTERP_RATE_4X;
+ ad9777_regs.mix_mode = ad9777_regs_t::MIX_MODE_REAL;
+ ad9777_regs.pll_divide_ratio = ad9777_regs_t::PLL_DIVIDE_RATIO_DIV1;
+ ad9777_regs.pll_state = ad9777_regs_t::PLL_STATE_OFF;
+ ad9777_regs.auto_cp_control = ad9777_regs_t::AUTO_CP_CONTROL_ENB;
+ //I dac values
+ ad9777_regs.idac_fine_gain_adjust = 0;
+ ad9777_regs.idac_coarse_gain_adjust = 0xf;
+ ad9777_regs.idac_offset_adjust_lsb = 0;
+ ad9777_regs.idac_offset_adjust_msb = 0;
+ //Q dac values
+ ad9777_regs.qdac_fine_gain_adjust = 0;
+ ad9777_regs.qdac_coarse_gain_adjust = 0xf;
+ ad9777_regs.qdac_offset_adjust_lsb = 0;
+ ad9777_regs.qdac_offset_adjust_msb = 0;
+ //write all regs
+ for(boost::uint8_t addr = 0; addr <= 0xC; addr++){
+ boost::uint16_t data = ad9777_regs.get_write_reg(addr);
+ this->transact_spi(SPI_SS_AD9777, spi_config_t::EDGE_RISE, data, 16, false /*no rb*/);
+ }
}
clock_control::sptr usrp2_impl::get_clock_control(void){
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-29 13:50:13 +0000