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-rw-r--r--firmware/zpu/apps/txrx_uhd.c4
-rw-r--r--firmware/zpu/lib/ad9510.c6
-rw-r--r--firmware/zpu/lib/memory_map.h35
-rw-r--r--firmware/zpu/lib/spi.c102
-rw-r--r--firmware/zpu/lib/spi.h42
-rw-r--r--firmware/zpu/usrp2p/spi_flash.c4
-rw-r--r--firmware/zpu/usrp2p/spi_flash.h10
-rw-r--r--firmware/zpu/usrp2p/spif.c1
-rw-r--r--firmware/zpu/usrp2p/udp_fw_update.c4
-rw-r--r--host/examples/CMakeLists.txt1
-rw-r--r--host/lib/usrp/usrp2/usrp2_regs.hpp4
11 files changed, 74 insertions, 139 deletions
diff --git a/firmware/zpu/apps/txrx_uhd.c b/firmware/zpu/apps/txrx_uhd.c
index 591ee135a..0142aa3d4 100644
--- a/firmware/zpu/apps/txrx_uhd.c
+++ b/firmware/zpu/apps/txrx_uhd.c
@@ -181,8 +181,8 @@ static void handle_udp_ctrl_packet(
ctrl_data_in->data.spi_args.dev, //which device
ctrl_data_in->data.spi_args.data, //32 bit data
ctrl_data_in->data.spi_args.num_bits, //length in bits
- (ctrl_data_in->data.spi_args.mosi_edge == USRP2_CLK_EDGE_RISE)? SPIF_PUSH_FALL : SPIF_PUSH_RISE |
- (ctrl_data_in->data.spi_args.miso_edge == USRP2_CLK_EDGE_RISE)? SPIF_LATCH_RISE : SPIF_LATCH_FALL
+ (ctrl_data_in->data.spi_args.mosi_edge == USRP2_CLK_EDGE_RISE)? SPI_PUSH_FALL : SPI_PUSH_RISE |
+ (ctrl_data_in->data.spi_args.miso_edge == USRP2_CLK_EDGE_RISE)? SPI_LATCH_RISE : SPI_LATCH_FALL
);
//load output
diff --git a/firmware/zpu/lib/ad9510.c b/firmware/zpu/lib/ad9510.c
index 4d3acb65d..4021a9bf7 100644
--- a/firmware/zpu/lib/ad9510.c
+++ b/firmware/zpu/lib/ad9510.c
@@ -1,5 +1,5 @@
-/* -*- c++ -*- */
/*
+ * Copyright 2012 Ettus Research LLC
* Copyright 2008 Free Software Foundation, Inc.
*
* This program is free software: you can redistribute it and/or modify
@@ -28,7 +28,7 @@ ad9510_write_reg(int regno, uint8_t value)
{
uint32_t inst = WR | (regno & 0xff);
uint32_t v = (inst << 8) | (value & 0xff);
- spi_transact(SPI_TXONLY, SPI_SS_AD9510, v, 24, SPIF_PUSH_FALL);
+ spi_transact(SPI_TXONLY, SPI_SS_AD9510, v, 24, SPI_PUSH_FALL);
}
int
@@ -37,6 +37,6 @@ ad9510_read_reg(int regno)
uint32_t inst = RD | (regno & 0xff);
uint32_t v = (inst << 8) | 0;
uint32_t r = spi_transact(SPI_TXRX, SPI_SS_AD9510, v, 24,
- SPIF_PUSH_FALL | SPIF_LATCH_FALL);
+ SPI_PUSH_FALL | SPI_LATCH_FALL);
return r & 0xff;
}
diff --git a/firmware/zpu/lib/memory_map.h b/firmware/zpu/lib/memory_map.h
index 9d47522ca..8568872d0 100644
--- a/firmware/zpu/lib/memory_map.h
+++ b/firmware/zpu/lib/memory_map.h
@@ -1,4 +1,4 @@
-// Copyright 2010-2011 Ettus Research LLC
+// Copyright 2010-2012 Ettus Research LLC
/*
* Copyright 2007,2008,2009 Free Software Foundation, Inc.
*
@@ -49,18 +49,6 @@
// SPI Core, Slave 2. See core docs for more info
/////////////////////////////////////////////////////
-typedef struct {
- volatile uint32_t txrx0;
- volatile uint32_t txrx1;
- volatile uint32_t txrx2;
- volatile uint32_t txrx3;
- volatile uint32_t ctrl;
- volatile uint32_t div;
- volatile uint32_t ss;
-} spi_regs_t;
-
-#define spi_regs ((spi_regs_t *) SPI_BASE)
-
// Masks for controlling different peripherals
#define SPI_SS_AD9510 1
#define SPI_SS_AD9777 2
@@ -124,7 +112,8 @@ typedef struct {
///////////////////////////////////////////////////
typedef struct {
- volatile uint32_t _padding[8];
+ volatile uint32_t spi;
+ volatile uint32_t _padding[7];
volatile uint32_t status;
volatile uint32_t _unused;
volatile uint32_t time64_secs_rb;
@@ -134,6 +123,7 @@ typedef struct {
} router_status_t;
#define router_status ((router_status_t *) READBACK_BASE)
+#define readback_mux ((router_status_t *) READBACK_BASE) //alias with a better name
/*!
* \brief return non-zero if we're running under the simulator
@@ -207,7 +197,7 @@ typedef struct {
#define SR_SIMTIMER 8 // 2
#define SR_TIME64 10 // 6
#define SR_BUF_POOL 16 // 4
-
+#define SR_SPI_CORE 20 // 3
#define SR_RX_FRONT 24 // 5
#define SR_RX_CTRL0 32 // 9
#define SR_RX_DSP0 48 // 7
@@ -224,6 +214,21 @@ typedef struct {
#define SR_ADDR_BLDRDONE _SR_ADDR(5)
+// --- spi core control regs ---
+
+typedef struct {
+ volatile uint32_t divider;
+ volatile uint32_t control;
+ volatile uint32_t data;
+} spi_core_t;
+
+#define SPI_CORE_SLAVE_SELECT_SHIFT 0
+#define SPI_CORE_NUM_BITS_SHIFT 24
+#define SPI_CORE_DATA_IN_EDGE_SHIFT 30
+#define SPI_CORE_DATA_OUT_EDGE_SHIFT 31
+
+#define spi_core ((spi_core_t *) _SR_ADDR(SR_SPI_CORE))
+
// --- packet router control regs ---
typedef struct {
diff --git a/firmware/zpu/lib/spi.c b/firmware/zpu/lib/spi.c
index af0d8a68f..de3645fe3 100644
--- a/firmware/zpu/lib/spi.c
+++ b/firmware/zpu/lib/spi.c
@@ -1,4 +1,5 @@
/*
+ * Copyright 2012 Ettus Research LLC
* Copyright 2007,2008 Free Software Foundation, Inc.
*
* This program is free software: you can redistribute it and/or modify
@@ -17,94 +18,41 @@
#include "spi.h"
#include "memory_map.h"
-#include "pic.h"
#include "nonstdio.h"
+#include "mdelay.h"
-//void (*volatile spi_callback)(void); //SPI callback when xfer complete.
-
-//static void spi_irq_handler(unsigned irq);
-
-void
-spi_init(void)
+void spi_init(void)
{
- /*
- * f_sclk = f_wb / ((div + 1) * 2)
- */
- spi_regs->div = 1; // 0 = Div by 2 (25 MHz); 1 = Div-by-4 (12.5 MHz)
+ spi_core->divider = 100;
}
-void
-spi_wait(void)
+void spi_wait(void)
{
- while (spi_regs->ctrl & SPI_CTRL_GO_BSY)
- ;
+ //assumption that divider is reasonably small
+ mdelay(1);
}
-uint32_t
-spi_transact(bool readback, int slave, uint32_t data, int length, uint32_t flags)
+uint32_t spi_transact(bool readback, int slave, uint32_t data, int length, uint32_t flags)
{
- flags &= (SPI_CTRL_TXNEG | SPI_CTRL_RXNEG);
- int ctrl = SPI_CTRL_ASS | (SPI_CTRL_CHAR_LEN_MASK & length) | flags;
-
- spi_wait();
-
- // Tell it which SPI slave device to access
- spi_regs->ss = slave & 0xffff;
-
- // Data we will send
- spi_regs->txrx0 = data;
+ uint32_t control_word = 0;
+ control_word |= (slave << SPI_CORE_SLAVE_SELECT_SHIFT);
+ control_word |= (length << SPI_CORE_NUM_BITS_SHIFT);
+ if ((flags & SPI_PUSH_RISE) != 0) control_word |= (1 << SPI_CORE_DATA_IN_EDGE_SHIFT);
+ if ((flags & SPI_PUSH_FALL) != 0) control_word |= (0 << SPI_CORE_DATA_IN_EDGE_SHIFT);
+ if ((flags & SPI_LATCH_RISE) != 0) control_word |= (1 << SPI_CORE_DATA_OUT_EDGE_SHIFT);
+ if ((flags & SPI_LATCH_FALL) != 0) control_word |= (0 << SPI_CORE_DATA_OUT_EDGE_SHIFT);
+
+ uint32_t data_out_rev = 0;
+ for (size_t i = 0; i < length; i++){
+ const int bit = ((data >> i) & 0x1);
+ data_out_rev |= (bit << (length - i - 1));
+ }
- // Run it -- write once and rewrite with GO set
- spi_regs->ctrl = ctrl;
- spi_regs->ctrl = ctrl | SPI_CTRL_GO_BSY;
-
- if(readback) {
spi_wait();
- return spi_regs->txrx0;
- }
- else
- return 0;
-}
-
-/*
-void spi_register_callback(void (*volatile callback)(void)) {
- spi_callback = callback;
-}
-
-static void spi_irq_handler(unsigned irq) {
-// printf("SPI IRQ handler\n");
-// uint32_t wat = spi_regs->ctrl; //read a register just to clear the interrupt
- //spi_regs->ctrl &= ~SPI_CTRL_IE;
- if(spi_callback) spi_callback(); //we could just use the PIC to register the user's callback, but this provides the ability to do other things later
-}
-
-uint32_t spi_get_data(void) {
- return spi_regs->txrx0;
-}
-
-bool
-spi_async_transact(int slave, uint32_t data, int length, uint32_t flags, void (*volatile callback)(void)) {
- flags &= (SPI_CTRL_TXNEG | SPI_CTRL_RXNEG);
- int ctrl = SPI_CTRL_ASS | SPI_CTRL_IE | (SPI_CTRL_CHAR_LEN_MASK & length) | flags;
-
- if(spi_regs->ctrl & SPI_CTRL_GO_BSY) {
- printf("Async SPI busy!\n");
- return false; //we don't wait on busy, we just return failure. we count on the host to not set up another transaction before the last one finishes.
- }
-
- // Tell it which SPI slave device to access
- spi_regs->ss = slave & 0xffff;
-
- // Data we will send
- spi_regs->txrx0 = data;
-
- spi_register_callback(callback);
- pic_register_handler(IRQ_SPI, spi_irq_handler);
+ spi_core->control = control_word;
+ spi_core->data = data_out_rev;
- // Run it -- write once and rewrite with GO set
- spi_regs->ctrl = ctrl;
- spi_regs->ctrl = ctrl | SPI_CTRL_GO_BSY;
+ if (readback) spi_wait();
- return true;
+ return readback_mux->spi;
}
-*/
diff --git a/firmware/zpu/lib/spi.h b/firmware/zpu/lib/spi.h
index 71245150a..125e1a502 100644
--- a/firmware/zpu/lib/spi.h
+++ b/firmware/zpu/lib/spi.h
@@ -1,5 +1,5 @@
-/* -*- c -*- */
/*
+ * Copyright 2012 Ettus Research LLC
* Copyright 2006,2007 Free Software Foundation, Inc.
*
* This program is free software: you can redistribute it and/or modify
@@ -19,8 +19,8 @@
#ifndef INCLUDED_SPI_H
#define INCLUDED_SPI_H
-#include <memory_map.h>
#include <stdbool.h>
+#include <stdint.h>
/*!
* \brief One time call to initialize SPI
@@ -39,39 +39,11 @@ void spi_wait(void);
/*
* Flags for spi_transact
*/
-#define SPIF_PUSH_RISE 0 // push tx data on rising edge of SCLK
-#define SPIF_PUSH_FALL SPI_CTRL_TXNEG // push tx data on falling edge of SCLK
-#define SPIF_LATCH_RISE 0 // latch rx data on rising edge of SCLK
-#define SPIF_LATCH_FALL SPI_CTRL_RXNEG // latch rx data on falling edge of SCLK
-
-
-uint32_t
-spi_transact(bool readback, int slave, uint32_t data, int length, uint32_t flags);
-
-//uint32_t spi_get_data(void);
-//static void spi_irq_handler(unsigned irq);
-//void spi_register_callback(void (*volatile callback)(void));
-
-//bool
-//spi_async_transact(int slave, uint32_t data, int length, uint32_t flags, void (*volatile callback)(void));
-
-// ----------------------------------------------------------------
-// Routines that manipulate the FLASH SPI BUS
-// ----------------------------------------------------------------
-
-/*!
- * \brief One time call to initialize SPI
- */
-void spif_init(void);
-
-/*!
- * \brief Wait for last SPI transaction to complete.
- * Unless you need to know it completed, it's not necessary to call this.
- */
-void spif_wait(void);
-
-uint32_t
-spif_transact(bool readback_, int slave, uint32_t data, int length, uint32_t flags);
+#define SPI_PUSH_RISE (1 << 0) // push tx data on rising edge of SCLK
+#define SPI_PUSH_FALL (1 << 1) // push tx data on falling edge of SCLK
+#define SPI_LATCH_RISE (1 << 2) // latch rx data on rising edge of SCLK
+#define SPI_LATCH_FALL (1 << 3) // latch rx data on falling edge of SCLK
+uint32_t spi_transact(bool readback, int slave, uint32_t data, int length, uint32_t flags);
#endif /* INCLUDED_SPI_H */
diff --git a/firmware/zpu/usrp2p/spi_flash.c b/firmware/zpu/usrp2p/spi_flash.c
index 9406f8042..09f908edb 100644
--- a/firmware/zpu/usrp2p/spi_flash.c
+++ b/firmware/zpu/usrp2p/spi_flash.c
@@ -1,7 +1,6 @@
-/* -*- c++ -*- */
/*
* Copyright 2009 Free Software Foundation, Inc.
- * Copyright 2009-2011 Ettus Research LLC
+ * Copyright 2009-2012 Ettus Research LLC
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -17,6 +16,7 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
+#include "spi_flash.h"
#include "spi_flash_private.h"
//#include <stdlib.h>
#include <nonstdio.h>
diff --git a/firmware/zpu/usrp2p/spi_flash.h b/firmware/zpu/usrp2p/spi_flash.h
index a10533e08..8a8facdca 100644
--- a/firmware/zpu/usrp2p/spi_flash.h
+++ b/firmware/zpu/usrp2p/spi_flash.h
@@ -23,10 +23,18 @@
#include <stdint.h>
#include <stdbool.h>
-
#define SPI_FLASH_PAGE_SIZE 256
#define SPI_SS_FLASH 1
+#define SPIF_PUSH_RISE 0 // push tx data on rising edge of SCLK
+#define SPIF_PUSH_FALL SPI_CTRL_TXNEG // push tx data on falling edge of SCLK
+#define SPIF_LATCH_RISE 0 // latch rx data on rising edge of SCLK
+#define SPIF_LATCH_FALL SPI_CTRL_RXNEG // latch rx data on falling edge of SCLK
+
+void spif_init(void);
+void spif_wait(void);
+
+uint32_t spif_transact(bool readback, int slave, uint32_t data, int length, uint32_t flags);
uint32_t spi_flash_rdid(void); /* Read ID */
uint32_t spi_flash_rdsr(void); /* Read Status Register */
diff --git a/firmware/zpu/usrp2p/spif.c b/firmware/zpu/usrp2p/spif.c
index 91da73155..60807ca4a 100644
--- a/firmware/zpu/usrp2p/spif.c
+++ b/firmware/zpu/usrp2p/spif.c
@@ -21,6 +21,7 @@
*/
#include "spi.h"
+#include "spi_flash.h"
#include "memory_map.h"
void
diff --git a/firmware/zpu/usrp2p/udp_fw_update.c b/firmware/zpu/usrp2p/udp_fw_update.c
index 5689388a8..cd9e7d902 100644
--- a/firmware/zpu/usrp2p/udp_fw_update.c
+++ b/firmware/zpu/usrp2p/udp_fw_update.c
@@ -1,6 +1,5 @@
-/* -*- c++ -*- */
/*
- * Copyright 2010 Ettus Research LLC
+ * Copyright 2010-2012 Ettus Research LLC
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -19,6 +18,7 @@
//Routines to handle updating the SPI Flash firmware via UDP
#include <net_common.h>
+#include "memory_map.h"
#include "usrp2/fw_common.h"
#include "spi.h"
#include "spi_flash.h"
diff --git a/host/examples/CMakeLists.txt b/host/examples/CMakeLists.txt
index 3c9a3880a..151a7cdf0 100644
--- a/host/examples/CMakeLists.txt
+++ b/host/examples/CMakeLists.txt
@@ -27,6 +27,7 @@ SET(example_sources
rx_timed_samples.cpp
test_messages.cpp
test_pps_input.cpp
+ test_timed_commands.cpp
tx_bursts.cpp
tx_samples_from_file.cpp
tx_timed_samples.cpp
diff --git a/host/lib/usrp/usrp2/usrp2_regs.hpp b/host/lib/usrp/usrp2/usrp2_regs.hpp
index e14798ecb..7fe83e709 100644
--- a/host/lib/usrp/usrp2/usrp2_regs.hpp
+++ b/host/lib/usrp/usrp2/usrp2_regs.hpp
@@ -36,10 +36,10 @@
// Setting register offsets
////////////////////////////////////////////////////////////////////////
#define SR_MISC 0 // 7 regs
-#define SR_SIMTIMER 8 // 2
+#define SR_USER_REGS 8 // 2
#define SR_TIME64 10 // 6
#define SR_BUF_POOL 16 // 4
-#define SR_USER_REGS 20 // 2
+#define SR_SPI_CORE 20 // 3
#define SR_RX_FRONT 24 // 5
#define SR_RX_CTRL0 32 // 9
#define SR_RX_DSP0 48 // 7
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 12:01:21 +0000