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| author | Matt Ettus <matt@ettus.com> | 2011-07-26 11:41:36 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2011-08-15 15:37:52 -0700 |
| commit | edbdb0bf36619a0176da9b1cf6179212fef621a4 (patch) | |
| tree | 9e576563847954e5a6a81e6d2413b6d64ac990b9 /usrp2 | |
| parent | 0dcd0fd42a8575e875ef47898b8ccd4d85df77a1 (diff) | |
| download | uhd-edbdb0bf36619a0176da9b1cf6179212fef621a4.tar.gz uhd-edbdb0bf36619a0176da9b1cf6179212fef621a4.tar.bz2 uhd-edbdb0bf36619a0176da9b1cf6179212fef621a4.zip | |
dsp: clear cic_decim when not enabled
Diffstat (limited to 'usrp2')
| -rwxr-xr-x | usrp2/sdr_lib/cic_decim.v | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/usrp2/sdr_lib/cic_decim.v b/usrp2/sdr_lib/cic_decim.v index 9a03081b0..e6b6e9590 100755 --- a/usrp2/sdr_lib/cic_decim.v +++ b/usrp2/sdr_lib/cic_decim.v @@ -45,10 +45,10 @@ module cic_decim ext_input (.in(signal_in),.out(signal_in_ext)); always @(posedge clock) - if(reset) + if(~enable) for(i=0;i<N;i=i+1) integrator[i] <= 0; - else if (enable && strobe_in) + else if (strobe_in) begin integrator[0] <= integrator[0] + signal_in_ext; for(i=1;i<N;i=i+1) @@ -56,7 +56,7 @@ module cic_decim end always @(posedge clock) - if(reset) + if(~enable) begin sampler <= 0; for(i=0;i<N;i=i+1) @@ -65,7 +65,7 @@ module cic_decim differentiator[i] <= 0; end end - else if (enable && strobe_out) + else if (strobe_out) begin sampler <= integrator[N-1]; differentiator[0] <= sampler; |