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author | Josh Blum <josh@joshknows.com> | 2011-08-29 11:30:03 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2011-08-29 11:30:03 -0700 |
commit | c45e80ca4733b364d17c63f5eef137d5f8c78778 (patch) | |
tree | 6f4ba7dbb878b6e612df362d74fa8f3fc6522c83 /usrp2 | |
parent | d8a044097cb68f4bb9ed2727799568d534f631de (diff) | |
download | uhd-c45e80ca4733b364d17c63f5eef137d5f8c78778.tar.gz uhd-c45e80ca4733b364d17c63f5eef137d5f8c78778.tar.bz2 uhd-c45e80ca4733b364d17c63f5eef137d5f8c78778.zip |
fix warning on dat_o in atr_controller16.v
Diffstat (limited to 'usrp2')
-rw-r--r-- | usrp2/control_lib/atr_controller16.v | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/usrp2/control_lib/atr_controller16.v b/usrp2/control_lib/atr_controller16.v index 727f8c630..578da4a5c 100644 --- a/usrp2/control_lib/atr_controller16.v +++ b/usrp2/control_lib/atr_controller16.v @@ -22,7 +22,7 @@ module atr_controller16 (input clk_i, input rst_i, - input [5:0] adr_i, input [1:0] sel_i, input [15:0] dat_i, output reg [15:0] dat_o, + input [5:0] adr_i, input [1:0] sel_i, input [15:0] dat_i, output [15:0] dat_o, input we_i, input stb_i, input cyc_i, output reg ack_o, input run_rx, input run_tx, output [31:0] ctrl_lines); @@ -50,8 +50,7 @@ module atr_controller16 // Removing readback allows ram to be synthesized as LUTs instead of regs //always @(posedge clk_i) // dat_o <= adr_i[1] ? atr_ram[adr_i[5:2]][31:16] : atr_ram[adr_i[5:2]][15:0]; - always - dat_o <= 16'd0; + assign dat_o = 16'd0; always @(posedge clk_i) ack_o <= stb_i & cyc_i & ~ack_o; |