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| author | Matt Ettus <matt@ettus.com> | 2012-01-31 17:22:12 -0800 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2012-01-31 17:22:12 -0800 |
| commit | 7b69532aca8cc44017dedc1bfb07fa0d27b8ea6d (patch) | |
| tree | c9558bcf202b5b9e42fe6a641f8f8cfd17bf1b85 /usrp2 | |
| parent | 08b60ada2f025deac298faa2492c838db7c31d10 (diff) | |
| download | uhd-7b69532aca8cc44017dedc1bfb07fa0d27b8ea6d.tar.gz uhd-7b69532aca8cc44017dedc1bfb07fa0d27b8ea6d.tar.bz2 uhd-7b69532aca8cc44017dedc1bfb07fa0d27b8ea6d.zip | |
dsp_rework: handle longer headers
Diffstat (limited to 'usrp2')
| -rw-r--r-- | usrp2/sdr_lib/dspengine_8to16.v | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/usrp2/sdr_lib/dspengine_8to16.v b/usrp2/sdr_lib/dspengine_8to16.v index 7319451e5..ca808d2a6 100644 --- a/usrp2/sdr_lib/dspengine_8to16.v +++ b/usrp2/sdr_lib/dspengine_8to16.v @@ -146,7 +146,10 @@ module dspengine_8to16 write_adr <= write_adr - 1; odd <= 0; if(write_adr == (hdr_length_reg+HEADER_OFFSET)) - dsp_state <= DSP_WRITE_HEADER; + begin + write_adr <= HEADER_OFFSET; + dsp_state <= DSP_WRITE_HEADER; + end else if(odd) dsp_state <= DSP_READ; else @@ -157,7 +160,10 @@ module dspengine_8to16 begin write_adr <= write_adr - 1; if(write_adr == (hdr_length_reg+HEADER_OFFSET)) - dsp_state <= DSP_WRITE_HEADER; + begin + write_adr <= HEADER_OFFSET; + dsp_state <= DSP_WRITE_HEADER; + end else dsp_state <= DSP_READ; end |