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authorMatt Ettus <matt@ettus.com>2011-05-09 17:35:08 -0700
committerMatt Ettus <matt@ettus.com>2011-06-08 10:52:51 -0700
commit757d06d2f3393a4ef6c85b610419c6e4922709bb (patch)
treee1ccac207decc5d0715d891dcc3530b898db4f83 /usrp2
parente78a301ed17bbb79d688b21a72fa839eeb98aa9a (diff)
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dsp: more typos
Diffstat (limited to 'usrp2')
-rw-r--r--usrp2/sdr_lib/dsp_core_rx.v4
1 files changed, 2 insertions, 2 deletions
diff --git a/usrp2/sdr_lib/dsp_core_rx.v b/usrp2/sdr_lib/dsp_core_rx.v
index 8c8297124..afba3428e 100644
--- a/usrp2/sdr_lib/dsp_core_rx.v
+++ b/usrp2/sdr_lib/dsp_core_rx.v
@@ -126,10 +126,10 @@ module dsp_core_rx
(.clk(clk),.rst(rst),.bypass(~enable_hb2),.run(run),.cpi(cpi_hb),
.stb_in(strobe_hb1),.data_in(q_hb1),.stb_out(),.data_out(q_hb2));
- round_sd #(.bits_in(18),.bits_out(16)) round_iout
+ round_sd #(.WIDTH_IN(18),.WIDTH_OUT(16)) round_iout
(.clk(clk), .in(i_hb2), .strobe_in(strobe_hb2), .out(i_out), .strobe_out(strobe));
- round_sd #(.bits_in(18),.bits_out(16)) round_qout
+ round_sd #(.WIDTH_IN(18),.WIDTH_OUT(16)) round_qout
(.clk(clk), .in(q_hb2), .strobe_in(strobe_hb2), .out(q_out), .strobe_out());
assign sample = {i_hb2,q_hb2};