summaryrefslogtreecommitdiffstats
path: root/usrp2
diff options
context:
space:
mode:
authorMatt Ettus <matt@ettus.com>2011-05-09 17:28:54 -0700
committerMatt Ettus <matt@ettus.com>2011-06-08 10:52:51 -0700
commit2e2de3f8f7e055c9f583a17a513774f307ffbc04 (patch)
treec4605aa3dcb396d129eead0c102f5ef9b07eab6f /usrp2
parent568535308d377eeb459a385f7a10b40cbe73a4d9 (diff)
downloaduhd-2e2de3f8f7e055c9f583a17a513774f307ffbc04.tar.gz
uhd-2e2de3f8f7e055c9f583a17a513774f307ffbc04.tar.bz2
uhd-2e2de3f8f7e055c9f583a17a513774f307ffbc04.zip
dsp: fix typos
Diffstat (limited to 'usrp2')
-rw-r--r--usrp2/sdr_lib/dsp_core_rx.v16
-rw-r--r--usrp2/sdr_lib/rx_dcoffset.v4
-rw-r--r--usrp2/sdr_lib/rx_frontend.v8
3 files changed, 14 insertions, 14 deletions
diff --git a/usrp2/sdr_lib/dsp_core_rx.v b/usrp2/sdr_lib/dsp_core_rx.v
index 6a12836f2..8c8297124 100644
--- a/usrp2/sdr_lib/dsp_core_rx.v
+++ b/usrp2/sdr_lib/dsp_core_rx.v
@@ -103,11 +103,11 @@ module dsp_core_rx
.signal_in(q_cordic),.signal_out(q_cic));
wire strobe_cic_d1;
- round_sd #(.WIDTH_IN(24),.WIDTH_OUT(18))
- round_icic (.clk(clk),. in(i_cic), .strobe_in(strobe_cic), .out(i_cic_scaled), .strobe_out(strobe_cic_d1));
+ round_sd #(.WIDTH_IN(24),.WIDTH_OUT(18)) round_icic
+ (.clk(clk),. in(i_cic), .strobe_in(strobe_cic), .out(i_cic_scaled), .strobe_out(strobe_cic_d1));
- round_sd #(.WIDTH_IN(24),.WIDTH_OUT(18))
- round_qcic (.clk(clk), .in(q_cic), .strobe_in(strobe_cic), .out(q_cic_scaled), .strobe_out());
+ round_sd #(.WIDTH_IN(24),.WIDTH_OUT(18)) round_qcic
+ (.clk(clk), .in(q_cic), .strobe_in(strobe_cic), .out(q_cic_scaled), .strobe_out());
small_hb_dec #(.WIDTH(18)) small_hb_i
(.clk(clk),.rst(rst),.bypass(~enable_hb1),.run(run),
@@ -126,11 +126,11 @@ module dsp_core_rx
(.clk(clk),.rst(rst),.bypass(~enable_hb2),.run(run),.cpi(cpi_hb),
.stb_in(strobe_hb1),.data_in(q_hb1),.stb_out(),.data_out(q_hb2));
- round_sd #(.bits_in(18),.bits_out(16))
- round_iout (.clk(clk), .in(i_hb2), .strobe_in(strobe_hb2), .out(i_out), .strobe_out(strobe));
+ round_sd #(.bits_in(18),.bits_out(16)) round_iout
+ (.clk(clk), .in(i_hb2), .strobe_in(strobe_hb2), .out(i_out), .strobe_out(strobe));
- round_sd #(.bits_in(18),.bits_out(16))
- round_qout (.clk(clk), .in(q_hb2), .strobe_in(strobe_hb2), .out(q_out), .strobe_out());
+ round_sd #(.bits_in(18),.bits_out(16)) round_qout
+ (.clk(clk), .in(q_hb2), .strobe_in(strobe_hb2), .out(q_out), .strobe_out());
assign sample = {i_hb2,q_hb2};
assign debug = {enable_hb1, enable_hb2, run, strobe, strobe_cic, strobe_cic_d1, strobe_hb1, strobe_hb2};
diff --git a/usrp2/sdr_lib/rx_dcoffset.v b/usrp2/sdr_lib/rx_dcoffset.v
index 350579056..e43461261 100644
--- a/usrp2/sdr_lib/rx_dcoffset.v
+++ b/usrp2/sdr_lib/rx_dcoffset.v
@@ -49,9 +49,9 @@ module rx_dcoffset
integrator <= integrator + {{(alpha_shift){out[WIDTH-1]}},out};
round_sd #(.WIDTH_IN(int_width),.WIDTH_OUT(WIDTH)) round_sd
- (.clk(clk), .reset(rst), .in(integrator), .strobe_in(1'b1), .out(quantized), strobe_out());
+ (.clk(clk), .reset(rst), .in(integrator), .strobe_in(1'b1), .out(quantized), .strobe_out());
add2_and_clip_reg #(.WIDTH(WIDTH)) add2_and_clip_reg
- (.clk(clk), .rst(rst), .in1(in), .in2(-quantized), .strobe_in(1'b1), .sum(out), strobe_out());
+ (.clk(clk), .rst(rst), .in1(in), .in2(-quantized), .strobe_in(1'b1), .sum(out), .strobe_out());
endmodule // rx_dcoffset
diff --git a/usrp2/sdr_lib/rx_frontend.v b/usrp2/sdr_lib/rx_frontend.v
index 98f72509c..f93172f16 100644
--- a/usrp2/sdr_lib/rx_frontend.v
+++ b/usrp2/sdr_lib/rx_frontend.v
@@ -71,10 +71,10 @@ module rx_frontend
.in1({adc_q_ofs,6'd0}), .in2({{4{corr_q[35]}},corr_q[35:16]}), .strobe_in(1'b1),
.sum(q_final), .strobe_out());
- round_sd #(.WIDTH_IN(24),.WIDTH_OUT(18))
- round_i (.clk(clk), .reset(rst), .in(i_final), .strobe_in(1'b1), .out(i_out), .strobe_out());
+ round_sd #(.WIDTH_IN(24),.WIDTH_OUT(18)) round_i
+ (.clk(clk), .reset(rst), .in(i_final), .strobe_in(1'b1), .out(i_out), .strobe_out());
- round_sd #(.WIDTH_IN(24),.WIDTH_OUT(18))
- round_q (.clk(clk), .reset(rst), .in(q_final), .strobe_in(1'b1), .out(q_out), .strobe_out());
+ round_sd #(.WIDTH_IN(24),.WIDTH_OUT(18)) round_q
+ (.clk(clk), .reset(rst), .in(q_final), .strobe_in(1'b1), .out(q_out), .strobe_out());
endmodule // rx_frontend