Merge branch 'u1e' of ettus.sourcerepo.com:ettus/fpgapriv into u1e

Conflicts:
	usrp2/top/u1e/u1e_core.v

1 files changed, 2 insertions, 4 deletions

diff --git a/usrp2/top/u1e/u1e_core.v b/usrp2/top/u1e/u1e_core.v
index 21ac97dbd..71b9b8712 100644
--- a/usrp2/top/u1e/u1e_core.v
+++ b/usrp2/top/u1e/u1e_core.v
@@ -361,12 +361,10 @@ module u1e_core
    // Debug circuitry
 
    assign debug_clk = { EM_CLK, clk_fpga };
-/*
-    assign debug = { { rx_have_data, tx_have_space, EM_NCS6, EM_NCS4, EM_NWE, EM_NOE, EM_A[10:1] },
+   assign debug = { { rx_have_data, tx_have_space, EM_NCS6, EM_NCS4, EM_NWE, EM_NOE, EM_A[10:1] },
 		    { EM_D } };
-*/
 
-   assign debug = { phase[23:8], txsync, txblank, tx };
+   //assign debug = { phase[23:8], txsync, txblank, tx };
    
    
    assign debug_gpio_0 = { debug_gpmc };