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authorMatt Ettus <matt@ettus.com>2010-10-07 11:10:00 -0700
committerMatt Ettus <matt@ettus.com>2010-10-07 11:10:00 -0700
commit26ada69153c8db487dda81ca63a5ea9c7ac6ba88 (patch)
tree77ecddecb72557abf0a1dad8d3fc009a4a48f2b6 /usrp2
parent8d1214d5a0279fec2dcd2e2c2b97ea60250cc6d4 (diff)
downloaduhd-26ada69153c8db487dda81ca63a5ea9c7ac6ba88.tar.gz
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revert unneeded changes and incorrect comments
Diffstat (limited to 'usrp2')
-rw-r--r--usrp2/fifo/fifo_cascade.v8
-rw-r--r--usrp2/top/u2_rev3/u2_rev3.ucf64
-rw-r--r--usrp2/vrt/vita_tx_deframer.v4
3 files changed, 38 insertions, 38 deletions
diff --git a/usrp2/fifo/fifo_cascade.v b/usrp2/fifo/fifo_cascade.v
index ff2993ed5..fdd8449bc 100644
--- a/usrp2/fifo/fifo_cascade.v
+++ b/usrp2/fifo/fifo_cascade.v
@@ -10,11 +10,11 @@ module fifo_cascade
#(parameter WIDTH=32, SIZE=9)
(input clk, input reset, input clear,
input [WIDTH-1:0] datain,
- input src_rdy_i, // WRITE
- output dst_rdy_o, // not FULL
+ input src_rdy_i,
+ output dst_rdy_o,
output [WIDTH-1:0] dataout,
- output src_rdy_o, // not EMPTY
- input dst_rdy_i, // READ
+ output src_rdy_o,
+ input dst_rdy_i,
output [15:0] space,
output [15:0] occupied);
diff --git a/usrp2/top/u2_rev3/u2_rev3.ucf b/usrp2/top/u2_rev3/u2_rev3.ucf
index 175fbec8d..6e0caedd5 100644
--- a/usrp2/top/u2_rev3/u2_rev3.ucf
+++ b/usrp2/top/u2_rev3/u2_rev3.ucf
@@ -264,22 +264,22 @@ NET "sdi_tx_adc" LOC = "J4" ;
NET "sen_tx_dac" LOC = "H4" ;
NET "sclk_tx_dac" LOC = "J5" ;
NET "sdi_tx_dac" LOC = "J6" ;
-NET "io_tx[0]" LOC = "K4" |DRIVE = 12 |SLEW = FAST ;
-NET "io_tx[1]" LOC = "K3" |DRIVE = 12 |SLEW = FAST ;
-NET "io_tx[2]" LOC = "G1" |DRIVE = 12 |SLEW = FAST ;
-NET "io_tx[3]" LOC = "G5" |DRIVE = 12 |SLEW = FAST ;
-NET "io_tx[4]" LOC = "H5" |DRIVE = 12 |SLEW = FAST ;
-NET "io_tx[5]" LOC = "F3" |DRIVE = 12 |SLEW = FAST ;
-NET "io_tx[6]" LOC = "F2" |DRIVE = 12 |SLEW = FAST ;
-NET "io_tx[7]" LOC = "F5" |DRIVE = 12 |SLEW = FAST ;
-NET "io_tx[8]" LOC = "G6" |DRIVE = 12 |SLEW = FAST ;
-NET "io_tx[9]" LOC = "E2" |DRIVE = 12 |SLEW = FAST ;
-NET "io_tx[10]" LOC = "E1" |DRIVE = 12 |SLEW = FAST ;
-NET "io_tx[11]" LOC = "E3" |DRIVE = 12 |SLEW = FAST ;
-NET "io_tx[12]" LOC = "F4" |DRIVE = 12 |SLEW = FAST ;
-NET "io_tx[13]" LOC = "D2" |DRIVE = 12 |SLEW = FAST ;
-NET "io_tx[14]" LOC = "D4" |DRIVE = 12 |SLEW = FAST ;
-NET "io_tx[15]" LOC = "E4" |DRIVE = 12 |SLEW = FAST ;
+NET "io_tx[0]" LOC = "K4" ;
+NET "io_tx[1]" LOC = "K3" ;
+NET "io_tx[2]" LOC = "G1" ;
+NET "io_tx[3]" LOC = "G5" ;
+NET "io_tx[4]" LOC = "H5" ;
+NET "io_tx[5]" LOC = "F3" ;
+NET "io_tx[6]" LOC = "F2" ;
+NET "io_tx[7]" LOC = "F5" ;
+NET "io_tx[8]" LOC = "G6" ;
+NET "io_tx[9]" LOC = "E2" ;
+NET "io_tx[10]" LOC = "E1" ;
+NET "io_tx[11]" LOC = "E3" ;
+NET "io_tx[12]" LOC = "F4" ;
+NET "io_tx[13]" LOC = "D2" ;
+NET "io_tx[14]" LOC = "D4" ;
+NET "io_tx[15]" LOC = "E4" ;
NET "sen_rx_db" LOC = "D22" ;
NET "sclk_rx_db" LOC = "F19" ;
NET "sdo_rx_db" LOC = "G20" ;
@@ -291,22 +291,22 @@ NET "sdi_rx_adc" LOC = "H22" ;
NET "sen_rx_dac" LOC = "J18" ;
NET "sclk_rx_dac" LOC = "J19" ;
NET "sdi_rx_dac" LOC = "J21" ;
-NET "io_rx[0]" LOC = "L21" |DRIVE = 12 |SLEW = FAST ;
-NET "io_rx[1]" LOC = "L20" |DRIVE = 12 |SLEW = FAST ;
-NET "io_rx[2]" LOC = "L19" |DRIVE = 12 |SLEW = FAST ;
-NET "io_rx[3]" LOC = "L18" |DRIVE = 12 |SLEW = FAST ;
-NET "io_rx[4]" LOC = "L17" |DRIVE = 12 |SLEW = FAST ;
-NET "io_rx[5]" LOC = "K22" |DRIVE = 12 |SLEW = FAST ;
-NET "io_rx[6]" LOC = "K21" |DRIVE = 12 |SLEW = FAST ;
-NET "io_rx[7]" LOC = "K20" |DRIVE = 12 |SLEW = FAST ;
-NET "io_rx[8]" LOC = "G22" |DRIVE = 12 |SLEW = FAST ;
-NET "io_rx[9]" LOC = "G21" |DRIVE = 12 |SLEW = FAST ;
-NET "io_rx[10]" LOC = "F21" |DRIVE = 12 |SLEW = FAST ;
-NET "io_rx[11]" LOC = "F20" |DRIVE = 12 |SLEW = FAST ;
-NET "io_rx[12]" LOC = "G19" |DRIVE = 12 |SLEW = FAST ;
-NET "io_rx[13]" LOC = "G18" |DRIVE = 12 |SLEW = FAST ;
-NET "io_rx[14]" LOC = "G17" |DRIVE = 12 |SLEW = FAST ;
-NET "io_rx[15]" LOC = "E22" |DRIVE = 12 |SLEW = FAST ;
+NET "io_rx[0]" LOC = "L21" ;
+NET "io_rx[1]" LOC = "L20" ;
+NET "io_rx[2]" LOC = "L19" ;
+NET "io_rx[3]" LOC = "L18" ;
+NET "io_rx[4]" LOC = "L17" ;
+NET "io_rx[5]" LOC = "K22" ;
+NET "io_rx[6]" LOC = "K21" ;
+NET "io_rx[7]" LOC = "K20" ;
+NET "io_rx[8]" LOC = "G22" ;
+NET "io_rx[9]" LOC = "G21" ;
+NET "io_rx[10]" LOC = "F21" ;
+NET "io_rx[11]" LOC = "F20" ;
+NET "io_rx[12]" LOC = "G19" ;
+NET "io_rx[13]" LOC = "G18" ;
+NET "io_rx[14]" LOC = "G17" ;
+NET "io_rx[15]" LOC = "E22" ;
NET "clk_to_mac" TNM_NET = "clk_to_mac";
TIMESPEC "TS_clk_to_mac" = PERIOD "clk_to_mac" 8 ns HIGH 50 %;
diff --git a/usrp2/vrt/vita_tx_deframer.v b/usrp2/vrt/vita_tx_deframer.v
index b62507092..f9cd7d00d 100644
--- a/usrp2/vrt/vita_tx_deframer.v
+++ b/usrp2/vrt/vita_tx_deframer.v
@@ -84,7 +84,7 @@ module vita_tx_deframer
seqnum_err <= 0;
end
else
- if((vita_state == VITA_STORE) & fifo_space ) //& src_rdy_i)
+ if((vita_state == VITA_STORE) & fifo_space)
if(eop)
if(has_trailer_reg)
vita_state <= VITA_TRAILER;
@@ -183,7 +183,7 @@ module vita_tx_deframer
3: sample_d <= data_i[31:0];
endcase // case (vector_phase)
- wire store = (vita_state == VITA_STORE) ; //& src_rdy_i;
+ wire store = (vita_state == VITA_STORE);
fifo_short #(.WIDTH(FIFOWIDTH)) short_tx_q
(.clk(clk), .reset(reset), .clear(clear),
.datain(fifo_i), .src_rdy_i(store), .dst_rdy_o(fifo_space),