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| author | Matt Ettus <matt@ettus.com> | 2010-02-23 19:59:54 -0800 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2010-02-23 19:59:54 -0800 |
| commit | 0d9c46ae002cad7c144432e86987a81eb33157fc (patch) | |
| tree | 116342f5cbfa09dee7e69d6095b77678f985abc2 /usrp2 | |
| parent | 702c87c3bae259f038d2c10fe32903f391e95de1 (diff) | |
| parent | 904b35c689d38694913606c569a9d324533ff765 (diff) | |
| download | uhd-0d9c46ae002cad7c144432e86987a81eb33157fc.tar.gz uhd-0d9c46ae002cad7c144432e86987a81eb33157fc.tar.bz2 uhd-0d9c46ae002cad7c144432e86987a81eb33157fc.zip | |
Merge branch 'master' into u1e
Conflicts:
.gitignore
Diffstat (limited to 'usrp2')
| -rw-r--r-- | usrp2/control_lib/ram_2port.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/usrp2/control_lib/ram_2port.v b/usrp2/control_lib/ram_2port.v index 6c8332b9c..3716a7c8a 100644 --- a/usrp2/control_lib/ram_2port.v +++ b/usrp2/control_lib/ram_2port.v @@ -21,7 +21,7 @@ module ram_2port integer i; initial for(i=0;i<(1<<AWIDTH);i=i+1) - ram[i] <= {AWIDTH{1'b0}}; + ram[i] <= {DWIDTH{1'b0}}; always @(posedge clka) begin if (ena) |