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authorJosh Blum <josh@joshknows.com>2012-01-30 15:09:47 -0800
committerJosh Blum <josh@joshknows.com>2012-01-30 15:09:47 -0800
commit05644d7d4fe2df455b01833cc0fc8aa1b4b6e1f3 (patch)
tree49f2ce0d9eda6652099acf6d1bea24a58448006e /usrp2/vrt
parentac35b413a595617c1fa57766758c06ccfe3f320e (diff)
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dsp rework: integrated dspengine_8to16, some tweaks
Diffstat (limited to 'usrp2/vrt')
-rw-r--r--usrp2/vrt/vita_tx_chain.v6
1 files changed, 2 insertions, 4 deletions
diff --git a/usrp2/vrt/vita_tx_chain.v b/usrp2/vrt/vita_tx_chain.v
index 7ea3978af..f9348bbfd 100644
--- a/usrp2/vrt/vita_tx_chain.v
+++ b/usrp2/vrt/vita_tx_chain.v
@@ -75,15 +75,13 @@ module vita_tx_chain
.data_i(tx_data_i), .src_rdy_i(tx_src_rdy_i), .dst_rdy_o(tx_dst_rdy_o),
.data_o(tx_data_int2), .src_rdy_o(tx_src_rdy_int2), .dst_rdy_i(tx_dst_rdy_int2));
-/*
- dspengine_8to16 #(.BASE(BASE+X), .BUF_SIZE(FIFOSIZE)) dspengine_16to8
+
+ dspengine_8to16 #(.BASE(BASE+6), .BUF_SIZE(FIFOSIZE)) dspengine_8to16
(.clk(clk),.reset(reset),.clear(clear),
.set_stb(set_stb), .set_addr(set_addr), .set_data(set_data),
.access_we(access_we), .access_stb(access_stb), .access_ok(access_ok), .access_done(access_done),
.access_skip_read(access_skip_read), .access_adr(access_adr), .access_len(access_len),
.access_dat_i(buf_to_dsp), .access_dat_o(dsp_to_buf));
-*/
- assign access_done = access_ok; //passthrough
vita_tx_deframer #(.BASE(BASE),
.MAXCHAN(MAXCHAN),