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| author | Matt Ettus <matt@ettus.com> | 2010-11-13 18:19:37 -0800 |
|---|---|---|
| committer | Matt Ettus <matt@ettus.com> | 2010-11-13 18:19:37 -0800 |
| commit | f04a49aabfce58fa57e5dcc727b7a13143fb92a4 (patch) | |
| tree | 333a52462b53501bbb590cdda0b68bcf8db97ec7 /usrp2/vrt | |
| parent | 00297596c28df8d5ffd454f95f71b290dcbe07ef (diff) | |
| download | uhd-f04a49aabfce58fa57e5dcc727b7a13143fb92a4.tar.gz uhd-f04a49aabfce58fa57e5dcc727b7a13143fb92a4.tar.bz2 uhd-f04a49aabfce58fa57e5dcc727b7a13143fb92a4.zip | |
simplify time comparison to speed up logic and meet fpga timing
Diffstat (limited to 'usrp2/vrt')
| -rw-r--r-- | usrp2/vrt/vita_tx_control.v | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/usrp2/vrt/vita_tx_control.v b/usrp2/vrt/vita_tx_control.v index 967847d36..ddcb6a2d2 100644 --- a/usrp2/vrt/vita_tx_control.v +++ b/usrp2/vrt/vita_tx_control.v @@ -38,9 +38,8 @@ module vita_tx_control // FIXME ignore too_early for now for timing reasons assign too_early = 0; time_compare - time_compare (.time_now(vita_time), .trigger_time(send_time), .now(now), .early(early), - .late(late), .too_early()); -// .late(late), .too_early(too_early)); + time_compare (.time_now(vita_time), .trigger_time(send_time), + .now(now), .early(early), .late(late), .too_early()); localparam IBS_IDLE = 0; localparam IBS_RUN = 1; // FIXME do we need this? |