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author | Matt Ettus <matt@ettus.com> | 2010-11-18 18:39:24 -0800 |
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committer | Matt Ettus <matt@ettus.com> | 2010-11-18 18:39:24 -0800 |
commit | 7383ff07f482f8dcf37f2c1464f6a29d1b0bdf0b (patch) | |
tree | 49a27c4d35e6bd6d1cfe790c82431da2fa9914cd /usrp2/vrt | |
parent | f04a49aabfce58fa57e5dcc727b7a13143fb92a4 (diff) | |
download | uhd-7383ff07f482f8dcf37f2c1464f6a29d1b0bdf0b.tar.gz uhd-7383ff07f482f8dcf37f2c1464f6a29d1b0bdf0b.tar.bz2 uhd-7383ff07f482f8dcf37f2c1464f6a29d1b0bdf0b.zip |
fix problem with consecutive timed packets on tx
Diffstat (limited to 'usrp2/vrt')
-rw-r--r-- | usrp2/vrt/vita_tx_deframer.v | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/usrp2/vrt/vita_tx_deframer.v b/usrp2/vrt/vita_tx_deframer.v index 7697be367..eb39feaec 100644 --- a/usrp2/vrt/vita_tx_deframer.v +++ b/usrp2/vrt/vita_tx_deframer.v @@ -201,8 +201,6 @@ module vita_tx_deframer send_time[63:32] <= data_i[31:0]; VITA_TICS2 : send_time[31:0] <= data_i[31:0]; - VITA_STORE, VITA_HEADER : - send_time[63:0] <= 64'd0; endcase // case (vita_state) always @(posedge clk) |