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authorMatt Ettus <matt@ettus.com>2010-07-09 14:22:06 -0700
committerMatt Ettus <matt@ettus.com>2010-07-09 14:22:06 -0700
commit4f79676f7d51a2718c13f79151f2ed852c7447b6 (patch)
treedd00f656b076083a300b5413c06fc894c05d1727 /usrp2/vrt
parent42a98490a78ab08615dafe688848010c1a97ccfe (diff)
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fix to stop endless error packets
Diffstat (limited to 'usrp2/vrt')
-rw-r--r--usrp2/vrt/vita_rx_framer.v4
1 files changed, 2 insertions, 2 deletions
diff --git a/usrp2/vrt/vita_rx_framer.v b/usrp2/vrt/vita_rx_framer.v
index 3c910924c..fd82263d0 100644
--- a/usrp2/vrt/vita_rx_framer.v
+++ b/usrp2/vrt/vita_rx_framer.v
@@ -193,7 +193,7 @@ module vita_rx_framer
VITA_PAYLOAD :
// Write if sample ready and no error flags
req_write_pkt_fifo <= (sample_fifo_src_rdy_i & ~|flags_fifo_o[3:1]);
- VITA_ERR_HEADER, VITA_ERR_STREAMID, VITA_ERR_SECS, VITA_ERR_TICS, VITA_ERR_TICS2, VITA_ERR_PAYLOAD, VITA_ERR_TRAILER :
+ VITA_ERR_HEADER, VITA_ERR_STREAMID, VITA_ERR_SECS, VITA_ERR_TICS, VITA_ERR_TICS2, VITA_ERR_PAYLOAD :
req_write_pkt_fifo <= 1;
default :
req_write_pkt_fifo <= 0;
@@ -213,7 +213,7 @@ module vita_rx_framer
( ((vita_state==VITA_PAYLOAD) &
(sample_phase == (numchan-4'd1)) &
~|flags_fifo_o[3:1]) |
- (vita_state==VITA_ERR_TRAILER));
+ (vita_state==VITA_ERR_PAYLOAD));
assign debug_rx = vita_state;