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| author | ianb <ianb@astro.localdomain> | 2010-08-25 16:32:43 -0700 |
|---|---|---|
| committer | ianb <ianb@astro.localdomain> | 2010-08-25 16:32:43 -0700 |
| commit | 8cd377d7195fae6b5dcd04318c992231fa633999 (patch) | |
| tree | ba9aced0a38e180f6cdef16d5834cde3caaed839 /usrp2/vrt | |
| parent | 492c5d53c31dd403817a27c6b25c30f8e089693b (diff) | |
| download | uhd-8cd377d7195fae6b5dcd04318c992231fa633999.tar.gz uhd-8cd377d7195fae6b5dcd04318c992231fa633999.tar.bz2 uhd-8cd377d7195fae6b5dcd04318c992231fa633999.zip | |
Corrected extfifo code so that all registers that are on SRAM signals are packed into IOBs
Explcit drives and skews added to GPIO pins
Corrected minor error in FIFO logic that showed data avail internally incorrectly
Diffstat (limited to 'usrp2/vrt')
0 files changed, 0 insertions, 0 deletions