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author | Matt Ettus <matt@ettus.com> | 2011-03-16 16:42:51 -0700 |
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committer | Matt Ettus <matt@ettus.com> | 2011-03-16 16:42:51 -0700 |
commit | b357b627fb3f519408ca38ebadc9f4ae6d57de80 (patch) | |
tree | d7f11bc309111c65f0e705e2e39f70a44101b941 /usrp2/vrt/vita_tx_deframer.v | |
parent | 74979af6a089c67ac6579cb08040aec305032018 (diff) | |
download | uhd-b357b627fb3f519408ca38ebadc9f4ae6d57de80.tar.gz uhd-b357b627fb3f519408ca38ebadc9f4ae6d57de80.tar.bz2 uhd-b357b627fb3f519408ca38ebadc9f4ae6d57de80.zip |
clean up a bunch of warnings and incorrect bus widths
Diffstat (limited to 'usrp2/vrt/vita_tx_deframer.v')
-rw-r--r-- | usrp2/vrt/vita_tx_deframer.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/usrp2/vrt/vita_tx_deframer.v b/usrp2/vrt/vita_tx_deframer.v index eb39feaec..163c2af20 100644 --- a/usrp2/vrt/vita_tx_deframer.v +++ b/usrp2/vrt/vita_tx_deframer.v @@ -38,8 +38,8 @@ module vita_tx_deframer assign has_secs = ~(data_i[23:22]==2'b00); assign has_tics = ~(data_i[21:20]==2'b00); assign has_trailer = data_i[26]; - assign is_sob = data_i[25]; - assign is_eob = data_i[24]; + wire is_sob = data_i[25]; + wire is_eob = data_i[24]; wire eof = data_i[33]; reg has_streamid_reg, has_classid_reg, has_secs_reg, has_tics_reg; reg has_trailer_reg, is_sob_reg, is_eob_reg; |